diff options
author | Arnd Bergmann <arnd@arndb.de> | 2013-06-27 08:26:33 -0400 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-27 08:26:33 -0400 |
commit | 0ad578ef25be566aa80b28115c9d696e511bc6be (patch) | |
tree | b9906c7536a92972c20950b08ced3c31c516546c | |
parent | 4022acdb5b2b65ad2fe078be39bda9c5377c4e04 (diff) | |
parent | d4759ded3bdf3eb004d583011707fdc21aeda94e (diff) |
Merge tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/late
Renesas sh-sci updates for v3.11
HSCIF support by Ulrich Hecht.
* tag 'renesas-sh-sci-for-v3.11' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
serial: sh-sci: Initialise variables before access in sci_set_termios()
ARM: shmobile: r8a7790: don't use external clock for SCIFs
ARM: shmobile: r8a7790: HSCIF support
serial: sh-sci: HSCIF support
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
-rw-r--r-- | arch/arm/mach-shmobile/setup-r8a7790.c | 16 | ||||
-rw-r--r-- | drivers/tty/serial/sh-sci.c | 104 | ||||
-rw-r--r-- | include/linux/serial_sci.h | 12 | ||||
-rw-r--r-- | include/uapi/linux/serial_core.h | 3 |
4 files changed, 121 insertions, 14 deletions
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c index 196bd7325df0..28f94752b8ff 100644 --- a/arch/arm/mach-shmobile/setup-r8a7790.c +++ b/arch/arm/mach-shmobile/setup-r8a7790.c | |||
@@ -98,10 +98,18 @@ void __init r8a7790_pinmux_init(void) | |||
98 | [index] = { \ | 98 | [index] = { \ |
99 | SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ | 99 | SCIF_COMMON(PORT_SCIF, baseaddr, irq), \ |
100 | .scbrr_algo_id = SCBRR_ALGO_2, \ | 100 | .scbrr_algo_id = SCBRR_ALGO_2, \ |
101 | .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1, \ | 101 | .scscr = SCSCR_RE | SCSCR_TE, \ |
102 | } | 102 | } |
103 | 103 | ||
104 | enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1 }; | 104 | #define HSCIF_DATA(index, baseaddr, irq) \ |
105 | [index] = { \ | ||
106 | SCIF_COMMON(PORT_HSCIF, baseaddr, irq), \ | ||
107 | .scbrr_algo_id = SCBRR_ALGO_6, \ | ||
108 | .scscr = SCSCR_RE | SCSCR_TE, \ | ||
109 | } | ||
110 | |||
111 | enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1, | ||
112 | HSCIF0, HSCIF1 }; | ||
105 | 113 | ||
106 | static struct plat_sci_port scif[] __initdata = { | 114 | static struct plat_sci_port scif[] __initdata = { |
107 | SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ | 115 | SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */ |
@@ -112,6 +120,8 @@ static struct plat_sci_port scif[] __initdata = { | |||
112 | SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ | 120 | SCIFA_DATA(SCIFA2, 0xe6c60000, gic_spi(151)), /* SCIFA2 */ |
113 | SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ | 121 | SCIF_DATA(SCIF0, 0xe6e60000, gic_spi(152)), /* SCIF0 */ |
114 | SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ | 122 | SCIF_DATA(SCIF1, 0xe6e68000, gic_spi(153)), /* SCIF1 */ |
123 | HSCIF_DATA(HSCIF0, 0xe62c0000, gic_spi(154)), /* HSCIF0 */ | ||
124 | HSCIF_DATA(HSCIF1, 0xe62c8000, gic_spi(155)), /* HSCIF1 */ | ||
115 | }; | 125 | }; |
116 | 126 | ||
117 | static inline void r8a7790_register_scif(int idx) | 127 | static inline void r8a7790_register_scif(int idx) |
@@ -149,6 +159,8 @@ void __init r8a7790_add_standard_devices(void) | |||
149 | r8a7790_register_scif(SCIFA2); | 159 | r8a7790_register_scif(SCIFA2); |
150 | r8a7790_register_scif(SCIF0); | 160 | r8a7790_register_scif(SCIF0); |
151 | r8a7790_register_scif(SCIF1); | 161 | r8a7790_register_scif(SCIF1); |
162 | r8a7790_register_scif(HSCIF0); | ||
163 | r8a7790_register_scif(HSCIF1); | ||
152 | r8a7790_register_irqc(0); | 164 | r8a7790_register_irqc(0); |
153 | } | 165 | } |
154 | 166 | ||
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c index 156418619949..7477e0ea5cdb 100644 --- a/drivers/tty/serial/sh-sci.c +++ b/drivers/tty/serial/sh-sci.c | |||
@@ -146,6 +146,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
146 | [SCRFDR] = sci_reg_invalid, | 146 | [SCRFDR] = sci_reg_invalid, |
147 | [SCSPTR] = sci_reg_invalid, | 147 | [SCSPTR] = sci_reg_invalid, |
148 | [SCLSR] = sci_reg_invalid, | 148 | [SCLSR] = sci_reg_invalid, |
149 | [HSSRR] = sci_reg_invalid, | ||
149 | }, | 150 | }, |
150 | 151 | ||
151 | /* | 152 | /* |
@@ -165,6 +166,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
165 | [SCRFDR] = sci_reg_invalid, | 166 | [SCRFDR] = sci_reg_invalid, |
166 | [SCSPTR] = sci_reg_invalid, | 167 | [SCSPTR] = sci_reg_invalid, |
167 | [SCLSR] = sci_reg_invalid, | 168 | [SCLSR] = sci_reg_invalid, |
169 | [HSSRR] = sci_reg_invalid, | ||
168 | }, | 170 | }, |
169 | 171 | ||
170 | /* | 172 | /* |
@@ -183,6 +185,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
183 | [SCRFDR] = sci_reg_invalid, | 185 | [SCRFDR] = sci_reg_invalid, |
184 | [SCSPTR] = sci_reg_invalid, | 186 | [SCSPTR] = sci_reg_invalid, |
185 | [SCLSR] = sci_reg_invalid, | 187 | [SCLSR] = sci_reg_invalid, |
188 | [HSSRR] = sci_reg_invalid, | ||
186 | }, | 189 | }, |
187 | 190 | ||
188 | /* | 191 | /* |
@@ -201,6 +204,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
201 | [SCRFDR] = { 0x3c, 16 }, | 204 | [SCRFDR] = { 0x3c, 16 }, |
202 | [SCSPTR] = sci_reg_invalid, | 205 | [SCSPTR] = sci_reg_invalid, |
203 | [SCLSR] = sci_reg_invalid, | 206 | [SCLSR] = sci_reg_invalid, |
207 | [HSSRR] = sci_reg_invalid, | ||
204 | }, | 208 | }, |
205 | 209 | ||
206 | /* | 210 | /* |
@@ -220,6 +224,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
220 | [SCRFDR] = sci_reg_invalid, | 224 | [SCRFDR] = sci_reg_invalid, |
221 | [SCSPTR] = { 0x20, 16 }, | 225 | [SCSPTR] = { 0x20, 16 }, |
222 | [SCLSR] = { 0x24, 16 }, | 226 | [SCLSR] = { 0x24, 16 }, |
227 | [HSSRR] = sci_reg_invalid, | ||
223 | }, | 228 | }, |
224 | 229 | ||
225 | /* | 230 | /* |
@@ -238,6 +243,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
238 | [SCRFDR] = sci_reg_invalid, | 243 | [SCRFDR] = sci_reg_invalid, |
239 | [SCSPTR] = sci_reg_invalid, | 244 | [SCSPTR] = sci_reg_invalid, |
240 | [SCLSR] = sci_reg_invalid, | 245 | [SCLSR] = sci_reg_invalid, |
246 | [HSSRR] = sci_reg_invalid, | ||
241 | }, | 247 | }, |
242 | 248 | ||
243 | /* | 249 | /* |
@@ -256,6 +262,26 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
256 | [SCRFDR] = sci_reg_invalid, | 262 | [SCRFDR] = sci_reg_invalid, |
257 | [SCSPTR] = { 0x20, 16 }, | 263 | [SCSPTR] = { 0x20, 16 }, |
258 | [SCLSR] = { 0x24, 16 }, | 264 | [SCLSR] = { 0x24, 16 }, |
265 | [HSSRR] = sci_reg_invalid, | ||
266 | }, | ||
267 | |||
268 | /* | ||
269 | * Common HSCIF definitions. | ||
270 | */ | ||
271 | [SCIx_HSCIF_REGTYPE] = { | ||
272 | [SCSMR] = { 0x00, 16 }, | ||
273 | [SCBRR] = { 0x04, 8 }, | ||
274 | [SCSCR] = { 0x08, 16 }, | ||
275 | [SCxTDR] = { 0x0c, 8 }, | ||
276 | [SCxSR] = { 0x10, 16 }, | ||
277 | [SCxRDR] = { 0x14, 8 }, | ||
278 | [SCFCR] = { 0x18, 16 }, | ||
279 | [SCFDR] = { 0x1c, 16 }, | ||
280 | [SCTFDR] = sci_reg_invalid, | ||
281 | [SCRFDR] = sci_reg_invalid, | ||
282 | [SCSPTR] = { 0x20, 16 }, | ||
283 | [SCLSR] = { 0x24, 16 }, | ||
284 | [HSSRR] = { 0x40, 16 }, | ||
259 | }, | 285 | }, |
260 | 286 | ||
261 | /* | 287 | /* |
@@ -275,6 +301,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
275 | [SCRFDR] = sci_reg_invalid, | 301 | [SCRFDR] = sci_reg_invalid, |
276 | [SCSPTR] = sci_reg_invalid, | 302 | [SCSPTR] = sci_reg_invalid, |
277 | [SCLSR] = { 0x24, 16 }, | 303 | [SCLSR] = { 0x24, 16 }, |
304 | [HSSRR] = sci_reg_invalid, | ||
278 | }, | 305 | }, |
279 | 306 | ||
280 | /* | 307 | /* |
@@ -294,6 +321,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
294 | [SCRFDR] = { 0x20, 16 }, | 321 | [SCRFDR] = { 0x20, 16 }, |
295 | [SCSPTR] = { 0x24, 16 }, | 322 | [SCSPTR] = { 0x24, 16 }, |
296 | [SCLSR] = { 0x28, 16 }, | 323 | [SCLSR] = { 0x28, 16 }, |
324 | [HSSRR] = sci_reg_invalid, | ||
297 | }, | 325 | }, |
298 | 326 | ||
299 | /* | 327 | /* |
@@ -313,6 +341,7 @@ static struct plat_sci_reg sci_regmap[SCIx_NR_REGTYPES][SCIx_NR_REGS] = { | |||
313 | [SCRFDR] = sci_reg_invalid, | 341 | [SCRFDR] = sci_reg_invalid, |
314 | [SCSPTR] = sci_reg_invalid, | 342 | [SCSPTR] = sci_reg_invalid, |
315 | [SCLSR] = sci_reg_invalid, | 343 | [SCLSR] = sci_reg_invalid, |
344 | [HSSRR] = sci_reg_invalid, | ||
316 | }, | 345 | }, |
317 | }; | 346 | }; |
318 | 347 | ||
@@ -374,6 +403,9 @@ static int sci_probe_regmap(struct plat_sci_port *cfg) | |||
374 | */ | 403 | */ |
375 | cfg->regtype = SCIx_SH4_SCIF_REGTYPE; | 404 | cfg->regtype = SCIx_SH4_SCIF_REGTYPE; |
376 | break; | 405 | break; |
406 | case PORT_HSCIF: | ||
407 | cfg->regtype = SCIx_HSCIF_REGTYPE; | ||
408 | break; | ||
377 | default: | 409 | default: |
378 | printk(KERN_ERR "Can't probe register map for given port\n"); | 410 | printk(KERN_ERR "Can't probe register map for given port\n"); |
379 | return -EINVAL; | 411 | return -EINVAL; |
@@ -1798,6 +1830,42 @@ static unsigned int sci_scbrr_calc(unsigned int algo_id, unsigned int bps, | |||
1798 | return ((freq + 16 * bps) / (32 * bps) - 1); | 1830 | return ((freq + 16 * bps) / (32 * bps) - 1); |
1799 | } | 1831 | } |
1800 | 1832 | ||
1833 | /* calculate sample rate, BRR, and clock select for HSCIF */ | ||
1834 | static void sci_baud_calc_hscif(unsigned int bps, unsigned long freq, | ||
1835 | int *brr, unsigned int *srr, | ||
1836 | unsigned int *cks) | ||
1837 | { | ||
1838 | int sr, c, br, err; | ||
1839 | int min_err = 1000; /* 100% */ | ||
1840 | |||
1841 | /* Find the combination of sample rate and clock select with the | ||
1842 | smallest deviation from the desired baud rate. */ | ||
1843 | for (sr = 8; sr <= 32; sr++) { | ||
1844 | for (c = 0; c <= 3; c++) { | ||
1845 | /* integerized formulas from HSCIF documentation */ | ||
1846 | br = freq / (sr * (1 << (2 * c + 1)) * bps) - 1; | ||
1847 | if (br < 0 || br > 255) | ||
1848 | continue; | ||
1849 | err = freq / ((br + 1) * bps * sr * | ||
1850 | (1 << (2 * c + 1)) / 1000) - 1000; | ||
1851 | if (min_err > err) { | ||
1852 | min_err = err; | ||
1853 | *brr = br; | ||
1854 | *srr = sr - 1; | ||
1855 | *cks = c; | ||
1856 | } | ||
1857 | } | ||
1858 | } | ||
1859 | |||
1860 | if (min_err == 1000) { | ||
1861 | WARN_ON(1); | ||
1862 | /* use defaults */ | ||
1863 | *brr = 255; | ||
1864 | *srr = 15; | ||
1865 | *cks = 0; | ||
1866 | } | ||
1867 | } | ||
1868 | |||
1801 | static void sci_reset(struct uart_port *port) | 1869 | static void sci_reset(struct uart_port *port) |
1802 | { | 1870 | { |
1803 | struct plat_sci_reg *reg; | 1871 | struct plat_sci_reg *reg; |
@@ -1819,8 +1887,9 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1819 | { | 1887 | { |
1820 | struct sci_port *s = to_sci_port(port); | 1888 | struct sci_port *s = to_sci_port(port); |
1821 | struct plat_sci_reg *reg; | 1889 | struct plat_sci_reg *reg; |
1822 | unsigned int baud, smr_val, max_baud, cks; | 1890 | unsigned int baud, smr_val, max_baud, cks = 0; |
1823 | int t = -1; | 1891 | int t = -1; |
1892 | unsigned int srr = 15; | ||
1824 | 1893 | ||
1825 | /* | 1894 | /* |
1826 | * earlyprintk comes here early on with port->uartclk set to zero. | 1895 | * earlyprintk comes here early on with port->uartclk set to zero. |
@@ -1833,8 +1902,17 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1833 | max_baud = port->uartclk ? port->uartclk / 16 : 115200; | 1902 | max_baud = port->uartclk ? port->uartclk / 16 : 115200; |
1834 | 1903 | ||
1835 | baud = uart_get_baud_rate(port, termios, old, 0, max_baud); | 1904 | baud = uart_get_baud_rate(port, termios, old, 0, max_baud); |
1836 | if (likely(baud && port->uartclk)) | 1905 | if (likely(baud && port->uartclk)) { |
1837 | t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud, port->uartclk); | 1906 | if (s->cfg->scbrr_algo_id == SCBRR_ALGO_6) { |
1907 | sci_baud_calc_hscif(baud, port->uartclk, &t, &srr, | ||
1908 | &cks); | ||
1909 | } else { | ||
1910 | t = sci_scbrr_calc(s->cfg->scbrr_algo_id, baud, | ||
1911 | port->uartclk); | ||
1912 | for (cks = 0; t >= 256 && cks <= 3; cks++) | ||
1913 | t >>= 2; | ||
1914 | } | ||
1915 | } | ||
1838 | 1916 | ||
1839 | sci_port_enable(s); | 1917 | sci_port_enable(s); |
1840 | 1918 | ||
@@ -1853,15 +1931,15 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios, | |||
1853 | 1931 | ||
1854 | uart_update_timeout(port, termios->c_cflag, baud); | 1932 | uart_update_timeout(port, termios->c_cflag, baud); |
1855 | 1933 | ||
1856 | for (cks = 0; t >= 256 && cks <= 3; cks++) | ||
1857 | t >>= 2; | ||
1858 | |||
1859 | dev_dbg(port->dev, "%s: SMR %x, cks %x, t %x, SCSCR %x\n", | 1934 | dev_dbg(port->dev, "%s: SMR %x, cks %x, t %x, SCSCR %x\n", |
1860 | __func__, smr_val, cks, t, s->cfg->scscr); | 1935 | __func__, smr_val, cks, t, s->cfg->scscr); |
1861 | 1936 | ||
1862 | if (t >= 0) { | 1937 | if (t >= 0) { |
1863 | serial_port_out(port, SCSMR, (smr_val & ~3) | cks); | 1938 | serial_port_out(port, SCSMR, (smr_val & ~3) | cks); |
1864 | serial_port_out(port, SCBRR, t); | 1939 | serial_port_out(port, SCBRR, t); |
1940 | reg = sci_getreg(port, HSSRR); | ||
1941 | if (reg->size) | ||
1942 | serial_port_out(port, HSSRR, srr | HSCIF_SRE); | ||
1865 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ | 1943 | udelay((1000000+(baud-1)) / baud); /* Wait one bit interval */ |
1866 | } else | 1944 | } else |
1867 | serial_port_out(port, SCSMR, smr_val); | 1945 | serial_port_out(port, SCSMR, smr_val); |
@@ -1947,6 +2025,8 @@ static const char *sci_type(struct uart_port *port) | |||
1947 | return "scifa"; | 2025 | return "scifa"; |
1948 | case PORT_SCIFB: | 2026 | case PORT_SCIFB: |
1949 | return "scifb"; | 2027 | return "scifb"; |
2028 | case PORT_HSCIF: | ||
2029 | return "hscif"; | ||
1950 | } | 2030 | } |
1951 | 2031 | ||
1952 | return NULL; | 2032 | return NULL; |
@@ -1960,7 +2040,10 @@ static inline unsigned long sci_port_size(struct uart_port *port) | |||
1960 | * from platform resource data at such a time that ports begin to | 2040 | * from platform resource data at such a time that ports begin to |
1961 | * behave more erratically. | 2041 | * behave more erratically. |
1962 | */ | 2042 | */ |
1963 | return 64; | 2043 | if (port->type == PORT_HSCIF) |
2044 | return 96; | ||
2045 | else | ||
2046 | return 64; | ||
1964 | } | 2047 | } |
1965 | 2048 | ||
1966 | static int sci_remap_port(struct uart_port *port) | 2049 | static int sci_remap_port(struct uart_port *port) |
@@ -2085,6 +2168,9 @@ static int sci_init_single(struct platform_device *dev, | |||
2085 | case PORT_SCIFB: | 2168 | case PORT_SCIFB: |
2086 | port->fifosize = 256; | 2169 | port->fifosize = 256; |
2087 | break; | 2170 | break; |
2171 | case PORT_HSCIF: | ||
2172 | port->fifosize = 128; | ||
2173 | break; | ||
2088 | case PORT_SCIFA: | 2174 | case PORT_SCIFA: |
2089 | port->fifosize = 64; | 2175 | port->fifosize = 64; |
2090 | break; | 2176 | break; |
@@ -2325,7 +2411,7 @@ static inline int sci_probe_earlyprintk(struct platform_device *pdev) | |||
2325 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ | 2411 | #endif /* CONFIG_SERIAL_SH_SCI_CONSOLE */ |
2326 | 2412 | ||
2327 | static char banner[] __initdata = | 2413 | static char banner[] __initdata = |
2328 | KERN_INFO "SuperH SCI(F) driver initialized\n"; | 2414 | KERN_INFO "SuperH (H)SCI(F) driver initialized\n"; |
2329 | 2415 | ||
2330 | static struct uart_driver sci_uart_driver = { | 2416 | static struct uart_driver sci_uart_driver = { |
2331 | .owner = THIS_MODULE, | 2417 | .owner = THIS_MODULE, |
@@ -2484,4 +2570,4 @@ module_exit(sci_exit); | |||
2484 | MODULE_LICENSE("GPL"); | 2570 | MODULE_LICENSE("GPL"); |
2485 | MODULE_ALIAS("platform:sh-sci"); | 2571 | MODULE_ALIAS("platform:sh-sci"); |
2486 | MODULE_AUTHOR("Paul Mundt"); | 2572 | MODULE_AUTHOR("Paul Mundt"); |
2487 | MODULE_DESCRIPTION("SuperH SCI(F) serial driver"); | 2573 | MODULE_DESCRIPTION("SuperH (H)SCI(F) serial driver"); |
diff --git a/include/linux/serial_sci.h b/include/linux/serial_sci.h index eb763adf9815..d34049712a4d 100644 --- a/include/linux/serial_sci.h +++ b/include/linux/serial_sci.h | |||
@@ -5,7 +5,7 @@ | |||
5 | #include <linux/sh_dma.h> | 5 | #include <linux/sh_dma.h> |
6 | 6 | ||
7 | /* | 7 | /* |
8 | * Generic header for SuperH SCI(F) (used by sh/sh64/h8300 and related parts) | 8 | * Generic header for SuperH (H)SCI(F) (used by sh/sh64/h8300 and related parts) |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #define SCIx_NOT_SUPPORTED (-1) | 11 | #define SCIx_NOT_SUPPORTED (-1) |
@@ -16,6 +16,7 @@ enum { | |||
16 | SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */ | 16 | SCBRR_ALGO_3, /* (((clk * 2) + 16 * bps) / (16 * bps) - 1) */ |
17 | SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */ | 17 | SCBRR_ALGO_4, /* (((clk * 2) + 16 * bps) / (32 * bps) - 1) */ |
18 | SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */ | 18 | SCBRR_ALGO_5, /* (((clk * 1000 / 32) / bps) - 1) */ |
19 | SCBRR_ALGO_6, /* HSCIF variable sample rate algorithm */ | ||
19 | }; | 20 | }; |
20 | 21 | ||
21 | #define SCSCR_TIE (1 << 7) | 22 | #define SCSCR_TIE (1 << 7) |
@@ -37,7 +38,7 @@ enum { | |||
37 | 38 | ||
38 | #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) | 39 | #define SCI_DEFAULT_ERROR_MASK (SCI_PER | SCI_FER) |
39 | 40 | ||
40 | /* SCxSR SCIF */ | 41 | /* SCxSR SCIF, HSCIF */ |
41 | #define SCIF_ER 0x0080 | 42 | #define SCIF_ER 0x0080 |
42 | #define SCIF_TEND 0x0040 | 43 | #define SCIF_TEND 0x0040 |
43 | #define SCIF_TDFE 0x0020 | 44 | #define SCIF_TDFE 0x0020 |
@@ -55,6 +56,9 @@ enum { | |||
55 | #define SCSPTR_SPB2IO (1 << 1) | 56 | #define SCSPTR_SPB2IO (1 << 1) |
56 | #define SCSPTR_SPB2DT (1 << 0) | 57 | #define SCSPTR_SPB2DT (1 << 0) |
57 | 58 | ||
59 | /* HSSRR HSCIF */ | ||
60 | #define HSCIF_SRE 0x8000 | ||
61 | |||
58 | /* Offsets into the sci_port->irqs array */ | 62 | /* Offsets into the sci_port->irqs array */ |
59 | enum { | 63 | enum { |
60 | SCIx_ERI_IRQ, | 64 | SCIx_ERI_IRQ, |
@@ -90,6 +94,7 @@ enum { | |||
90 | SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, | 94 | SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE, |
91 | SCIx_SH4_SCIF_FIFODATA_REGTYPE, | 95 | SCIx_SH4_SCIF_FIFODATA_REGTYPE, |
92 | SCIx_SH7705_SCIF_REGTYPE, | 96 | SCIx_SH7705_SCIF_REGTYPE, |
97 | SCIx_HSCIF_REGTYPE, | ||
93 | 98 | ||
94 | SCIx_NR_REGTYPES, | 99 | SCIx_NR_REGTYPES, |
95 | }; | 100 | }; |
@@ -115,6 +120,7 @@ enum { | |||
115 | SCSMR, SCBRR, SCSCR, SCxSR, | 120 | SCSMR, SCBRR, SCSCR, SCxSR, |
116 | SCFCR, SCFDR, SCxTDR, SCxRDR, | 121 | SCFCR, SCFDR, SCxTDR, SCxRDR, |
117 | SCLSR, SCTFDR, SCRFDR, SCSPTR, | 122 | SCLSR, SCTFDR, SCRFDR, SCSPTR, |
123 | HSSRR, | ||
118 | 124 | ||
119 | SCIx_NR_REGS, | 125 | SCIx_NR_REGS, |
120 | }; | 126 | }; |
@@ -137,7 +143,7 @@ struct plat_sci_port { | |||
137 | unsigned long mapbase; /* resource base */ | 143 | unsigned long mapbase; /* resource base */ |
138 | unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ | 144 | unsigned int irqs[SCIx_NR_IRQS]; /* ERI, RXI, TXI, BRI */ |
139 | unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */ | 145 | unsigned int gpios[SCIx_NR_FNS]; /* SCK, RXD, TXD, CTS, RTS */ |
140 | unsigned int type; /* SCI / SCIF / IRDA */ | 146 | unsigned int type; /* SCI / SCIF / IRDA / HSCIF */ |
141 | upf_t flags; /* UPF_* flags */ | 147 | upf_t flags; /* UPF_* flags */ |
142 | unsigned long capabilities; /* Port features/capabilities */ | 148 | unsigned long capabilities; /* Port features/capabilities */ |
143 | 149 | ||
diff --git a/include/uapi/linux/serial_core.h b/include/uapi/linux/serial_core.h index 74c2bf7211f8..26eee07eeb24 100644 --- a/include/uapi/linux/serial_core.h +++ b/include/uapi/linux/serial_core.h | |||
@@ -226,4 +226,7 @@ | |||
226 | /* Rocketport EXPRESS/INFINITY */ | 226 | /* Rocketport EXPRESS/INFINITY */ |
227 | #define PORT_RP2 102 | 227 | #define PORT_RP2 102 |
228 | 228 | ||
229 | /* SH-SCI */ | ||
230 | #define PORT_HSCIF 103 | ||
231 | |||
229 | #endif /* _UAPILINUX_SERIAL_CORE_H */ | 232 | #endif /* _UAPILINUX_SERIAL_CORE_H */ |