diff options
author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-01-25 13:19:08 -0500 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2014-02-06 13:06:50 -0500 |
commit | 0a11a6ae94373f37e738f7dc8f51d60a78d78a58 (patch) | |
tree | 071c2f0e394865a0bc1ff75768775cef41d3dc59 | |
parent | 07ad6836fa21b8ae1715d5f82a0d28c4140e1e73 (diff) |
clk: mvebu: armada-xp: maintain clock init order
Init order of CLK_OF_DECLARE'd drivers depends on compile order.
Unfortunately, clk_of_init does not allow drivers to return errors,
e.g. -EPROBE_DEFER if parent clocks have not been registered, yet.
To avoid init order woes for MVEBU clock drivers, we take care of
proper init order ourselves. This patch joins core-clk and gating-clk
init to maintain proper init order.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r-- | drivers/clk/mvebu/armada-xp.c | 20 |
1 files changed, 9 insertions, 11 deletions
diff --git a/drivers/clk/mvebu/armada-xp.c b/drivers/clk/mvebu/armada-xp.c index 9922c4475aa8..b3094315a3c0 100644 --- a/drivers/clk/mvebu/armada-xp.c +++ b/drivers/clk/mvebu/armada-xp.c | |||
@@ -158,13 +158,6 @@ static const struct coreclk_soc_desc axp_coreclks = { | |||
158 | .num_ratios = ARRAY_SIZE(axp_coreclk_ratios), | 158 | .num_ratios = ARRAY_SIZE(axp_coreclk_ratios), |
159 | }; | 159 | }; |
160 | 160 | ||
161 | static void __init axp_coreclk_init(struct device_node *np) | ||
162 | { | ||
163 | mvebu_coreclk_setup(np, &axp_coreclks); | ||
164 | } | ||
165 | CLK_OF_DECLARE(axp_core_clk, "marvell,armada-xp-core-clock", | ||
166 | axp_coreclk_init); | ||
167 | |||
168 | /* | 161 | /* |
169 | * Clock Gating Control | 162 | * Clock Gating Control |
170 | */ | 163 | */ |
@@ -202,9 +195,14 @@ static const struct clk_gating_soc_desc axp_gating_desc[] __initconst = { | |||
202 | { } | 195 | { } |
203 | }; | 196 | }; |
204 | 197 | ||
205 | static void __init axp_clk_gating_init(struct device_node *np) | 198 | static void __init axp_clk_init(struct device_node *np) |
206 | { | 199 | { |
207 | mvebu_clk_gating_setup(np, axp_gating_desc); | 200 | struct device_node *cgnp = |
201 | of_find_compatible_node(NULL, NULL, "marvell,armada-xp-gating-clock"); | ||
202 | |||
203 | mvebu_coreclk_setup(np, &axp_coreclks); | ||
204 | |||
205 | if (cgnp) | ||
206 | mvebu_clk_gating_setup(cgnp, axp_gating_desc); | ||
208 | } | 207 | } |
209 | CLK_OF_DECLARE(axp_clk_gating, "marvell,armada-xp-gating-clock", | 208 | CLK_OF_DECLARE(axp_clk, "marvell,armada-xp-core-clock", axp_clk_init); |
210 | axp_clk_gating_init); | ||