diff options
author | Sangwook Ju <sw.ju@samsung.com> | 2010-12-21 17:26:40 -0500 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2010-12-23 00:53:39 -0500 |
commit | 09dc781e94b881d23e3c5da8c72d6832ae542938 (patch) | |
tree | 89a00179379d0a3839dda621a93e30d59840d0bb | |
parent | 7af36b9787e19b4cbde9ee984e431d64b586784e (diff) |
ARM: S5PV310: Define missing CMU register for CPUFREQ
This patch adds missing CMU(Clock Management Unit) registers for
updated S5PV310 CPUFREQ driver.
Signed-off-by: Sangwook Ju <sw.ju@samsung.com>
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/mach-s5pv310/include/mach/regs-clock.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h index 9e9e44c3290e..b5c4ada1cff5 100644 --- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h | |||
@@ -89,7 +89,9 @@ | |||
89 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) | 89 | #define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) |
90 | 90 | ||
91 | #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) | 91 | #define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) |
92 | #define S5P_CLKDIV_CPU1 S5P_CLKREG(0x14504) | ||
92 | #define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600) | 93 | #define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600) |
94 | #define S5P_CLKDIV_STATCPU1 S5P_CLKREG(0x14604) | ||
93 | 95 | ||
94 | #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) | 96 | #define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) |
95 | 97 | ||
@@ -100,6 +102,7 @@ | |||
100 | #define S5P_APLLCON0_ENABLE_SHIFT (31) | 102 | #define S5P_APLLCON0_ENABLE_SHIFT (31) |
101 | #define S5P_APLLCON0_LOCKED_SHIFT (29) | 103 | #define S5P_APLLCON0_LOCKED_SHIFT (29) |
102 | #define S5P_APLL_VAL_1000 ((250 << 16) | (6 << 8) | 1) | 104 | #define S5P_APLL_VAL_1000 ((250 << 16) | (6 << 8) | 1) |
105 | #define S5P_APLL_VAL_800 ((200 << 16) | (6 << 8) | 1) | ||
103 | 106 | ||
104 | /* CLK_SRC_CPU */ | 107 | /* CLK_SRC_CPU */ |
105 | #define S5P_CLKSRC_CPU_MUXCORE_SHIFT (16) | 108 | #define S5P_CLKSRC_CPU_MUXCORE_SHIFT (16) |