diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-17 17:21:43 -0400 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-05-17 17:21:43 -0400 |
commit | 08c18964a247b412acab56599a643e6f73e1ec5a (patch) | |
tree | 467a028ec1d1b351577216d3c2bf1d2d46e8d0c5 | |
parent | 20a249896bb53536b69b228593dbdb6eb0d18113 (diff) | |
parent | e9623b35599fcdbc00c16535cbefbb4d5578f4ab (diff) |
Merge branch 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
x86: disable mwait for AMD family 10H/11H CPUs
x86: fix crash on cpu hotplug on pat-incapable machines
x86: remove mwait capability C-state check
-rw-r--r-- | arch/x86/kernel/process.c | 36 | ||||
-rw-r--r-- | arch/x86/mm/pat.c | 2 |
2 files changed, 28 insertions, 10 deletions
diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c index 67e9b4a1e89d..ba370dc8685b 100644 --- a/arch/x86/kernel/process.c +++ b/arch/x86/kernel/process.c | |||
@@ -99,15 +99,6 @@ static void mwait_idle(void) | |||
99 | local_irq_enable(); | 99 | local_irq_enable(); |
100 | } | 100 | } |
101 | 101 | ||
102 | |||
103 | static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) | ||
104 | { | ||
105 | if (force_mwait) | ||
106 | return 1; | ||
107 | /* Any C1 states supported? */ | ||
108 | return c->cpuid_level >= 5 && ((cpuid_edx(5) >> 4) & 0xf) > 0; | ||
109 | } | ||
110 | |||
111 | /* | 102 | /* |
112 | * On SMP it's slightly faster (but much more power-consuming!) | 103 | * On SMP it's slightly faster (but much more power-consuming!) |
113 | * to poll the ->work.need_resched flag instead of waiting for the | 104 | * to poll the ->work.need_resched flag instead of waiting for the |
@@ -119,6 +110,33 @@ static void poll_idle(void) | |||
119 | cpu_relax(); | 110 | cpu_relax(); |
120 | } | 111 | } |
121 | 112 | ||
113 | /* | ||
114 | * mwait selection logic: | ||
115 | * | ||
116 | * It depends on the CPU. For AMD CPUs that support MWAIT this is | ||
117 | * wrong. Family 0x10 and 0x11 CPUs will enter C1 on HLT. Powersavings | ||
118 | * then depend on a clock divisor and current Pstate of the core. If | ||
119 | * all cores of a processor are in halt state (C1) the processor can | ||
120 | * enter the C1E (C1 enhanced) state. If mwait is used this will never | ||
121 | * happen. | ||
122 | * | ||
123 | * idle=mwait overrides this decision and forces the usage of mwait. | ||
124 | */ | ||
125 | static int __cpuinit mwait_usable(const struct cpuinfo_x86 *c) | ||
126 | { | ||
127 | if (force_mwait) | ||
128 | return 1; | ||
129 | |||
130 | if (c->x86_vendor == X86_VENDOR_AMD) { | ||
131 | switch(c->x86) { | ||
132 | case 0x10: | ||
133 | case 0x11: | ||
134 | return 0; | ||
135 | } | ||
136 | } | ||
137 | return 1; | ||
138 | } | ||
139 | |||
122 | void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) | 140 | void __cpuinit select_idle_routine(const struct cpuinfo_x86 *c) |
123 | { | 141 | { |
124 | static int selected; | 142 | static int selected; |
diff --git a/arch/x86/mm/pat.c b/arch/x86/mm/pat.c index bcb1a8e4b2db..de3a99812450 100644 --- a/arch/x86/mm/pat.c +++ b/arch/x86/mm/pat.c | |||
@@ -28,7 +28,7 @@ | |||
28 | #ifdef CONFIG_X86_PAT | 28 | #ifdef CONFIG_X86_PAT |
29 | int __read_mostly pat_wc_enabled = 1; | 29 | int __read_mostly pat_wc_enabled = 1; |
30 | 30 | ||
31 | void __init pat_disable(char *reason) | 31 | void __cpuinit pat_disable(char *reason) |
32 | { | 32 | { |
33 | pat_wc_enabled = 0; | 33 | pat_wc_enabled = 0; |
34 | printk(KERN_INFO "%s\n", reason); | 34 | printk(KERN_INFO "%s\n", reason); |