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authorMika Westerberg <mika.westerberg@linux.intel.com>2014-02-19 09:10:29 -0500
committerWolfram Sang <wsa@the-dreams.de>2014-03-09 04:35:22 -0400
commit089c729ae440c6df35eeac7998525718fcee0323 (patch)
tree60ca02f098791ef86c3197b3e59332acfc289196
parentbe58eda775c8753a3e92ec398124279abc59aa0d (diff)
i2c: designware-pci: Add Baytrail PCI IDs
Intel Baytrail I2C controllers can be enumerated from PCI as well as from ACPI. In order to support this add the Baytrail PCI IDs to the driver. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
-rw-r--r--drivers/i2c/busses/i2c-designware-pcidrv.c21
1 files changed, 19 insertions, 2 deletions
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index c0a87a5eb63e..80c3b5e0a5c8 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -54,6 +54,8 @@ enum dw_pci_ctl_id_t {
54 medfield_3, 54 medfield_3,
55 medfield_4, 55 medfield_4,
56 medfield_5, 56 medfield_5,
57
58 baytrail,
57}; 59};
58 60
59struct dw_pci_controller { 61struct dw_pci_controller {
@@ -132,6 +134,13 @@ static struct dw_pci_controller dw_pci_controllers[] = {
132 .rx_fifo_depth = 32, 134 .rx_fifo_depth = 32,
133 .clk_khz = 25000, 135 .clk_khz = 25000,
134 }, 136 },
137 [baytrail] = {
138 .bus_num = -1,
139 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
140 .tx_fifo_depth = 32,
141 .rx_fifo_depth = 32,
142 .clk_khz = 100000,
143 },
135}; 144};
136static struct i2c_algorithm i2c_dw_algo = { 145static struct i2c_algorithm i2c_dw_algo = {
137 .master_xfer = i2c_dw_xfer, 146 .master_xfer = i2c_dw_xfer,
@@ -226,8 +235,8 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
226 adap->algo = &i2c_dw_algo; 235 adap->algo = &i2c_dw_algo;
227 adap->dev.parent = &pdev->dev; 236 adap->dev.parent = &pdev->dev;
228 adap->nr = controller->bus_num; 237 adap->nr = controller->bus_num;
229 snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci-%d", 238
230 adap->nr); 239 snprintf(adap->name, sizeof(adap->name), "i2c-designware-pci");
231 240
232 r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, IRQF_SHARED, 241 r = devm_request_irq(&pdev->dev, pdev->irq, i2c_dw_isr, IRQF_SHARED,
233 adap->name, dev); 242 adap->name, dev);
@@ -278,6 +287,14 @@ static DEFINE_PCI_DEVICE_TABLE(i2_designware_pci_ids) = {
278 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, 287 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
279 { PCI_VDEVICE(INTEL, 0x082D), medfield_1 }, 288 { PCI_VDEVICE(INTEL, 0x082D), medfield_1 },
280 { PCI_VDEVICE(INTEL, 0x082E), medfield_2 }, 289 { PCI_VDEVICE(INTEL, 0x082E), medfield_2 },
290 /* Baytrail */
291 { PCI_VDEVICE(INTEL, 0x0F41), baytrail },
292 { PCI_VDEVICE(INTEL, 0x0F42), baytrail },
293 { PCI_VDEVICE(INTEL, 0x0F43), baytrail },
294 { PCI_VDEVICE(INTEL, 0x0F44), baytrail },
295 { PCI_VDEVICE(INTEL, 0x0F45), baytrail },
296 { PCI_VDEVICE(INTEL, 0x0F46), baytrail },
297 { PCI_VDEVICE(INTEL, 0x0F47), baytrail },
281 { 0,} 298 { 0,}
282}; 299};
283MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids); 300MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);