diff options
author | Nick Nunley <nicholas.d.nunley@intel.com> | 2010-07-26 09:15:29 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-07-26 21:42:53 -0400 |
commit | 08451e2587dc8d8c34cbbb8edc88a6e4fa8946e6 (patch) | |
tree | 174521b973af9dfe97ad627e614a01b64a778bbb | |
parent | 4085f746db1b7d6b292cf27cc713a13a1fcb2681 (diff) |
igb: restore EEPROM values of MDICNFG on reset with 82580
On a reset the MDICNFG.Destination and MDICNFG.COM_MDIO
register fields are not restored to the EEPROM default.
This patch modifies the reset code to read the EEPROM
and restore the default values.
Signed-off-by: Nicholas Nunley <nicholas.d.nunley@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/igb/e1000_82575.c | 41 | ||||
-rw-r--r-- | drivers/net/igb/e1000_defines.h | 4 |
2 files changed, 45 insertions, 0 deletions
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c index 2971438bd873..cc58227af424 100644 --- a/drivers/net/igb/e1000_82575.c +++ b/drivers/net/igb/e1000_82575.c | |||
@@ -1549,6 +1549,43 @@ out: | |||
1549 | } | 1549 | } |
1550 | 1550 | ||
1551 | /** | 1551 | /** |
1552 | * igb_reset_mdicnfg_82580 - Reset MDICNFG destination and com_mdio bits | ||
1553 | * @hw: pointer to the HW structure | ||
1554 | * | ||
1555 | * This resets the the MDICNFG.Destination and MDICNFG.Com_MDIO bits based on | ||
1556 | * the values found in the EEPROM. This addresses an issue in which these | ||
1557 | * bits are not restored from EEPROM after reset. | ||
1558 | **/ | ||
1559 | static s32 igb_reset_mdicnfg_82580(struct e1000_hw *hw) | ||
1560 | { | ||
1561 | s32 ret_val = 0; | ||
1562 | u32 mdicnfg; | ||
1563 | u16 nvm_data; | ||
1564 | |||
1565 | if (hw->mac.type != e1000_82580) | ||
1566 | goto out; | ||
1567 | if (!igb_sgmii_active_82575(hw)) | ||
1568 | goto out; | ||
1569 | |||
1570 | ret_val = hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A + | ||
1571 | NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1, | ||
1572 | &nvm_data); | ||
1573 | if (ret_val) { | ||
1574 | hw_dbg("NVM Read Error\n"); | ||
1575 | goto out; | ||
1576 | } | ||
1577 | |||
1578 | mdicnfg = rd32(E1000_MDICNFG); | ||
1579 | if (nvm_data & NVM_WORD24_EXT_MDIO) | ||
1580 | mdicnfg |= E1000_MDICNFG_EXT_MDIO; | ||
1581 | if (nvm_data & NVM_WORD24_COM_MDIO) | ||
1582 | mdicnfg |= E1000_MDICNFG_COM_MDIO; | ||
1583 | wr32(E1000_MDICNFG, mdicnfg); | ||
1584 | out: | ||
1585 | return ret_val; | ||
1586 | } | ||
1587 | |||
1588 | /** | ||
1552 | * igb_reset_hw_82580 - Reset hardware | 1589 | * igb_reset_hw_82580 - Reset hardware |
1553 | * @hw: pointer to the HW structure | 1590 | * @hw: pointer to the HW structure |
1554 | * | 1591 | * |
@@ -1623,6 +1660,10 @@ static s32 igb_reset_hw_82580(struct e1000_hw *hw) | |||
1623 | wr32(E1000_IMC, 0xffffffff); | 1660 | wr32(E1000_IMC, 0xffffffff); |
1624 | icr = rd32(E1000_ICR); | 1661 | icr = rd32(E1000_ICR); |
1625 | 1662 | ||
1663 | ret_val = igb_reset_mdicnfg_82580(hw); | ||
1664 | if (ret_val) | ||
1665 | hw_dbg("Could not reset MDICNFG based on EEPROM\n"); | ||
1666 | |||
1626 | /* Install any alternate MAC address into RAR0 */ | 1667 | /* Install any alternate MAC address into RAR0 */ |
1627 | ret_val = igb_check_alt_mac_addr(hw); | 1668 | ret_val = igb_check_alt_mac_addr(hw); |
1628 | 1669 | ||
diff --git a/drivers/net/igb/e1000_defines.h b/drivers/net/igb/e1000_defines.h index 1d4767f5f110..bbd2ec308eb0 100644 --- a/drivers/net/igb/e1000_defines.h +++ b/drivers/net/igb/e1000_defines.h | |||
@@ -570,6 +570,10 @@ | |||
570 | 570 | ||
571 | #define NVM_82580_LAN_FUNC_OFFSET(a) (a ? (0x40 + (0x40 * a)) : 0) | 571 | #define NVM_82580_LAN_FUNC_OFFSET(a) (a ? (0x40 + (0x40 * a)) : 0) |
572 | 572 | ||
573 | /* Mask bits for fields in Word 0x24 of the NVM */ | ||
574 | #define NVM_WORD24_COM_MDIO 0x0008 /* MDIO interface shared */ | ||
575 | #define NVM_WORD24_EXT_MDIO 0x0004 /* MDIO accesses routed external */ | ||
576 | |||
573 | /* Mask bits for fields in Word 0x0f of the NVM */ | 577 | /* Mask bits for fields in Word 0x0f of the NVM */ |
574 | #define NVM_WORD0F_PAUSE_MASK 0x3000 | 578 | #define NVM_WORD0F_PAUSE_MASK 0x3000 |
575 | #define NVM_WORD0F_ASM_DIR 0x2000 | 579 | #define NVM_WORD0F_ASM_DIR 0x2000 |