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authorPeter Ujfalusi <peter.ujfalusi@ti.com>2012-10-04 07:57:25 -0400
committerTony Lindgren <tony@atomide.com>2012-10-08 19:06:15 -0400
commit08386febc7d07e25d13747e272e8ac5d8b1fbdc9 (patch)
tree3e655cdac0bed04f5bae1344e3cdf7135c328cd9
parent42601d587bb0ed244d0b3bd03657d2d07c73010f (diff)
ARM/dts: omap4-sdp: pinmux configuration for audio
u-boot stopped configuring 'non essential' pins recently. The kernel needs to configure the mux for audio needs. Since the pinmux for these IPs are static let pinctrl to handle the mux configuration for. Configuring the mux for: twl6040 (audpwron, irq), McPDM, DMIC, McBSP1 and McBSP2. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
-rw-r--r--arch/arm/boot/dts/omap4-sdp.dts53
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index cf09875df406..5b7e04fbff50 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -117,6 +117,15 @@
117}; 117};
118 118
119&omap4_pmx_core { 119&omap4_pmx_core {
120 pinctrl-names = "default";
121 pinctrl-0 = <
122 &twl6040_pins
123 &mcpdm_pins
124 &dmic_pins
125 &mcbsp1_pins
126 &mcbsp2_pins
127 >;
128
120 uart2_pins: pinmux_uart2_pins { 129 uart2_pins: pinmux_uart2_pins {
121 pinctrl-single,pins = < 130 pinctrl-single,pins = <
122 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */ 131 0xd8 0x118 /* uart2_cts.uart2_cts INPUT_PULLUP | MODE0 */
@@ -141,6 +150,50 @@
141 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */ 150 0x11e 0 /* uart4_tx.uart4_tx OUTPUT | MODE0 */
142 >; 151 >;
143 }; 152 };
153
154 twl6040_pins: pinmux_twl6040_pins {
155 pinctrl-single,pins = <
156 0xe0 0x3 /* hdq_sio.gpio_127 OUTPUT | MODE3 */
157 0x160 0x100 /* sys_nirq2.sys_nirq2 INPUT | MODE0 */
158 >;
159 };
160
161 mcpdm_pins: pinmux_mcpdm_pins {
162 pinctrl-single,pins = <
163 0xc6 0x108 /* abe_pdm_ul_data.abe_pdm_ul_data INPUT PULLDOWN | MODE0 */
164 0xc8 0x108 /* abe_pdm_dl_data.abe_pdm_dl_data INPUT PULLDOWN | MODE0 */
165 0xca 0x118 /* abe_pdm_frame.abe_pdm_frame INPUT PULLUP | MODE0 */
166 0xcc 0x108 /* abe_pdm_lb_clk.abe_pdm_lb_clk INPUT PULLDOWN | MODE0 */
167 0xce 0x108 /* abe_clks.abe_clks INPUT PULLDOWN | MODE0 */
168 >;
169 };
170
171 dmic_pins: pinmux_dmic_pins {
172 pinctrl-single,pins = <
173 0xd0 0 /* abe_dmic_clk1.abe_dmic_clk1 OUTPUT | MODE0 */
174 0xd2 0x100 /* abe_dmic_din1.abe_dmic_din1 INPUT | MODE0 */
175 0xd4 0x100 /* abe_dmic_din2.abe_dmic_din2 INPUT | MODE0 */
176 0xd6 0x100 /* abe_dmic_din3.abe_dmic_din3 INPUT | MODE0 */
177 >;
178 };
179
180 mcbsp1_pins: pinmux_mcbsp1_pins {
181 pinctrl-single,pins = <
182 0xbe 0x100 /* abe_mcbsp1_clkx.abe_mcbsp1_clkx INPUT | MODE0 */
183 0xc0 0x108 /* abe_mcbsp1_dr.abe_mcbsp1_dr INPUT PULLDOWN | MODE0 */
184 0xc2 0x8 /* abe_mcbsp1_dx.abe_mcbsp1_dx OUTPUT PULLDOWN | MODE0 */
185 0xc4 0x100 /* abe_mcbsp1_fsx.abe_mcbsp1_fsx INPUT | MODE0 */
186 >;
187 };
188
189 mcbsp2_pins: pinmux_mcbsp2_pins {
190 pinctrl-single,pins = <
191 0xb6 0x100 /* abe_mcbsp2_clkx.abe_mcbsp2_clkx INPUT | MODE0 */
192 0xb8 0x108 /* abe_mcbsp2_dr.abe_mcbsp2_dr INPUT PULLDOWN | MODE0 */
193 0xba 0x8 /* abe_mcbsp2_dx.abe_mcbsp2_dx OUTPUT PULLDOWN | MODE0 */
194 0xbc 0x100 /* abe_mcbsp2_fsx.abe_mcbsp2_fsx INPUT | MODE0 */
195 >;
196 };
144}; 197};
145 198
146&i2c1 { 199&i2c1 {