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authorAlexander Stein <alexander.stein@systec-electronic.com>2012-02-20 03:14:16 -0500
committerWolfram Sang <w.sang@pengutronix.de>2012-03-07 13:07:04 -0500
commit0836c80901565e8549e17cbad6933ab7e48ef6b2 (patch)
treeadb5321eb058a3846c266fddd3be3bb790516571
parentc62c3ca55e0db52b311b1258ed08bc6c7525195e (diff)
i2c-eg20t: Rework pch_i2c_wait_for_bus_idle to reduce wait time
If you insert several i2c transfers, the driver might start the next one while the STOP bit of the previous transfer is still on the bus, marking the bus as busy. pch_i2c_wait_for_bus_idle does an msleep(20) delaying the next transfer by >=20ms. Reduce wait time by actively waiting 5 us once, then using usleep_range. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Tomoya MORINAGA <tomoya.rohm@gmail.com> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
-rw-r--r--drivers/i2c/busses/i2c-eg20t.c36
1 files changed, 21 insertions, 15 deletions
diff --git a/drivers/i2c/busses/i2c-eg20t.c b/drivers/i2c/busses/i2c-eg20t.c
index ca8877641040..1eb60ca055a3 100644
--- a/drivers/i2c/busses/i2c-eg20t.c
+++ b/drivers/i2c/busses/i2c-eg20t.c
@@ -271,30 +271,36 @@ static inline bool ktime_lt(const ktime_t cmp1, const ktime_t cmp2)
271/** 271/**
272 * pch_i2c_wait_for_bus_idle() - check the status of bus. 272 * pch_i2c_wait_for_bus_idle() - check the status of bus.
273 * @adap: Pointer to struct i2c_algo_pch_data. 273 * @adap: Pointer to struct i2c_algo_pch_data.
274 * @timeout: waiting time counter (us). 274 * @timeout: waiting time counter (ms).
275 */ 275 */
276static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap, 276static s32 pch_i2c_wait_for_bus_idle(struct i2c_algo_pch_data *adap,
277 s32 timeout) 277 s32 timeout)
278{ 278{
279 void __iomem *p = adap->pch_base_address; 279 void __iomem *p = adap->pch_base_address;
280 ktime_t ns_val; 280 int schedule = 0;
281 unsigned long end = jiffies + msecs_to_jiffies(timeout);
282
283 while (ioread32(p + PCH_I2CSR) & I2CMBB_BIT) {
284 if (time_after(jiffies, end)) {
285 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR));
286 pch_err(adap, "%s: Timeout Error.return%d\n",
287 __func__, -ETIME);
288 pch_i2c_init(adap);
281 289
282 if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0) 290 return -ETIME;
283 return 0; 291 }
284 292
285 /* MAX timeout value is timeout*1000*1000nsec */ 293 if (!schedule)
286 ns_val = ktime_add_ns(ktime_get(), timeout*1000*1000); 294 /* Retry after some usecs */
287 do { 295 udelay(5);
288 msleep(20); 296 else
289 if ((ioread32(p + PCH_I2CSR) & I2CMBB_BIT) == 0) 297 /* Wait a bit more without consuming CPU */
290 return 0; 298 usleep_range(20, 1000);
291 } while (ktime_lt(ktime_get(), ns_val));
292 299
293 pch_dbg(adap, "I2CSR = %x\n", ioread32(p + PCH_I2CSR)); 300 schedule = 1;
294 pch_err(adap, "%s: Timeout Error.return%d\n", __func__, -ETIME); 301 }
295 pch_i2c_init(adap);
296 302
297 return -ETIME; 303 return 0;
298} 304}
299 305
300/** 306/**