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authorMagnus Damm <damm+renesas@opensource.se>2014-06-06 03:20:54 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-06-26 03:01:24 -0400
commit07ce9dfaf477e0d16d40faea251898d5a38d8051 (patch)
treecc98e7222eda2f34ce705e10f8e0c149edc7d8e7
parent0d77c9aa7a13a9fcfc93836188474f43394ea657 (diff)
ARM: shmobile: Move r8a7790 reset code to pm-r8a7790.c
Move r8a7790 specific reset vector setup code from the SMP glue code to PM code. This makes the code one step closer to allow PM operations such as Suspend-to-RAM in the case when SMP is disabled in the kernel config. Signed-off-by: Magnus Damm <damm+renesas@opensource.se> [horms+renesas@verge.net.au: updated for recent #include changes] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r--arch/arm/mach-shmobile/pm-r8a7790.c40
-rw-r--r--arch/arm/mach-shmobile/smp-r8a7790.c30
2 files changed, 38 insertions, 32 deletions
diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c
index 0f1090d851e7..4289b38201a8 100644
--- a/arch/arm/mach-shmobile/pm-r8a7790.c
+++ b/arch/arm/mach-shmobile/pm-r8a7790.c
@@ -11,10 +11,22 @@
11 */ 11 */
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/smp.h>
14#include <asm/io.h> 15#include <asm/io.h>
15#include <mach/r8a7790.h> 16#include <mach/r8a7790.h>
17#include "common.h"
16#include "pm-rcar.h" 18#include "pm-rcar.h"
17 19
20/* RST */
21#define RST 0xe6160000
22#define CA15BAR 0x0020
23#define CA7BAR 0x0030
24#define CA15RESCNT 0x0040
25#define CA7RESCNT 0x0044
26
27/* On-chip RAM */
28#define MERAM 0xe8080000
29
18/* SYSC */ 30/* SYSC */
19#define SYSCIER 0x0c 31#define SYSCIER 0x0c
20#define SYSCIMR 0x10 32#define SYSCIMR 0x10
@@ -38,8 +50,32 @@ static inline void r8a7790_sysc_init(void) {}
38 50
39void __init r8a7790_pm_init(void) 51void __init r8a7790_pm_init(void)
40{ 52{
53 void __iomem *p;
54 u32 bar;
41 static int once; 55 static int once;
42 56
43 if (!once++) 57 if (once++)
44 r8a7790_sysc_init(); 58 return;
59
60 /* MERAM for jump stub, because BAR requires 256KB aligned address */
61 p = ioremap_nocache(MERAM, shmobile_boot_size);
62 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
63 iounmap(p);
64
65 /* setup reset vectors */
66 p = ioremap_nocache(RST, 0x63);
67 bar = (MERAM >> 8) & 0xfffffc00;
68 writel_relaxed(bar, p + CA15BAR);
69 writel_relaxed(bar, p + CA7BAR);
70 writel_relaxed(bar | 0x10, p + CA15BAR);
71 writel_relaxed(bar | 0x10, p + CA7BAR);
72
73 /* de-assert reset for all CPUs */
74 writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
75 p + CA15RESCNT);
76 writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
77 p + CA7RESCNT);
78 iounmap(p);
79
80 r8a7790_sysc_init();
45} 81}
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index 7590e2b6e2fa..81ba90650bb2 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -22,13 +22,6 @@
22#include "common.h" 22#include "common.h"
23#include "pm-rcar.h" 23#include "pm-rcar.h"
24 24
25#define RST 0xe6160000
26#define CA15BAR 0x0020
27#define CA7BAR 0x0030
28#define CA15RESCNT 0x0040
29#define CA7RESCNT 0x0044
30#define MERAM 0xe8080000
31
32static struct rcar_sysc_ch r8a7790_ca15_scu = { 25static struct rcar_sysc_ch r8a7790_ca15_scu = {
33 .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */ 26 .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
34 .isr_bit = 12, /* CA15-SCU */ 27 .isr_bit = 12, /* CA15-SCU */
@@ -41,32 +34,9 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = {
41 34
42static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) 35static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
43{ 36{
44 void __iomem *p;
45 u32 bar;
46
47 /* let APMU code install data related to shmobile_boot_vector */ 37 /* let APMU code install data related to shmobile_boot_vector */
48 shmobile_smp_apmu_prepare_cpus(max_cpus); 38 shmobile_smp_apmu_prepare_cpus(max_cpus);
49 39
50 /* MERAM for jump stub, because BAR requires 256KB aligned address */
51 p = ioremap_nocache(MERAM, shmobile_boot_size);
52 memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
53 iounmap(p);
54
55 /* setup reset vectors */
56 p = ioremap_nocache(RST, 0x63);
57 bar = (MERAM >> 8) & 0xfffffc00;
58 writel_relaxed(bar, p + CA15BAR);
59 writel_relaxed(bar, p + CA7BAR);
60 writel_relaxed(bar | 0x10, p + CA15BAR);
61 writel_relaxed(bar | 0x10, p + CA7BAR);
62
63 /* enable clocks to all CPUs */
64 writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
65 p + CA15RESCNT);
66 writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
67 p + CA7RESCNT);
68 iounmap(p);
69
70 /* turn on power to SCU */ 40 /* turn on power to SCU */
71 r8a7790_pm_init(); 41 r8a7790_pm_init();
72 shmobile_smp_apmu_suspend_init(); 42 shmobile_smp_apmu_suspend_init();