drm/radeon/hdmi: store info about all AFMT blocks

Introduce special struct radeon_afmt for this purpose.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>

5 files changed, 106 insertions, 7 deletions

diff --git a/drivers/gpu/drm/radeon/r600_reg.h b/drivers/gpu/drm/radeon/r600_reg.h
index c44304ad8bda..2b960cb5c18a 100644
--- a/drivers/gpu/drm/radeon/r600_reg.h
+++ b/drivers/gpu/drm/radeon/r600_reg.h
@@ -156,4 +156,10 @@
 #define R600_AUDIO_PIN_WIDGET_CNTL        0x73d4
 #define R600_AUDIO_STATUS_BITS            0x73d8
 
+#define DCE2_HDMI_OFFSET0               (0x7400 - 0x7400)
+#define DCE2_HDMI_OFFSET1               (0x7700 - 0x7400)
+/* DCE3.2 second instance starts at 0x7800 */
+#define DCE3_HDMI_OFFSET0               (0x7400 - 0x7400)
+#define DCE3_HDMI_OFFSET1               (0x7800 - 0x7400)
+
 #endif
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index a9652be93b66..15bd3b216243 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -1057,12 +1057,6 @@
 #       define AFMT_AZ_FORMAT_WTRIG_ACK      (1 << 29)
 #       define AFMT_AZ_AUDIO_ENABLE_CHG_ACK  (1 << 30)
 
-#define DCE2_HDMI_OFFSET0               (0x7400 - 0x7400)
-#define DCE2_HDMI_OFFSET1               (0x7700 - 0x7400)
-/* DCE3.2 second instance starts at 0x7800 */
-#define DCE3_HDMI_OFFSET0               (0x7400 - 0x7400)
-#define DCE3_HDMI_OFFSET1               (0x7800 - 0x7400)
-
 /*
  * PM4
  */
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 05a4e15f5465..ef9ccb4def4d 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -364,7 +364,6 @@ int r600_audio_rate(struct radeon_device *rdev);
 uint8_t r600_audio_status_bits(struct radeon_device *rdev);
 uint8_t r600_audio_category_code(struct radeon_device *rdev);
 void r600_audio_fini(struct radeon_device *rdev);
-void r600_hdmi_init(struct drm_encoder *encoder);
 int r600_hdmi_buffer_status_changed(struct drm_encoder *encoder);
 void r600_hdmi_update_audio_settings(struct drm_encoder *encoder);
 /* r600 blit */
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 0c6d63bf6f95..da3fe8a68f8d 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -1225,6 +1225,93 @@ void radeon_update_display_priority(struct radeon_device *rdev)
 
 }
 
+/*
+ * Allocate hdmi structs and determine register offsets
+ */
+static void radeon_afmt_init(struct radeon_device *rdev)
+{
+        int i;
+
+        for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++)
+                rdev->mode_info.afmt[i] = NULL;
+
+        if (ASIC_IS_DCE6(rdev)) {
+                /* todo */
+        } else if (ASIC_IS_DCE4(rdev)) {
+                /* DCE4/5 has 6 audio blocks tied to DIG encoders */
+                /* DCE4.1 has 2 audio blocks tied to DIG encoders */
+                rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                if (rdev->mode_info.afmt[0]) {
+                        rdev->mode_info.afmt[0]->offset = EVERGREEN_CRTC0_REGISTER_OFFSET;
+                        rdev->mode_info.afmt[0]->id = 0;
+                }
+                rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                if (rdev->mode_info.afmt[1]) {
+                        rdev->mode_info.afmt[1]->offset = EVERGREEN_CRTC1_REGISTER_OFFSET;
+                        rdev->mode_info.afmt[1]->id = 1;
+                }
+                if (!ASIC_IS_DCE41(rdev)) {
+                        rdev->mode_info.afmt[2] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                        if (rdev->mode_info.afmt[2]) {
+                                rdev->mode_info.afmt[2]->offset = EVERGREEN_CRTC2_REGISTER_OFFSET;
+                                rdev->mode_info.afmt[2]->id = 2;
+                        }
+                        rdev->mode_info.afmt[3] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                        if (rdev->mode_info.afmt[3]) {
+                                rdev->mode_info.afmt[3]->offset = EVERGREEN_CRTC3_REGISTER_OFFSET;
+                                rdev->mode_info.afmt[3]->id = 3;
+                        }
+                        rdev->mode_info.afmt[4] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                        if (rdev->mode_info.afmt[4]) {
+                                rdev->mode_info.afmt[4]->offset = EVERGREEN_CRTC4_REGISTER_OFFSET;
+                                rdev->mode_info.afmt[4]->id = 4;
+                        }
+                        rdev->mode_info.afmt[5] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                        if (rdev->mode_info.afmt[5]) {
+                                rdev->mode_info.afmt[5]->offset = EVERGREEN_CRTC5_REGISTER_OFFSET;
+                                rdev->mode_info.afmt[5]->id = 5;
+                        }
+                }
+        } else if (ASIC_IS_DCE3(rdev)) {
+                /* DCE3.x has 2 audio blocks tied to DIG encoders */
+                rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                if (rdev->mode_info.afmt[0]) {
+                        rdev->mode_info.afmt[0]->offset = DCE3_HDMI_OFFSET0;
+                        rdev->mode_info.afmt[0]->id = 0;
+                }
+                rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                if (rdev->mode_info.afmt[1]) {
+                        rdev->mode_info.afmt[1]->offset = DCE3_HDMI_OFFSET1;
+                        rdev->mode_info.afmt[1]->id = 1;
+                }
+        } else if (ASIC_IS_DCE2(rdev)) {
+                /* DCE2 has at least 1 routable audio block */
+                rdev->mode_info.afmt[0] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                if (rdev->mode_info.afmt[0]) {
+                        rdev->mode_info.afmt[0]->offset = DCE2_HDMI_OFFSET0;
+                        rdev->mode_info.afmt[0]->id = 0;
+                }
+                /* r6xx has 2 routable audio blocks */
+                if (rdev->family >= CHIP_R600) {
+                        rdev->mode_info.afmt[1] = kzalloc(sizeof(struct radeon_afmt), GFP_KERNEL);
+                        if (rdev->mode_info.afmt[1]) {
+                                rdev->mode_info.afmt[1]->offset = DCE2_HDMI_OFFSET1;
+                                rdev->mode_info.afmt[1]->id = 1;
+                        }
+                }
+        }
+}
+
+static void radeon_afmt_fini(struct radeon_device *rdev)
+{
+        int i;
+
+        for (i = 0; i < RADEON_MAX_AFMT_BLOCKS; i++) {
+                kfree(rdev->mode_info.afmt[i]);
+                rdev->mode_info.afmt[i] = NULL;
+        }
+}
+
 int radeon_modeset_init(struct radeon_device *rdev)
 {
         int i;
@@ -1285,6 +1372,9 @@ int radeon_modeset_init(struct radeon_device *rdev)
         /* initialize hpd */
         radeon_hpd_init(rdev);
 
+        /* setup afmt */
+        radeon_afmt_init(rdev);
+
         /* Initialize power management */
         radeon_pm_init(rdev);
 
@@ -1301,6 +1391,7 @@ void radeon_modeset_fini(struct radeon_device *rdev)
         radeon_pm_fini(rdev);
 
         if (rdev->mode_info.mode_config_initialized) {
+                radeon_afmt_fini(rdev);
                 drm_kms_helper_poll_fini(rdev->ddev);
                 radeon_hpd_fini(rdev);
                 drm_mode_config_cleanup(rdev->ddev);
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 499a5fed8b26..9583e953d30b 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -220,12 +220,20 @@ enum radeon_dvo_chip {
 
 struct radeon_fbdev;
 
+struct radeon_afmt {
+        bool enabled;