diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2011-06-06 21:02:38 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2011-06-23 01:59:39 -0400 |
commit | 07533ea549e725360209f958bb916085f18ff5b9 (patch) | |
tree | 2ed2b1c9f97f7712f1edf94afcc60ef73e7d3290 | |
parent | d2f96666c56a501c5b74c645d81918b7805d46ce (diff) |
drm/nouveau: convert some bo.offset use to vma.offset
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bo.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_channel.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_dma.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_gem.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_fbcon.c | 4 |
5 files changed, 9 insertions, 7 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index a04998492bb9..46c0914991dc 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -138,8 +138,6 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan, | |||
138 | } | 138 | } |
139 | nvbo->channel = NULL; | 139 | nvbo->channel = NULL; |
140 | 140 | ||
141 | if (nvbo->vma.node) | ||
142 | nvbo->bo.offset = nvbo->vma.offset; | ||
143 | *pnvbo = nvbo; | 141 | *pnvbo = nvbo; |
144 | return 0; | 142 | return 0; |
145 | } | 143 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 23bd0c4f70b1..d199097b8918 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -64,7 +64,7 @@ nouveau_channel_pushbuf_init(struct nouveau_channel *chan) | |||
64 | NV_MEM_TARGET_VM, | 64 | NV_MEM_TARGET_VM, |
65 | &chan->pushbuf); | 65 | &chan->pushbuf); |
66 | } | 66 | } |
67 | chan->pushbuf_base = chan->pushbuf_bo->bo.offset; | 67 | chan->pushbuf_base = chan->pushbuf_bo->vma.offset; |
68 | } else | 68 | } else |
69 | if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_TT) { | 69 | if (chan->pushbuf_bo->bo.mem.mem_type == TTM_PL_TT) { |
70 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0, | 70 | ret = nouveau_gpuobj_dma_new(chan, NV_CLASS_DMA_IN_MEMORY, 0, |
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c index 568caedd7216..4b294295f5e0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_dma.c +++ b/drivers/gpu/drm/nouveau/nouveau_dma.c | |||
@@ -167,7 +167,7 @@ nv50_dma_push(struct nouveau_channel *chan, struct nouveau_bo *bo, | |||
167 | int delta, int length) | 167 | int delta, int length) |
168 | { | 168 | { |
169 | struct nouveau_bo *pb = chan->pushbuf_bo; | 169 | struct nouveau_bo *pb = chan->pushbuf_bo; |
170 | uint64_t offset = bo->bo.offset + delta; | 170 | uint64_t offset = bo->vma.offset + delta; |
171 | int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base; | 171 | int ip = (chan->dma.ib_put * 2) + chan->dma.ib_base; |
172 | 172 | ||
173 | BUG_ON(chan->dma.ib_free < 1); | 173 | BUG_ON(chan->dma.ib_free < 1); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index da3c8bbd9d8f..d314f34f39d6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c | |||
@@ -125,6 +125,7 @@ nouveau_gem_new(struct drm_device *dev, int size, int align, uint32_t domain, | |||
125 | static int | 125 | static int |
126 | nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep) | 126 | nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep) |
127 | { | 127 | { |
128 | struct drm_nouveau_private *dev_priv = gem->dev->dev_private; | ||
128 | struct nouveau_bo *nvbo = nouveau_gem_object(gem); | 129 | struct nouveau_bo *nvbo = nouveau_gem_object(gem); |
129 | 130 | ||
130 | if (nvbo->bo.mem.mem_type == TTM_PL_TT) | 131 | if (nvbo->bo.mem.mem_type == TTM_PL_TT) |
@@ -133,7 +134,10 @@ nouveau_gem_info(struct drm_gem_object *gem, struct drm_nouveau_gem_info *rep) | |||
133 | rep->domain = NOUVEAU_GEM_DOMAIN_VRAM; | 134 | rep->domain = NOUVEAU_GEM_DOMAIN_VRAM; |
134 | 135 | ||
135 | rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT; | 136 | rep->size = nvbo->bo.mem.num_pages << PAGE_SHIFT; |
136 | rep->offset = nvbo->bo.offset; | 137 | if (dev_priv->card_type < NV_50) |
138 | rep->offset = nvbo->bo.offset; | ||
139 | else | ||
140 | rep->offset = nvbo->vma.offset; | ||
137 | rep->map_handle = nvbo->bo.addr_space_offset; | 141 | rep->map_handle = nvbo->bo.addr_space_offset; |
138 | rep->tile_mode = nvbo->tile_mode; | 142 | rep->tile_mode = nvbo->tile_mode; |
139 | rep->tile_flags = nvbo->tile_flags; | 143 | rep->tile_flags = nvbo->tile_flags; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_fbcon.c b/drivers/gpu/drm/nouveau/nvc0_fbcon.c index fa5d4c234383..4606398858ed 100644 --- a/drivers/gpu/drm/nouveau/nvc0_fbcon.c +++ b/drivers/gpu/drm/nouveau/nvc0_fbcon.c | |||
@@ -203,8 +203,8 @@ nvc0_fbcon_accel_init(struct fb_info *info) | |||
203 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0000, 1); | 203 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0000, 1); |
204 | OUT_RING (chan, 0x0000902d); | 204 | OUT_RING (chan, 0x0000902d); |
205 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0104, 2); | 205 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0104, 2); |
206 | OUT_RING (chan, upper_32_bits(chan->notifier_bo->bo.offset)); | 206 | OUT_RING (chan, upper_32_bits(chan->notifier_bo->vma.offset)); |
207 | OUT_RING (chan, lower_32_bits(chan->notifier_bo->bo.offset)); | 207 | OUT_RING (chan, lower_32_bits(chan->notifier_bo->vma.offset)); |
208 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0290, 1); | 208 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0290, 1); |
209 | OUT_RING (chan, 0); | 209 | OUT_RING (chan, 0); |
210 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0888, 1); | 210 | BEGIN_NVC0(chan, 2, NvSub2D, 0x0888, 1); |