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authorLinus Walleij <linus.walleij@stericsson.com>2010-08-09 08:07:36 -0400
committerDan Williams <dan.j.williams@intel.com>2010-09-22 17:53:44 -0400
commit0747c7bae5c93377f4ea81b55d6851eaddc677fe (patch)
treea41c0c974e2f15ba35b0e171cdfa1c817d8c9a92
parentb30a3f6257ed2105259b404d419b4964e363928c (diff)
DMAENGINE: ste_dma40: config checks
Added various configuration checks. Signed-off-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-rw-r--r--arch/arm/plat-nomadik/include/plat/ste_dma40.h2
-rw-r--r--drivers/dma/ste_dma40.c29
2 files changed, 28 insertions, 3 deletions
diff --git a/arch/arm/plat-nomadik/include/plat/ste_dma40.h b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
index 5fbde4b8dc12..ee5d8b2e46dd 100644
--- a/arch/arm/plat-nomadik/include/plat/ste_dma40.h
+++ b/arch/arm/plat-nomadik/include/plat/ste_dma40.h
@@ -98,7 +98,7 @@ struct stedma40_half_channel_info {
98}; 98};
99 99
100enum stedma40_xfer_dir { 100enum stedma40_xfer_dir {
101 STEDMA40_MEM_TO_MEM, 101 STEDMA40_MEM_TO_MEM = 1,
102 STEDMA40_MEM_TO_PERIPH, 102 STEDMA40_MEM_TO_PERIPH,
103 STEDMA40_PERIPH_TO_MEM, 103 STEDMA40_PERIPH_TO_MEM,
104 STEDMA40_PERIPH_TO_PERIPH 104 STEDMA40_PERIPH_TO_PERIPH
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index 17e2600a00cf..df2e1a30ee7e 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -981,14 +981,39 @@ static int d40_validate_conf(struct d40_chan *d40c,
981 bool is_log = (conf->channel_type & STEDMA40_CHANNEL_IN_OPER_MODE) 981 bool is_log = (conf->channel_type & STEDMA40_CHANNEL_IN_OPER_MODE)
982 == STEDMA40_CHANNEL_IN_LOG_MODE; 982 == STEDMA40_CHANNEL_IN_LOG_MODE;
983 983
984 if (d40c->dma_cfg.dir == STEDMA40_MEM_TO_PERIPH && 984 if (!conf->dir) {
985 dev_err(&d40c->chan.dev->device, "[%s] Invalid direction.\n",
986 __func__);
987 res = -EINVAL;
988 }
989
990 if (conf->dst_dev_type != STEDMA40_DEV_DST_MEMORY &&
991 d40c->base->plat_data->dev_tx[conf->dst_dev_type] == 0 &&
992 d40c->runtime_addr == 0) {
993
994 dev_err(&d40c->chan.dev->device,
995 "[%s] Invalid TX channel address (%d)\n",
996 __func__, conf->dst_dev_type);
997 res = -EINVAL;
998 }
999
1000 if (conf->src_dev_type != STEDMA40_DEV_SRC_MEMORY &&
1001 d40c->base->plat_data->dev_rx[conf->src_dev_type] == 0 &&
1002 d40c->runtime_addr == 0) {
1003 dev_err(&d40c->chan.dev->device,
1004 "[%s] Invalid RX channel address (%d)\n",
1005 __func__, conf->src_dev_type);
1006 res = -EINVAL;
1007 }
1008
1009 if (conf->dir == STEDMA40_MEM_TO_PERIPH &&
985 dst_event_group == STEDMA40_DEV_DST_MEMORY) { 1010 dst_event_group == STEDMA40_DEV_DST_MEMORY) {
986 dev_err(&d40c->chan.dev->device, "[%s] Invalid dst\n", 1011 dev_err(&d40c->chan.dev->device, "[%s] Invalid dst\n",
987 __func__); 1012 __func__);
988 res = -EINVAL; 1013 res = -EINVAL;
989 } 1014 }
990 1015
991 if (d40c->dma_cfg.dir == STEDMA40_PERIPH_TO_MEM && 1016 if (conf->dir == STEDMA40_PERIPH_TO_MEM &&
992 src_event_group == STEDMA40_DEV_SRC_MEMORY) { 1017 src_event_group == STEDMA40_DEV_SRC_MEMORY) {
993 dev_err(&d40c->chan.dev->device, "[%s] Invalid src\n", 1018 dev_err(&d40c->chan.dev->device, "[%s] Invalid src\n",
994 __func__); 1019 __func__);