diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2015-03-15 14:43:14 -0400 |
---|---|---|
committer | Kalle Valo <kvalo@codeaurora.org> | 2015-03-20 03:08:56 -0400 |
commit | 057fcd426e146d0603b7320ea22b8caa24f83b0a (patch) | |
tree | 569c0e02ee6e8d98c9feded0c9fc2c0343e19e5b | |
parent | 080465f27aca1315cf882297cf31a376452fa188 (diff) |
bcma: gpio: use predictable base for all BCM47XX buses
Some BCM47XX SoC routers have LEDs connected to extra PCIe bcma buses.
Handling them in arch code requires predictable GPIO numbers.
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
-rw-r--r-- | drivers/bcma/driver_gpio.c | 23 |
1 files changed, 15 insertions, 8 deletions
diff --git a/drivers/bcma/driver_gpio.c b/drivers/bcma/driver_gpio.c index dce34fb52e27..74ccb02e0f10 100644 --- a/drivers/bcma/driver_gpio.c +++ b/drivers/bcma/driver_gpio.c | |||
@@ -17,6 +17,8 @@ | |||
17 | 17 | ||
18 | #include "bcma_private.h" | 18 | #include "bcma_private.h" |
19 | 19 | ||
20 | #define BCMA_GPIO_MAX_PINS 32 | ||
21 | |||
20 | static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip) | 22 | static inline struct bcma_drv_cc *bcma_gpio_get_cc(struct gpio_chip *chip) |
21 | { | 23 | { |
22 | return container_of(chip, struct bcma_drv_cc, gpio); | 24 | return container_of(chip, struct bcma_drv_cc, gpio); |
@@ -204,6 +206,7 @@ static void bcma_gpio_irq_domain_exit(struct bcma_drv_cc *cc) | |||
204 | 206 | ||
205 | int bcma_gpio_init(struct bcma_drv_cc *cc) | 207 | int bcma_gpio_init(struct bcma_drv_cc *cc) |
206 | { | 208 | { |
209 | struct bcma_bus *bus = cc->core->bus; | ||
207 | struct gpio_chip *chip = &cc->gpio; | 210 | struct gpio_chip *chip = &cc->gpio; |
208 | int err; | 211 | int err; |
209 | 212 | ||
@@ -222,7 +225,7 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) | |||
222 | if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) | 225 | if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) |
223 | chip->of_node = cc->core->dev.of_node; | 226 | chip->of_node = cc->core->dev.of_node; |
224 | #endif | 227 | #endif |
225 | switch (cc->core->bus->chipinfo.id) { | 228 | switch (bus->chipinfo.id) { |
226 | case BCMA_CHIP_ID_BCM5357: | 229 | case BCMA_CHIP_ID_BCM5357: |
227 | case BCMA_CHIP_ID_BCM53572: | 230 | case BCMA_CHIP_ID_BCM53572: |
228 | chip->ngpio = 32; | 231 | chip->ngpio = 32; |
@@ -231,13 +234,17 @@ int bcma_gpio_init(struct bcma_drv_cc *cc) | |||
231 | chip->ngpio = 16; | 234 | chip->ngpio = 16; |
232 | } | 235 | } |
233 | 236 | ||
234 | /* There is just one SoC in one device and its GPIO addresses should be | 237 | /* |
235 | * deterministic to address them more easily. The other buses could get | 238 | * On MIPS we register GPIO devices (LEDs, buttons) using absolute GPIO |
236 | * a random base number. */ | 239 | * pin numbers. We don't have Device Tree there and we can't really use |
237 | if (cc->core->bus->hosttype == BCMA_HOSTTYPE_SOC) | 240 | * relative (per chip) numbers. |
238 | chip->base = 0; | 241 | * So let's use predictable base for BCM47XX and "random" for all other. |
239 | else | 242 | */ |
240 | chip->base = -1; | 243 | #if IS_BUILTIN(CONFIG_BCM47XX) |
244 | chip->base = bus->num * BCMA_GPIO_MAX_PINS; | ||
245 | #else | ||
246 | chip->base = -1; | ||
247 | #endif | ||
241 | 248 | ||
242 | err = bcma_gpio_irq_domain_init(cc); | 249 | err = bcma_gpio_irq_domain_init(cc); |
243 | if (err) | 250 | if (err) |