diff options
| author | Thierry Reding <thierry.reding@gmail.com> | 2013-10-15 11:27:51 -0400 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-10-17 13:30:42 -0400 |
| commit | 05465f4e25c0c37a01a22894220611c58922bb29 (patch) | |
| tree | b0aa0fbd7b9a0fe624b9edd5a9af19e19d1242cd | |
| parent | 0a9375d129d4367883a9914c04cecbd31df1361a (diff) | |
ARM: tegra: Mark Tegra30 display controller compatible with Tegra20
The display controller found on Tegra30 SoCs is backwards-compatible
with the one on Tegra20 SoCs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index 0022c127e1d9..d3d71ab7216a 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi | |||
| @@ -141,7 +141,7 @@ | |||
| 141 | }; | 141 | }; |
| 142 | 142 | ||
| 143 | dc@54200000 { | 143 | dc@54200000 { |
| 144 | compatible = "nvidia,tegra30-dc"; | 144 | compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc"; |
| 145 | reg = <0x54200000 0x00040000>; | 145 | reg = <0x54200000 0x00040000>; |
| 146 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; | 146 | interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; |
| 147 | clocks = <&tegra_car TEGRA30_CLK_DISP1>, | 147 | clocks = <&tegra_car TEGRA30_CLK_DISP1>, |