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authorDmitry Eremin-Solenikov <dbaryshkov@gmail.com>2011-06-23 04:33:52 -0400
committerArtem Bityutskiy <artem.bityutskiy@intel.com>2011-09-11 08:02:13 -0400
commit050f01258319f2d2e66a131b7ddb6b5df5aa3af7 (patch)
treeb2a8c6d8db5c1be836c09332ef48394cb629b29a
parented764db2887aa90efb8c5a5d79775d5d18c26b27 (diff)
mtd: nand: drop edb7312 support
EDB7312 isn't supported by mainline kernel, so drop it now. If the board support will ever be submitted to mainline, one can revert this commit. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
-rw-r--r--drivers/mtd/nand/Kconfig7
-rw-r--r--drivers/mtd/nand/Makefile1
-rw-r--r--drivers/mtd/nand/edb7312.c188
3 files changed, 0 insertions, 196 deletions
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 4c3425235adc..17235d097774 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -83,13 +83,6 @@ config MTD_NAND_DENALI_SCRATCH_REG_ADDR
83 scratch register here to enable this feature. On Intel Moorestown 83 scratch register here to enable this feature. On Intel Moorestown
84 boards, the scratch register is at 0xFF108018. 84 boards, the scratch register is at 0xFF108018.
85 85
86config MTD_NAND_EDB7312
87 tristate "Support for Cirrus Logic EBD7312 evaluation board"
88 depends on ARCH_EDB7312
89 help
90 This enables the driver for the Cirrus Logic EBD7312 evaluation
91 board to access the onboard NAND Flash.
92
93config MTD_NAND_H1900 86config MTD_NAND_H1900
94 tristate "iPAQ H1900 flash" 87 tristate "iPAQ H1900 flash"
95 depends on ARCH_PXA 88 depends on ARCH_PXA
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 5745d831168e..c9334e9af912 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
13obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o 13obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
14obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o 14obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
15obj-$(CONFIG_MTD_NAND_DENALI) += denali.o 15obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
16obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
17obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o 16obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
18obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o 17obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
19obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o 18obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o
diff --git a/drivers/mtd/nand/edb7312.c b/drivers/mtd/nand/edb7312.c
deleted file mode 100644
index 0b1bb91d46a9..000000000000
--- a/drivers/mtd/nand/edb7312.c
+++ /dev/null
@@ -1,188 +0,0 @@
1/*
2 * drivers/mtd/nand/edb7312.c
3 *
4 * Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
5 *
6 * Derived from drivers/mtd/nand/autcpu12.c
7 * Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 *
13 * Overview:
14 * This is a device driver for the NAND flash device found on the
15 * CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
16 * a 64Mibit (8MiB x 8 bits) NAND flash device.
17 */
18
19#include <linux/slab.h>
20#include <linux/module.h>
21#include <linux/init.h>
22#include <linux/mtd/mtd.h>
23#include <linux/mtd/nand.h>
24#include <linux/mtd/partitions.h>
25#include <asm/io.h>
26#include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
27#include <asm/sizes.h>
28#include <asm/hardware/clps7111.h>
29
30/*
31 * MTD structure for EDB7312 board
32 */
33static struct mtd_info *ep7312_mtd = NULL;
34
35/*
36 * Values specific to the EDB7312 board (used with EP7312 processor)
37 */
38#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
39#define EP7312_PXDR 0x0001 /*
40 * IO offset to Port B data register
41 * where the CLE, ALE and NCE pins
42 * are wired to.
43 */
44#define EP7312_PXDDR 0x0041 /*
45 * IO offset to Port B data direction
46 * register so we can control the IO
47 * lines.
48 */
49
50/*
51 * Module stuff
52 */
53
54static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
55static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
56static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
57
58/*
59 * Define static partitions for flash device
60 */
61static struct mtd_partition partition_info[] = {
62 {.name = "EP7312 Nand Flash",
63 .offset = 0,
64 .size = 8 * 1024 * 1024}
65};
66
67#define NUM_PARTITIONS 1
68
69/*
70 * hardware specific access to control-lines
71 *
72 * NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
73 * NAND_CLE: bit 1 -> bit 4
74 * NAND_ALE: bit 2 -> bit 5
75 */
76static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
77{
78 struct nand_chip *chip = mtd->priv;
79
80 if (ctrl & NAND_CTRL_CHANGE) {
81 unsigned char bits = 0x80;
82
83 bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
84 bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
85
86 clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
87 ep7312_pxdr);
88 }
89 if (cmd != NAND_CMD_NONE)
90 writeb(cmd, chip->IO_ADDR_W);
91}
92
93/*
94 * read device ready pin
95 */
96static int ep7312_device_ready(struct mtd_info *mtd)
97{
98 return 1;
99}
100
101/*
102 * Main initialization routine
103 */
104static int __init ep7312_init(void)
105{
106 struct nand_chip *this;
107 void __iomem *ep7312_fio_base;
108
109 /* Allocate memory for MTD device structure and private data */
110 ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
111 if (!ep7312_mtd) {
112 printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
113 return -ENOMEM;
114 }
115
116 /* map physical address */
117 ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
118 if (!ep7312_fio_base) {
119 printk("ioremap EDB7312 NAND flash failed\n");
120 kfree(ep7312_mtd);
121 return -EIO;
122 }
123
124 /* Get pointer to private data */
125 this = (struct nand_chip *)(&ep7312_mtd[1]);
126
127 /* Initialize structures */
128 memset(ep7312_mtd, 0, sizeof(struct mtd_info));
129 memset(this, 0, sizeof(struct nand_chip));
130
131 /* Link the private data with the MTD structure */
132 ep7312_mtd->priv = this;
133 ep7312_mtd->owner = THIS_MODULE;
134
135 /*
136 * Set GPIO Port B control register so that the pins are configured
137 * to be outputs for controlling the NAND flash.
138 */
139 clps_writeb(0xf0, ep7312_pxddr);
140
141 /* insert callbacks */
142 this->IO_ADDR_R = ep7312_fio_base;
143 this->IO_ADDR_W = ep7312_fio_base;
144 this->cmd_ctrl = ep7312_hwcontrol;
145 this->dev_ready = ep7312_device_ready;
146 /* 15 us command delay time */
147 this->chip_delay = 15;
148
149 /* Scan to find existence of the device */
150 if (nand_scan(ep7312_mtd, 1)) {
151 iounmap((void *)ep7312_fio_base);
152 kfree(ep7312_mtd);
153 return -ENXIO;
154 }
155 ep7312_mtd->name = "edb7312-nand";
156
157 /* Register the partitions */
158 mtd_device_register(ep7312_mtd, NULL, 0,
159 partition_info, NUM_PARTITIONS);
160
161 /* Return happy */
162 return 0;
163}
164
165module_init(ep7312_init);
166
167/*
168 * Clean up routine
169 */
170static void __exit ep7312_cleanup(void)
171{
172 struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
173
174 /* Release resources, unregister device */
175 nand_release(ap7312_mtd);
176
177 /* Release io resource */
178 iounmap(this->IO_ADDR_R);
179
180 /* Free the MTD device structure */
181 kfree(ep7312_mtd);
182}
183
184module_exit(ep7312_cleanup);
185
186MODULE_LICENSE("GPL");
187MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
188MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");