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authorMaxime Ripard <maxime.ripard@free-electrons.com>2014-07-10 17:53:40 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2014-09-27 02:58:02 -0400
commit03e29bbf40ed87657795c774c80449bb86a55415 (patch)
tree6774d497b4b17ad9bc3c242e9627c1e9363a2fbd
parent601da9d0a54c0fea7f5a208bc107d7ef1de4f570 (diff)
clk: sunxi: Introduce mbus compatible
Even though the mbus clock is a regular module clock, given its nature, it needs to be enabled all the time. Introduce a new compatible, to differentiate it from the other module clocks. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Hans de Goede <hdegoede@redhat.com>
-rw-r--r--Documentation/devicetree/bindings/clock/sunxi.txt1
-rw-r--r--drivers/clk/sunxi/clk-sunxi.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index d3a5c3c6d677..b938a990602a 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -46,6 +46,7 @@ Required properties:
46 "allwinner,sun6i-a31-apb2-div-clk" - for the APB2 gates on A31 46 "allwinner,sun6i-a31-apb2-div-clk" - for the APB2 gates on A31
47 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31 47 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
48 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23 48 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
49 "allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
49 "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks 50 "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks
50 "allwinner,sun7i-a20-out-clk" - for the external output clocks 51 "allwinner,sun7i-a20-out-clk" - for the external output clocks
51 "allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31 52 "allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 393df321010b..17e1e3bec954 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -1119,6 +1119,7 @@ static const struct of_device_id clk_factors_match[] __initconst = {
1119 {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,}, 1119 {.compatible = "allwinner,sun7i-a20-pll4-clk", .data = &sun7i_a20_pll4_data,},
1120 {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,}, 1120 {.compatible = "allwinner,sun6i-a31-pll6-clk", .data = &sun6i_a31_pll6_data,},
1121 {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,}, 1121 {.compatible = "allwinner,sun4i-a10-apb1-clk", .data = &sun4i_apb1_data,},
1122 {.compatible = "allwinner,sun5i-a13-mbus-clk", .data = &sun4i_mod0_data,},
1122 {.compatible = "allwinner,sun4i-a10-mod0-clk", .data = &sun4i_mod0_data,}, 1123 {.compatible = "allwinner,sun4i-a10-mod0-clk", .data = &sun4i_mod0_data,},
1123 {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,}, 1124 {.compatible = "allwinner,sun7i-a20-out-clk", .data = &sun7i_a20_out_data,},
1124 {} 1125 {}