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authorTomi Valkeinen <tomi.valkeinen@ti.com>2014-10-16 08:31:38 -0400
committerTomi Valkeinen <tomi.valkeinen@ti.com>2014-11-12 06:40:26 -0500
commit03aafa2cd84e6406ce3ceedca245a6a731f9b77b (patch)
treea1a72e150af63f1bd55507e30c330853dd7d15de
parentb0295f165f0a9e1bde4f4592df04e85a28be2ce3 (diff)
OMAPDSS: HDMI: store WP pointer to hdmi_pll_data
HDMI PLL code needs the pointer to the WP block so that it can manage its power. Currently this is passed as a function parameter to hdmi_pll_enable and hdmi_pll_disable. To make the PLL function adhere to the DSS PLL API, we need to remove the WP parameter. This patch stores the WP pointer to hdmi_pll_data in hdmi_pll_init, so that it's available when needed. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi.h9
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi4.c8
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi5.c8
-rw-r--r--drivers/video/fbdev/omap2/dss/hdmi_pll.c12
4 files changed, 23 insertions, 14 deletions
diff --git a/drivers/video/fbdev/omap2/dss/hdmi.h b/drivers/video/fbdev/omap2/dss/hdmi.h
index 4b9bf0804a48..03761ecb81a6 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi.h
+++ b/drivers/video/fbdev/omap2/dss/hdmi.h
@@ -248,6 +248,8 @@ struct hdmi_wp_data {
248struct hdmi_pll_data { 248struct hdmi_pll_data {
249 void __iomem *base; 249 void __iomem *base;
250 250
251 struct hdmi_wp_data *wp;
252
251 struct hdmi_pll_info info; 253 struct hdmi_pll_info info;
252}; 254};
253 255
@@ -312,12 +314,13 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
312int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp); 314int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp);
313 315
314/* HDMI PLL funcs */ 316/* HDMI PLL funcs */
315int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp); 317int hdmi_pll_enable(struct hdmi_pll_data *pll);
316void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp); 318void hdmi_pll_disable(struct hdmi_pll_data *pll);
317void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s); 319void hdmi_pll_dump(struct hdmi_pll_data *pll, struct seq_file *s);
318void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin, 320void hdmi_pll_compute(struct hdmi_pll_data *pll, unsigned long clkin,
319 unsigned long target_tmds); 321 unsigned long target_tmds);
320int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll); 322int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
323 struct hdmi_wp_data *wp);
321 324
322/* HDMI PHY funcs */ 325/* HDMI PHY funcs */
323int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk, 326int hdmi_phy_configure(struct hdmi_phy_data *phy, unsigned long hfbitclk,
diff --git a/drivers/video/fbdev/omap2/dss/hdmi4.c b/drivers/video/fbdev/omap2/dss/hdmi4.c
index 1f2fbccaff1f..2094b6eae99e 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi4.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi4.c
@@ -197,7 +197,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
197 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock); 197 hdmi_pll_compute(&hdmi.pll, clk_get_rate(hdmi.sys_clk), p->pixelclock);
198 198
199 /* config the PLL and PHY hdmi_set_pll_pwrfirst */ 199 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
200 r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp); 200 r = hdmi_pll_enable(&hdmi.pll);
201 if (r) { 201 if (r) {
202 DSSDBG("Failed to lock PLL\n"); 202 DSSDBG("Failed to lock PLL\n");
203 goto err_pll_enable; 203 goto err_pll_enable;
@@ -241,7 +241,7 @@ err_vid_enable:
241err_phy_cfg: 241err_phy_cfg:
242 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 242 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
243err_phy_pwr: 243err_phy_pwr:
244 hdmi_pll_disable(&hdmi.pll, &hdmi.wp); 244 hdmi_pll_disable(&hdmi.pll);
245err_pll_enable: 245err_pll_enable:
246 hdmi_power_off_core(dssdev); 246 hdmi_power_off_core(dssdev);
247 return -EIO; 247 return -EIO;
@@ -259,7 +259,7 @@ static void hdmi_power_off_full(struct omap_dss_device *dssdev)
259 259
260 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 260 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
261 261
262 hdmi_pll_disable(&hdmi.pll, &hdmi.wp); 262 hdmi_pll_disable(&hdmi.pll);
263 263
264 hdmi_power_off_core(dssdev); 264 hdmi_power_off_core(dssdev);
265} 265}
@@ -688,7 +688,7 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
688 if (r) 688 if (r)
689 return r; 689 return r;
690 690
691 r = hdmi_pll_init(pdev, &hdmi.pll); 691 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
692 if (r) 692 if (r)
693 return r; 693 return r;
694 694
diff --git a/drivers/video/fbdev/omap2/dss/hdmi5.c b/drivers/video/fbdev/omap2/dss/hdmi5.c
index e8ca9106c8af..fb8c14507a4d 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi5.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi5.c
@@ -215,7 +215,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
215 hdmi_wp_get_irqstatus(&hdmi.wp)); 215 hdmi_wp_get_irqstatus(&hdmi.wp));
216 216
217 /* config the PLL and PHY hdmi_set_pll_pwrfirst */ 217 /* config the PLL and PHY hdmi_set_pll_pwrfirst */
218 r = hdmi_pll_enable(&hdmi.pll, &hdmi.wp); 218 r = hdmi_pll_enable(&hdmi.pll);
219 if (r) { 219 if (r) {
220 DSSDBG("Failed to lock PLL\n"); 220 DSSDBG("Failed to lock PLL\n");
221 goto err_pll_enable; 221 goto err_pll_enable;
@@ -259,7 +259,7 @@ err_vid_enable:
259 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 259 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
260err_phy_pwr: 260err_phy_pwr:
261err_phy_cfg: 261err_phy_cfg:
262 hdmi_pll_disable(&hdmi.pll, &hdmi.wp); 262 hdmi_pll_disable(&hdmi.pll);
263err_pll_enable: 263err_pll_enable:
264 hdmi_power_off_core(dssdev); 264 hdmi_power_off_core(dssdev);
265 return -EIO; 265 return -EIO;
@@ -277,7 +277,7 @@ static void hdmi_power_off_full(struct omap_dss_device *dssdev)
277 277
278 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF); 278 hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
279 279
280 hdmi_pll_disable(&hdmi.pll, &hdmi.wp); 280 hdmi_pll_disable(&hdmi.pll);
281 281
282 hdmi_power_off_core(dssdev); 282 hdmi_power_off_core(dssdev);
283} 283}
@@ -717,7 +717,7 @@ static int omapdss_hdmihw_probe(struct platform_device *pdev)
717 if (r) 717 if (r)
718 return r; 718 return r;
719 719
720 r = hdmi_pll_init(pdev, &hdmi.pll); 720 r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
721 if (r) 721 if (r)
722 return r; 722 return r;
723 723
diff --git a/drivers/video/fbdev/omap2/dss/hdmi_pll.c b/drivers/video/fbdev/omap2/dss/hdmi_pll.c
index 0942bdc8dfa6..190bede1dcb9 100644
--- a/drivers/video/fbdev/omap2/dss/hdmi_pll.c
+++ b/drivers/video/fbdev/omap2/dss/hdmi_pll.c
@@ -166,8 +166,9 @@ static int hdmi_pll_config(struct hdmi_pll_data *pll)
166 return 0; 166 return 0;
167} 167}
168 168
169int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) 169int hdmi_pll_enable(struct hdmi_pll_data *pll)
170{ 170{
171 struct hdmi_wp_data *wp = pll->wp;
171 u16 r = 0; 172 u16 r = 0;
172 173
173 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); 174 r = hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
@@ -185,8 +186,10 @@ int hdmi_pll_enable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp)
185 return 0; 186 return 0;
186} 187}
187 188
188void hdmi_pll_disable(struct hdmi_pll_data *pll, struct hdmi_wp_data *wp) 189void hdmi_pll_disable(struct hdmi_pll_data *pll)
189{ 190{
191 struct hdmi_wp_data *wp = pll->wp;
192
190 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF); 193 hdmi_wp_set_pll_pwr(wp, HDMI_PLLPWRCMD_ALLOFF);
191} 194}
192 195
@@ -245,11 +248,14 @@ static int hdmi_pll_init_features(struct platform_device *pdev)
245 return 0; 248 return 0;
246} 249}
247 250
248int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll) 251int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
252 struct hdmi_wp_data *wp)
249{ 253{
250 int r; 254 int r;
251 struct resource *res; 255 struct resource *res;
252 256
257 pll->wp = wp;
258
253 r = hdmi_pll_init_features(pdev); 259 r = hdmi_pll_init_features(pdev);
254 if (r) 260 if (r)
255 return r; 261 return r;