arm64: head: match all affinity levels in the pen of the secondaries

The reg property of the cpu nodes in the DT now contains all the
affinity levels in (MPIDR[39:32] and MPIDR[23:0]) and that's what
boot_secondary() writes in the pen, so increase the mask in
secondary_holding_pen accordingly.

Signed-off-by: Javi Merino <javi.merino@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>

2 files changed, 7 insertions, 1 deletions

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index 3780b2e7f88f..cf2749488cd4 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -42,6 +42,8 @@
 #define ARM_CPU_PART_FOUNDATION 0xD000
 #define ARM_CPU_PART_CORTEX_A57 0xD070
 
+#ifndef __ASSEMBLY__
+
 /*
  * The CPU ID never changes at run time, so we might as well tell the
  * compiler that it's constant.  Use this function to read the CPU ID
@@ -72,4 +74,6 @@ static inline u32 __attribute_const__ read_cpuid_cachetype(void)
         return read_cpuid(ID_CTR_EL0);
 }
 
+#endif /* __ASSEMBLY__ */
+
 #endif
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 0a0a49756826..53dcae49e729 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -26,6 +26,7 @@
 #include <asm/assembler.h>
 #include <asm/ptrace.h>
 #include <asm/asm-offsets.h>
+#include <asm/cputype.h>
 #include <asm/memory.h>
 #include <asm/thread_info.h>
 #include <asm/pgtable-hwdef.h>
@@ -229,7 +230,8 @@ ENTRY(secondary_holding_pen)
         bl      __calc_phys_offset              // x24=phys offset
         bl      el2_setup                       // Drop to EL1
         mrs     x0, mpidr_el1
-        and     x0, x0, #15                     // CPU number
+        ldr     x1, =MPIDR_HWID_BITMASK
+        and     x0, x0, x1
         adr     x1, 1b
         ldp     x2, x3, [x1]
         sub     x1, x1, x2