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authorOlof Johansson <olof@lixom.net>2012-11-21 04:18:33 -0500
committerOlof Johansson <olof@lixom.net>2012-11-21 04:18:57 -0500
commit02d1ea0d143327ffec9bcd9a2d5edf95adb694a9 (patch)
tree8c227d8c55a6e64fe9fd64f8a90c600443a53fea
parentf09771bcd29770a763980439ff0ac4fbbaf691e6 (diff)
parentcece5c4009355323c6f453ef6814e7dd85a0f896 (diff)
Merge branch 'ste-dt-for-next' of git://git.linaro.org/people/ljones/linux-3.0-ux500 into next/dt
From Lee Jones. It's an update of the previous ux500/dt branch with a few more patches: * 'ste-dt-for-next' of git://git.linaro.org/people/ljones/linux-3.0-ux500: ARM: ux500: Describe UART platform registering issues more accurately ARM: ux500: Enable all MMC devices on the u9540 when booting with DT ARM: ux500: Enable SDI4 port on the u9540 when booting with Device Tree ARM: ux500: Add UART support to the u9540 Device Tree ARM: ux500: Add skeleton DTS file for the u9540 ARM: ux500: Add SDI (MMC) support to the HREF Device Tree ARM: ux500: Move regulator-name properties out to board DTS files Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat
-rw-r--r--arch/arm/boot/dts/hrefv60plus.dts176
-rw-r--r--arch/arm/boot/dts/u9540.dts72
-rw-r--r--arch/arm/mach-ux500/cpu-db8500.c3
3 files changed, 249 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/hrefv60plus.dts b/arch/arm/boot/dts/hrefv60plus.dts
index a01ac8f000d6..55f4191a626e 100644
--- a/arch/arm/boot/dts/hrefv60plus.dts
+++ b/arch/arm/boot/dts/hrefv60plus.dts
@@ -30,5 +30,181 @@
30 reset-gpio = <&gpio4 15 0x4>; 30 reset-gpio = <&gpio4 15 0x4>;
31 }; 31 };
32 }; 32 };
33
34 // External Micro SD slot
35 sdi0_per1@80126000 {
36 arm,primecell-periphid = <0x10480180>;
37 max-frequency = <50000000>;
38 bus-width = <4>;
39 mmc-cap-sd-highspeed;
40 mmc-cap-mmc-highspeed;
41 vmmc-supply = <&ab8500_ldo_aux3_reg>;
42
43 cd-gpios = <&tc3589x_gpio 3 0x4>;
44
45 status = "okay";
46 };
47
48 // WLAN SDIO channel
49 sdi1_per2@80118000 {
50 arm,primecell-periphid = <0x10480180>;
51 max-frequency = <50000000>;
52 bus-width = <4>;
53
54 status = "okay";
55 };
56
57 // PoP:ed eMMC
58 sdi2_per3@80005000 {
59 arm,primecell-periphid = <0x10480180>;
60 max-frequency = <50000000>;
61 bus-width = <8>;
62 mmc-cap-mmc-highspeed;
63
64 status = "okay";
65 };
66
67 // On-board eMMC
68 sdi4_per2@80114000 {
69 arm,primecell-periphid = <0x10480180>;
70 max-frequency = <50000000>;
71 bus-width = <8>;
72 mmc-cap-mmc-highspeed;
73 vmmc-supply = <&ab8500_ldo_aux2_reg>;
74
75 status = "okay";
76 };
77
78 prcmu@80157000 {
79 db8500-prcmu-regulators {
80 db8500_vape_reg: db8500_vape {
81 regulator-name = "db8500-vape";
82 };
83
84 db8500_varm_reg: db8500_varm {
85 regulator-name = "db8500-varm";
86 };
87
88 db8500_vmodem_reg: db8500_vmodem {
89 regulator-name = "db8500-vmodem";
90 };
91
92 db8500_vpll_reg: db8500_vpll {
93 regulator-name = "db8500-vpll";
94 };
95
96 db8500_vsmps1_reg: db8500_vsmps1 {
97 regulator-name = "db8500-vsmps1";
98 };
99
100 db8500_vsmps2_reg: db8500_vsmps2 {
101 regulator-name = "db8500-vsmps2";
102 };
103
104 db8500_vsmps3_reg: db8500_vsmps3 {
105 regulator-name = "db8500-vsmps3";
106 };
107
108 db8500_vrf1_reg: db8500_vrf1 {
109 regulator-name = "db8500-vrf1";
110 };
111
112 db8500_sva_mmdsp_reg: db8500_sva_mmdsp {
113 regulator-name = "db8500-sva-mmdsp";
114 };
115
116 db8500_sva_mmdsp_ret_reg: db8500_sva_mmdsp_ret {
117 regulator-name = "db8500-sva-mmdsp-ret";
118 };
119
120 db8500_sva_pipe_reg: db8500_sva_pipe {
121 regulator-name = "db8500_sva_pipe";
122 };
123
124 db8500_sia_mmdsp_reg: db8500_sia_mmdsp {
125 regulator-name = "db8500_sia_mmdsp";
126 };
127
128 db8500_sia_mmdsp_ret_reg: db8500_sia_mmdsp_ret {
129 regulator-name = "db8500-sia-mmdsp-ret";
130 };
131
132 db8500_sia_pipe_reg: db8500_sia_pipe {
133 regulator-name = "db8500-sia-pipe";
134 };
135
136 db8500_sga_reg: db8500_sga {
137 regulator-name = "db8500-sga";
138 };
139
140 db8500_b2r2_mcde_reg: db8500_b2r2_mcde {
141 regulator-name = "db8500-b2r2-mcde";
142 };
143
144 db8500_esram12_reg: db8500_esram12 {
145 regulator-name = "db8500-esram12";
146 };
147
148 db8500_esram12_ret_reg: db8500_esram12_ret {
149 regulator-name = "db8500-esram12-ret";
150 };
151
152 db8500_esram34_reg: db8500_esram34 {
153 regulator-name = "db8500-esram34";
154 };
155
156 db8500_esram34_ret_reg: db8500_esram34_ret {
157 regulator-name = "db8500-esram34-ret";
158 };
159 };
160
161 ab8500@5 {
162 ab8500-regulators {
163 ab8500_ldo_aux1_reg: ab8500_ldo_aux1 {
164 regulator-name = "V-DISPLAY";
165 };
166
167 ab8500_ldo_aux2_reg: ab8500_ldo_aux2 {
168 regulator-name = "V-eMMC1";
169 };
170
171 ab8500_ldo_aux3_reg: ab8500_ldo_aux3 {
172 regulator-name = "V-MMC-SD";
173 };
174
175 ab8500_ldo_initcore_reg: ab8500_ldo_initcore {
176 regulator-name = "V-INTCORE";
177 };
178
179 ab8500_ldo_tvout_reg: ab8500_ldo_tvout {
180 regulator-name = "V-TVOUT";
181 };
182
183 ab8500_ldo_usb_reg: ab8500_ldo_usb {
184 regulator-name = "dummy";
185 };
186
187 ab8500_ldo_audio_reg: ab8500_ldo_audio {
188 regulator-name = "V-AUD";
189 };
190
191 ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 {
192 regulator-name = "V-AMIC1";
193 };
194
195 ab8500_ldo_amamic2_reg: ab8500_ldo_amamic2 {
196 regulator-name = "V-AMIC2";
197 };
198
199 ab8500_ldo_dmic_reg: ab8500_ldo_dmic {
200 regulator-name = "V-DMIC";
201 };
202
203 ab8500_ldo_ana_reg: ab8500_ldo_ana {
204 regulator-name = "V-CSI/DSI";
205 };
206 };
207 };
208 };
33 }; 209 };
34}; 210};
diff --git a/arch/arm/boot/dts/u9540.dts b/arch/arm/boot/dts/u9540.dts
new file mode 100644
index 000000000000..95892ec6c342
--- /dev/null
+++ b/arch/arm/boot/dts/u9540.dts
@@ -0,0 +1,72 @@
1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "dbx5x0.dtsi"
14
15/ {
16 model = "ST-Ericsson U9540 platform with Device Tree";
17 compatible = "st-ericsson,u9540";
18
19 memory {
20 reg = <0x00000000 0x20000000>;
21 };
22
23 soc-u9500 {
24 uart@80120000 {
25 status = "okay";
26 };
27
28 uart@80121000 {
29 status = "okay";
30 };
31
32 uart@80007000 {
33 status = "okay";
34 };
35
36 // External Micro SD slot
37 sdi0_per1@80126000 {
38 arm,primecell-periphid = <0x10480180>;
39 max-frequency = <100000000>;
40 bus-width = <4>;
41 mmc-cap-sd-highspeed;
42 mmc-cap-mmc-highspeed;
43 vmmc-supply = <&ab8500_ldo_aux3_reg>;
44
45 cd-gpios = <&gpio7 6 0x4>; // 230
46 cd-inverted;
47
48 status = "okay";
49 };
50
51
52 // WLAN SDIO channel
53 sdi1_per2@80118000 {
54 arm,primecell-periphid = <0x10480180>;
55 max-frequency = <50000000>;
56 bus-width = <4>;
57
58 status = "okay";
59 };
60
61 // On-board eMMC
62 sdi4_per2@80114000 {
63 arm,primecell-periphid = <0x10480180>;
64 max-frequency = <100000000>;
65 bus-width = <8>;
66 mmc-cap-mmc-highspeed;
67 vmmc-supply = <&ab8500_ldo_aux2_reg>;
68
69 status = "okay";
70 };
71 };
72};
diff --git a/arch/arm/mach-ux500/cpu-db8500.c b/arch/arm/mach-ux500/cpu-db8500.c
index 4a0c40abf2ab..d2076ce22e97 100644
--- a/arch/arm/mach-ux500/cpu-db8500.c
+++ b/arch/arm/mach-ux500/cpu-db8500.c
@@ -262,11 +262,10 @@ static struct device * __init u8500_of_init_devices(void)
262static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = { 262static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
263 /* Requires call-back bindings. */ 263 /* Requires call-back bindings. */
264 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata), 264 OF_DEV_AUXDATA("arm,cortex-a9-pmu", 0, "arm-pmu", &db8500_pmu_platdata),
265 /* Requires DMA and call-back bindings. */ 265 /* Requires DMA bindings. */
266 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat), 266 OF_DEV_AUXDATA("arm,pl011", 0x80120000, "uart0", &uart0_plat),
267 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat), 267 OF_DEV_AUXDATA("arm,pl011", 0x80121000, "uart1", &uart1_plat),
268 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat), 268 OF_DEV_AUXDATA("arm,pl011", 0x80007000, "uart2", &uart2_plat),
269 /* Requires DMA bindings. */
270 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat), 269 OF_DEV_AUXDATA("arm,pl022", 0x80002000, "ssp0", &ssp0_plat),
271 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data), 270 OF_DEV_AUXDATA("arm,pl18x", 0x80126000, "sdi0", &mop500_sdi0_data),
272 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data), 271 OF_DEV_AUXDATA("arm,pl18x", 0x80118000, "sdi1", &mop500_sdi1_data),
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