MIPS: Don't assume 64-bit FP registers for context switch

When saving or restoring scalar FP context we want to access the least significant 64 bits of each FP register. When the FP registers are 64 bits wide that is trivially the start of the registers value in memory. However when the FP registers are wider this equivalence will no longer be true for big endian systems. Define a new set of offset macros for the least significant 64 bits of each saved FP register within thread context, and make use of them when saving and restoring scalar FP context. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6428/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
author: Paul Burton <paul.burton@imgtec.com> 2014-01-27 10:23:08 -0500
committer: Ralf Baechle <ralf@linux-mips.org> 2014-03-26 18:09:10 -0400
commit: 02987633df7ba2f62967791dda816eb191d1add3 (patch)
tree: fe0763b4b8c5d8eafde7afa9699aa7cbcebd5d08
parent: 72b22bbad1e7cff4645c0f05b4d573ac301d5157 (diff)
3 files changed, 194 insertions, 128 deletions
diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h
index 70e1f176f123..e38c2811d4e2 100644
--- a/arch/mips/include/asm/asmmacro-32.h
+++ b/arch/mips/include/asm/asmmacro-32.h
@@ -14,75 +14,75 @@
        .macro  fpu_save_single thread tmp=t0
        cfc1    \tmp,  fcr31
-        swc1    $f0,  THREAD_FPR0(\thread)
+        swc1    $f0,  THREAD_FPR0_LS64(\thread)
-        swc1    $f1,  THREAD_FPR1(\thread)
+        swc1    $f1,  THREAD_FPR1_LS64(\thread)
-        swc1    $f2,  THREAD_FPR2(\thread)
+        swc1    $f2,  THREAD_FPR2_LS64(\thread)
-        swc1    $f3,  THREAD_FPR3(\thread)
+        swc1    $f3,  THREAD_FPR3_LS64(\thread)
-        swc1    $f4,  THREAD_FPR4(\thread)
+        swc1    $f4,  THREAD_FPR4_LS64(\thread)
-        swc1    $f5,  THREAD_FPR5(\thread)
+        swc1    $f5,  THREAD_FPR5_LS64(\thread)
-        swc1    $f6,  THREAD_FPR6(\thread)
+        swc1    $f6,  THREAD_FPR6_LS64(\thread)
-        swc1    $f7,  THREAD_FPR7(\thread)
+        swc1    $f7,  THREAD_FPR7_LS64(\thread)
-        swc1    $f8,  THREAD_FPR8(\thread)
+        swc1    $f8,  THREAD_FPR8_LS64(\thread)
-        swc1    $f9,  THREAD_FPR9(\thread)
+        swc1    $f9,  THREAD_FPR9_LS64(\thread)
-        swc1    $f10, THREAD_FPR10(\thread)
+        swc1    $f10, THREAD_FPR10_LS64(\thread)
-        swc1    $f11, THREAD_FPR11(\thread)
+        swc1    $f11, THREAD_FPR11_LS64(\thread)
-        swc1    $f12, THREAD_FPR12(\thread)
+        swc1    $f12, THREAD_FPR12_LS64(\thread)
-        swc1    $f13, THREAD_FPR13(\thread)
+        swc1    $f13, THREAD_FPR13_LS64(\thread)
-        swc1    $f14, THREAD_FPR14(\thread)
+        swc1    $f14, THREAD_FPR14_LS64(\thread)
-        swc1    $f15, THREAD_FPR15(\thread)
+        swc1    $f15, THREAD_FPR15_LS64(\thread)
-        swc1    $f16, THREAD_FPR16(\thread)
+        swc1    $f16, THREAD_FPR16_LS64(\thread)
-        swc1    $f17, THREAD_FPR17(\thread)
+        swc1    $f17, THREAD_FPR17_LS64(\thread)
-        swc1    $f18, THREAD_FPR18(\thread)
+        swc1    $f18, THREAD_FPR18_LS64(\thread)
-        swc1    $f19, THREAD_FPR19(\thread)
+        swc1    $f19, THREAD_FPR19_LS64(\thread)
-        swc1    $f20, THREAD_FPR20(\thread)
+        swc1    $f20, THREAD_FPR20_LS64(\thread)
-        swc1    $f21, THREAD_FPR21(\thread)
+        swc1    $f21, THREAD_FPR21_LS64(\thread)
-        swc1    $f22, THREAD_FPR22(\thread)
+        swc1    $f22, THREAD_FPR22_LS64(\thread)
-        swc1    $f23, THREAD_FPR23(\thread)
+        swc1    $f23, THREAD_FPR23_LS64(\thread)
-        swc1    $f24, THREAD_FPR24(\thread)
+        swc1    $f24, THREAD_FPR24_LS64(\thread)
-        swc1    $f25, THREAD_FPR25(\thread)
+        swc1    $f25, THREAD_FPR25_LS64(\thread)
-        swc1    $f26, THREAD_FPR26(\thread)
+        swc1    $f26, THREAD_FPR26_LS64(\thread)
-        swc1    $f27, THREAD_FPR27(\thread)
+        swc1    $f27, THREAD_FPR27_LS64(\thread)
-        swc1    $f28, THREAD_FPR28(\thread)
+        swc1    $f28, THREAD_FPR28_LS64(\thread)
-        swc1    $f29, THREAD_FPR29(\thread)
+        swc1    $f29, THREAD_FPR29_LS64(\thread)
-        swc1    $f30, THREAD_FPR30(\thread)
+        swc1    $f30, THREAD_FPR30_LS64(\thread)
-        swc1    $f31, THREAD_FPR31(\thread)
+        swc1    $f31, THREAD_FPR31_LS64(\thread)
        sw      \tmp, THREAD_FCR31(\thread)
        .endm
        .macro  fpu_restore_single thread tmp=t0
        lw      \tmp, THREAD_FCR31(\thread)
-        lwc1    $f0,  THREAD_FPR0(\thread)
+        lwc1    $f0,  THREAD_FPR0_LS64(\thread)
-        lwc1    $f1,  THREAD_FPR1(\thread)
+        lwc1    $f1,  THREAD_FPR1_LS64(\thread)
-        lwc1    $f2,  THREAD_FPR2(\thread)
+        lwc1    $f2,  THREAD_FPR2_LS64(\thread)
-        lwc1    $f3,  THREAD_FPR3(\thread)
+        lwc1    $f3,  THREAD_FPR3_LS64(\thread)
-        lwc1    $f4,  THREAD_FPR4(\thread)
+        lwc1    $f4,  THREAD_FPR4_LS64(\thread)
-        lwc1    $f5,  THREAD_FPR5(\thread)
+        lwc1    $f5,  THREAD_FPR5_LS64(\thread)
-        lwc1    $f6,  THREAD_FPR6(\thread)
+        lwc1    $f6,  THREAD_FPR6_LS64(\thread)
-        lwc1    $f7,  THREAD_FPR7(\thread)
+        lwc1    $f7,  THREAD_FPR7_LS64(\thread)
-        lwc1    $f8,  THREAD_FPR8(\thread)
+        lwc1    $f8,  THREAD_FPR8_LS64(\thread)
-        lwc1    $f9,  THREAD_FPR9(\thread)
+        lwc1    $f9,  THREAD_FPR9_LS64(\thread)
-        lwc1    $f10, THREAD_FPR10(\thread)
+        lwc1    $f10, THREAD_FPR10_LS64(\thread)
-        lwc1    $f11, THREAD_FPR11(\thread)
+        lwc1    $f11, THREAD_FPR11_LS64(\thread)
-        lwc1    $f12, THREAD_FPR12(\thread)
+        lwc1    $f12, THREAD_FPR12_LS64(\thread)
-        lwc1    $f13, THREAD_FPR13(\thread)
+        lwc1    $f13, THREAD_FPR13_LS64(\thread)
-        lwc1    $f14, THREAD_FPR14(\thread)
+        lwc1    $f14, THREAD_FPR14_LS64(\thread)
-        lwc1    $f15, THREAD_FPR15(\thread)
+        lwc1    $f15, THREAD_FPR15_LS64(\thread)
-        lwc1    $f16, THREAD_FPR16(\thread)
+        lwc1    $f16, THREAD_FPR16_LS64(\thread)
-        lwc1    $f17, THREAD_FPR17(\thread)
+        lwc1    $f17, THREAD_FPR17_LS64(\thread)
-        lwc1    $f18, THREAD_FPR18(\thread)
+        lwc1    $f18, THREAD_FPR18_LS64(\thread)
-        lwc1    $f19, THREAD_FPR19(\thread)
+        lwc1    $f19, THREAD_FPR19_LS64(\thread)
-        lwc1    $f20, THREAD_FPR20(\thread)
+        lwc1    $f20, THREAD_FPR20_LS64(\thread)
-        lwc1    $f21, THREAD_FPR21(\thread)
+        lwc1    $f21, THREAD_FPR21_LS64(\thread)
-        lwc1    $f22, THREAD_FPR22(\thread)
+        lwc1    $f22, THREAD_FPR22_LS64(\thread)
-        lwc1    $f23, THREAD_FPR23(\thread)
+        lwc1    $f23, THREAD_FPR23_LS64(\thread)
-        lwc1    $f24, THREAD_FPR24(\thread)
+        lwc1    $f24, THREAD_FPR24_LS64(\thread)
-        lwc1    $f25, THREAD_FPR25(\thread)
+        lwc1    $f25, THREAD_FPR25_LS64(\thread)
-        lwc1    $f26, THREAD_FPR26(\thread)
+        lwc1    $f26, THREAD_FPR26_LS64(\thread)
-        lwc1    $f27, THREAD_FPR27(\thread)
+        lwc1    $f27, THREAD_FPR27_LS64(\thread)
-        lwc1    $f28, THREAD_FPR28(\thread)
+        lwc1    $f28, THREAD_FPR28_LS64(\thread)
-        lwc1    $f29, THREAD_FPR29(\thread)
+        lwc1    $f29, THREAD_FPR29_LS64(\thread)
-        lwc1    $f30, THREAD_FPR30(\thread)
+        lwc1    $f30, THREAD_FPR30_LS64(\thread)
-        lwc1    $f31, THREAD_FPR31(\thread)
+        lwc1    $f31, THREAD_FPR31_LS64(\thread)
        ctc1    \tmp, fcr31
        .endm
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index ef066b17a650..63cf43472814 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -64,44 +64,44 @@
        .macro  fpu_save_16even thread tmp=t0
        cfc1    \tmp, fcr31
-        sdc1    $f0,  THREAD_FPR0(\thread)
+        sdc1    $f0,  THREAD_FPR0_LS64(\thread)
-        sdc1    $f2,  THREAD_FPR2(\thread)
+        sdc1    $f2,  THREAD_FPR2_LS64(\thread)
-        sdc1    $f4,  THREAD_FPR4(\thread)
+        sdc1    $f4,  THREAD_FPR4_LS64(\thread)
-        sdc1    $f6,  THREAD_FPR6(\thread)
+        sdc1    $f6,  THREAD_FPR6_LS64(\thread)
-        sdc1    $f8,  THREAD_FPR8(\thread)
+        sdc1    $f8,  THREAD_FPR8_LS64(\thread)
-        sdc1    $f10, THREAD_FPR10(\thread)
+        sdc1    $f10, THREAD_FPR10_LS64(\thread)
-        sdc1    $f12, THREAD_FPR12(\thread)
+        sdc1    $f12, THREAD_FPR12_LS64(\thread)
-        sdc1    $f14, THREAD_FPR14(\thread)
+        sdc1    $f14, THREAD_FPR14_LS64(\thread)
-        sdc1    $f16, THREAD_FPR16(\thread)
+        sdc1    $f16, THREAD_FPR16_LS64(\thread)
-        sdc1    $f18, THREAD_FPR18(\thread)
+        sdc1    $f18, THREAD_FPR18_LS64(\thread)
-        sdc1    $f20, THREAD_FPR20(\thread)
+        sdc1    $f20, THREAD_FPR20_LS64(\thread)
-        sdc1    $f22, THREAD_FPR22(\thread)
+        sdc1    $f22, THREAD_FPR22_LS64(\thread)
-        sdc1    $f24, THREAD_FPR24(\thread)
+        sdc1    $f24, THREAD_FPR24_LS64(\thread)
-        sdc1    $f26, THREAD_FPR26(\thread)
+        sdc1    $f26, THREAD_FPR26_LS64(\thread)
-        sdc1    $f28, THREAD_FPR28(\thread)
+        sdc1    $f28, THREAD_FPR28_LS64(\thread)
-        sdc1    $f30, THREAD_FPR30(\thread)
+        sdc1    $f30, THREAD_FPR30_LS64(\thread)
        sw      \tmp, THREAD_FCR31(\thread)
        .endm
        .macro  fpu_save_16odd thread
        .set    push
        .set    mips64r2
-        sdc1    $f1,  THREAD_FPR1(\thread)
+        sdc1    $f1,  THREAD_FPR1_LS64(\thread)
-        sdc1    $f3,  THREAD_FPR3(\thread)
+        sdc1    $f3,  THREAD_FPR3_LS64(\thread)
-        sdc1    $f5,  THREAD_FPR5(\thread)
+        sdc1    $f5,  THREAD_FPR5_LS64(\thread)
-        sdc1    $f7,  THREAD_FPR7(\thread)
+        sdc1    $f7,  THREAD_FPR7_LS64(\thread)
-        sdc1    $f9,  THREAD_FPR9(\thread)
+        sdc1    $f9,  THREAD_FPR9_LS64(\thread)
-        sdc1    $f11, THREAD_FPR11(\thread)
+        sdc1    $f11, THREAD_FPR11_LS64(\thread)
-        sdc1    $f13, THREAD_FPR13(\thread)
+        sdc1    $f13, THREAD_FPR13_LS64(\thread)
-        sdc1    $f15, THREAD_FPR15(\thread)
+        sdc1    $f15, THREAD_FPR15_LS64(\thread)
-        sdc1    $f17, THREAD_FPR17(\thread)
+        sdc1    $f17, THREAD_FPR17_LS64(\thread)
-        sdc1    $f19, THREAD_FPR19(\thread)
+        sdc1    $f19, THREAD_FPR19_LS64(\thread)
-        sdc1    $f21, THREAD_FPR21(\thread)
+        sdc1    $f21, THREAD_FPR21_LS64(\thread)
-        sdc1    $f23, THREAD_FPR23(\thread)
+        sdc1    $f23, THREAD_FPR23_LS64(\thread)
-        sdc1    $f25, THREAD_FPR25(\thread)
+        sdc1    $f25, THREAD_FPR25_LS64(\thread)
-        sdc1    $f27, THREAD_FPR27(\thread)
+        sdc1    $f27, THREAD_FPR27_LS64(\thread)
-        sdc1    $f29, THREAD_FPR29(\thread)
+        sdc1    $f29, THREAD_FPR29_LS64(\thread)
-        sdc1    $f31, THREAD_FPR31(\thread)
+        sdc1    $f31, THREAD_FPR31_LS64(\thread)
        .set    pop
        .endm
@@ -117,44 +117,44 @@
        .macro  fpu_restore_16even thread tmp=t0
        lw      \tmp, THREAD_FCR31(\thread)
-        ldc1    $f0,  THREAD_FPR0(\thread)
+        ldc1    $f0,  THREAD_FPR0_LS64(\thread)
-        ldc1    $f2,  THREAD_FPR2(\thread)
+        ldc1    $f2,  THREAD_FPR2_LS64(\thread)
-        ldc1    $f4,  THREAD_FPR4(\thread)
+        ldc1    $f4,  THREAD_FPR4_LS64(\thread)
-        ldc1    $f6,  THREAD_FPR6(\thread)
+        ldc1    $f6,  THREAD_FPR6_LS64(\thread)
-        ldc1    $f8,  THREAD_FPR8(\thread)
+        ldc1    $f8,  THREAD_FPR8_LS64(\thread)
-        ldc1    $f10, THREAD_FPR10(\thread)
+        ldc1    $f10, THREAD_FPR10_LS64(\thread)
-        ldc1    $f12, THREAD_FPR12(\thread)
+        ldc1    $f12, THREAD_FPR12_LS64(\thread)
-        ldc1    $f14, THREAD_FPR14(\thread)
+        ldc1    $f14, THREAD_FPR14_LS64(\thread)
-        ldc1    $f16, THREAD_FPR16(\thread)
+        ldc1    $f16, THREAD_FPR16_LS64(\thread)
-        ldc1    $f18, THREAD_FPR18(\thread)
+        ldc1    $f18, THREAD_FPR18_LS64(\thread)
-        ldc1    $f20, THREAD_FPR20(\thread)
+        ldc1    $f20, THREAD_FPR20_LS64(\thread)
-        ldc1    $f22, THREAD_FPR22(\thread)
+        ldc1    $f22, THREAD_FPR22_LS64(\thread)
-        ldc1    $f24, THREAD_FPR24(\thread)
+        ldc1    $f24, THREAD_FPR24_LS64(\thread)
-        ldc1    $f26, THREAD_FPR26(\thread)
+        ldc1    $f26, THREAD_FPR26_LS64(\thread)
-        ldc1    $f28, THREAD_FPR28(\thread)
+        ldc1    $f28, THREAD_FPR28_LS64(\thread)
-        ldc1    $f30, THREAD_FPR30(\thread)
+        ldc1    $f30, THREAD_FPR30_LS64(\thread)
        ctc1    \tmp, fcr31
        .endm
        .macro  fpu_restore_16odd thread
        .set    push
        .set    mips64r2
-        ldc1    $f1,  THREAD_FPR1(\thread)
+        ldc1    $f1,  THREAD_FPR1_LS64(\thread)
-        ldc1    $f3,  THREAD_FPR3(\thread)
+        ldc1    $f3,  THREAD_FPR3_LS64(\thread)
-        ldc1    $f5,  THREAD_FPR5(\thread)
+        ldc1    $f5,  THREAD_FPR5_LS64(\thread)
-        ldc1    $f7,  THREAD_FPR7(\thread)
+        ldc1    $f7,  THREAD_FPR7_LS64(\thread)
-        ldc1    $f9,  THREAD_FPR9(\thread)
+        ldc1    $f9,  THREAD_FPR9_LS64(\thread)
-        ldc1    $f11, THREAD_FPR11(\thread)
+        ldc1    $f11, THREAD_FPR11_LS64(\thread)
-        ldc1    $f13, THREAD_FPR13(\thread)
+        ldc1    $f13, THREAD_FPR13_LS64(\thread)
-        ldc1    $f15, THREAD_FPR15(\thread)
+        ldc1    $f15, THREAD_FPR15_LS64(\thread)
-        ldc1    $f17, THREAD_FPR17(\thread)
+        ldc1    $f17, THREAD_FPR17_LS64(\thread)
-        ldc1    $f19, THREAD_FPR19(\thread)
+        ldc1    $f19, THREAD_FPR19_LS64(\thread)
-        ldc1    $f21, THREAD_FPR21(\thread)
+        ldc1    $f21, THREAD_FPR21_LS64(\thread)
-        ldc1    $f23, THREAD_FPR23(\thread)
+        ldc1    $f23, THREAD_FPR23_LS64(\thread)
-        ldc1    $f25, THREAD_FPR25(\thread)
+        ldc1    $f25, THREAD_FPR25_LS64(\thread)
-        ldc1    $f27, THREAD_FPR27(\thread)
+        ldc1    $f27, THREAD_FPR27_LS64(\thread)
-        ldc1    $f29, THREAD_FPR29(\thread)
+        ldc1    $f29, THREAD_FPR29_LS64(\thread)
-        ldc1    $f31, THREAD_FPR31(\thread)
+        ldc1    $f31, THREAD_FPR31_LS64(\thread)
        .set    pop
        .endm
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 8a2a45d4b147..7ff80622c8d9 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -169,6 +169,72 @@ void output_thread_fpu_defines(void)
        OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
        OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
+        /* the least significant 64 bits of each FP register */
+        OFFSET(THREAD_FPR0_LS64, task_struct,
+               thread.fpu.fpr[0].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR1_LS64, task_struct,
+               thread.fpu.fpr[1].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR2_LS64, task_struct,
+               thread.fpu.fpr[2].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR3_LS64, task_struct,
+               thread.fpu.fpr[3].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR4_LS64, task_struct,
+               thread.fpu.fpr[4].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR5_LS64, task_struct,
+               thread.fpu.fpr[5].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR6_LS64, task_struct,
+               thread.fpu.fpr[6].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR7_LS64, task_struct,
+               thread.fpu.fpr[7].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR8_LS64, task_struct,
+               thread.fpu.fpr[8].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR9_LS64, task_struct,
+               thread.fpu.fpr[9].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR10_LS64, task_struct,
+               thread.fpu.fpr[10].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR11_LS64, task_struct,
+               thread.fpu.fpr[11].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR12_LS64, task_struct,
+               thread.fpu.fpr[12].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR13_LS64, task_struct,
+               thread.fpu.fpr[13].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR14_LS64, task_struct,
+               thread.fpu.fpr[14].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR15_LS64, task_struct,
+               thread.fpu.fpr[15].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR16_LS64, task_struct,
+               thread.fpu.fpr[16].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR17_LS64, task_struct,
+               thread.fpu.fpr[17].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR18_LS64, task_struct,
+               thread.fpu.fpr[18].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR19_LS64, task_struct,
+               thread.fpu.fpr[19].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR20_LS64, task_struct,
+               thread.fpu.fpr[20].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR21_LS64, task_struct,
+               thread.fpu.fpr[21].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR22_LS64, task_struct,
+               thread.fpu.fpr[22].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR23_LS64, task_struct,
+               thread.fpu.fpr[23].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR24_LS64, task_struct,
+               thread.fpu.fpr[24].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR25_LS64, task_struct,
+               thread.fpu.fpr[25].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR26_LS64, task_struct,
+               thread.fpu.fpr[26].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR27_LS64, task_struct,
+               thread.fpu.fpr[27].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR28_LS64, task_struct,
+               thread.fpu.fpr[28].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR29_LS64, task_struct,
+               thread.fpu.fpr[29].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR30_LS64, task_struct,
+               thread.fpu.fpr[30].val64[FPR_IDX(64, 0)]);
+        OFFSET(THREAD_FPR31_LS64, task_struct,
+               thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]);
        OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
        BLANK();
 }
author	Paul Burton <paul.burton@imgtec.com>	2014-01-27 10:23:08 -0500
committer	Ralf Baechle <ralf@linux-mips.org>	2014-03-26 18:09:10 -0400
commit	02987633df7ba2f62967791dda816eb191d1add3 (patch)
tree	fe0763b4b8c5d8eafde7afa9699aa7cbcebd5d08
parent	72b22bbad1e7cff4645c0f05b4d573ac301d5157 (diff)

diff --git a/arch/mips/include/asm/asmmacro-32.h b/arch/mips/include/asm/asmmacro-32.h index 70e1f176f123..e38c2811d4e2 100644 --- a/arch/mips/include/asm/asmmacro-32.h +++ b/arch/mips/include/asm/asmmacro-32.h
@@ -14,75 +14,75 @@
14		14
15	.macro fpu_save_single thread tmp=t0	15	.macro fpu_save_single thread tmp=t0
16	cfc1 \tmp, fcr31	16	cfc1 \tmp, fcr31
17	swc1 $f0, THREAD_FPR0(\thread)	17	swc1 $f0, THREAD_FPR0_LS64(\thread)
18	swc1 $f1, THREAD_FPR1(\thread)	18	swc1 $f1, THREAD_FPR1_LS64(\thread)
19	swc1 $f2, THREAD_FPR2(\thread)	19	swc1 $f2, THREAD_FPR2_LS64(\thread)
20	swc1 $f3, THREAD_FPR3(\thread)	20	swc1 $f3, THREAD_FPR3_LS64(\thread)
21	swc1 $f4, THREAD_FPR4(\thread)	21	swc1 $f4, THREAD_FPR4_LS64(\thread)
22	swc1 $f5, THREAD_FPR5(\thread)	22	swc1 $f5, THREAD_FPR5_LS64(\thread)
23	swc1 $f6, THREAD_FPR6(\thread)	23	swc1 $f6, THREAD_FPR6_LS64(\thread)
24	swc1 $f7, THREAD_FPR7(\thread)	24	swc1 $f7, THREAD_FPR7_LS64(\thread)
25	swc1 $f8, THREAD_FPR8(\thread)	25	swc1 $f8, THREAD_FPR8_LS64(\thread)
26	swc1 $f9, THREAD_FPR9(\thread)	26	swc1 $f9, THREAD_FPR9_LS64(\thread)
27	swc1 $f10, THREAD_FPR10(\thread)	27	swc1 $f10, THREAD_FPR10_LS64(\thread)
28	swc1 $f11, THREAD_FPR11(\thread)	28	swc1 $f11, THREAD_FPR11_LS64(\thread)
29	swc1 $f12, THREAD_FPR12(\thread)	29	swc1 $f12, THREAD_FPR12_LS64(\thread)
30	swc1 $f13, THREAD_FPR13(\thread)	30	swc1 $f13, THREAD_FPR13_LS64(\thread)
31	swc1 $f14, THREAD_FPR14(\thread)	31	swc1 $f14, THREAD_FPR14_LS64(\thread)
32	swc1 $f15, THREAD_FPR15(\thread)	32	swc1 $f15, THREAD_FPR15_LS64(\thread)
33	swc1 $f16, THREAD_FPR16(\thread)	33	swc1 $f16, THREAD_FPR16_LS64(\thread)
34	swc1 $f17, THREAD_FPR17(\thread)	34	swc1 $f17, THREAD_FPR17_LS64(\thread)
35	swc1 $f18, THREAD_FPR18(\thread)	35	swc1 $f18, THREAD_FPR18_LS64(\thread)
36	swc1 $f19, THREAD_FPR19(\thread)	36	swc1 $f19, THREAD_FPR19_LS64(\thread)
37	swc1 $f20, THREAD_FPR20(\thread)	37	swc1 $f20, THREAD_FPR20_LS64(\thread)
38	swc1 $f21, THREAD_FPR21(\thread)	38	swc1 $f21, THREAD_FPR21_LS64(\thread)
39	swc1 $f22, THREAD_FPR22(\thread)	39	swc1 $f22, THREAD_FPR22_LS64(\thread)
40	swc1 $f23, THREAD_FPR23(\thread)	40	swc1 $f23, THREAD_FPR23_LS64(\thread)
41	swc1 $f24, THREAD_FPR24(\thread)	41	swc1 $f24, THREAD_FPR24_LS64(\thread)
42	swc1 $f25, THREAD_FPR25(\thread)	42	swc1 $f25, THREAD_FPR25_LS64(\thread)
43	swc1 $f26, THREAD_FPR26(\thread)	43	swc1 $f26, THREAD_FPR26_LS64(\thread)
44	swc1 $f27, THREAD_FPR27(\thread)	44	swc1 $f27, THREAD_FPR27_LS64(\thread)
45	swc1 $f28, THREAD_FPR28(\thread)	45	swc1 $f28, THREAD_FPR28_LS64(\thread)
46	swc1 $f29, THREAD_FPR29(\thread)	46	swc1 $f29, THREAD_FPR29_LS64(\thread)
47	swc1 $f30, THREAD_FPR30(\thread)	47	swc1 $f30, THREAD_FPR30_LS64(\thread)
48	swc1 $f31, THREAD_FPR31(\thread)	48	swc1 $f31, THREAD_FPR31_LS64(\thread)
49	sw \tmp, THREAD_FCR31(\thread)	49	sw \tmp, THREAD_FCR31(\thread)
50	.endm	50	.endm
51		51
52	.macro fpu_restore_single thread tmp=t0	52	.macro fpu_restore_single thread tmp=t0
53	lw \tmp, THREAD_FCR31(\thread)	53	lw \tmp, THREAD_FCR31(\thread)
54	lwc1 $f0, THREAD_FPR0(\thread)	54	lwc1 $f0, THREAD_FPR0_LS64(\thread)
55	lwc1 $f1, THREAD_FPR1(\thread)	55	lwc1 $f1, THREAD_FPR1_LS64(\thread)
56	lwc1 $f2, THREAD_FPR2(\thread)	56	lwc1 $f2, THREAD_FPR2_LS64(\thread)
57	lwc1 $f3, THREAD_FPR3(\thread)	57	lwc1 $f3, THREAD_FPR3_LS64(\thread)
58	lwc1 $f4, THREAD_FPR4(\thread)	58	lwc1 $f4, THREAD_FPR4_LS64(\thread)
59	lwc1 $f5, THREAD_FPR5(\thread)	59	lwc1 $f5, THREAD_FPR5_LS64(\thread)
60	lwc1 $f6, THREAD_FPR6(\thread)	60	lwc1 $f6, THREAD_FPR6_LS64(\thread)
61	lwc1 $f7, THREAD_FPR7(\thread)	61	lwc1 $f7, THREAD_FPR7_LS64(\thread)
62	lwc1 $f8, THREAD_FPR8(\thread)	62	lwc1 $f8, THREAD_FPR8_LS64(\thread)
63	lwc1 $f9, THREAD_FPR9(\thread)	63	lwc1 $f9, THREAD_FPR9_LS64(\thread)
64	lwc1 $f10, THREAD_FPR10(\thread)	64	lwc1 $f10, THREAD_FPR10_LS64(\thread)
65	lwc1 $f11, THREAD_FPR11(\thread)	65	lwc1 $f11, THREAD_FPR11_LS64(\thread)
66	lwc1 $f12, THREAD_FPR12(\thread)	66	lwc1 $f12, THREAD_FPR12_LS64(\thread)
67	lwc1 $f13, THREAD_FPR13(\thread)	67	lwc1 $f13, THREAD_FPR13_LS64(\thread)
68	lwc1 $f14, THREAD_FPR14(\thread)	68	lwc1 $f14, THREAD_FPR14_LS64(\thread)
69	lwc1 $f15, THREAD_FPR15(\thread)	69	lwc1 $f15, THREAD_FPR15_LS64(\thread)
70	lwc1 $f16, THREAD_FPR16(\thread)	70	lwc1 $f16, THREAD_FPR16_LS64(\thread)
71	lwc1 $f17, THREAD_FPR17(\thread)	71	lwc1 $f17, THREAD_FPR17_LS64(\thread)
72	lwc1 $f18, THREAD_FPR18(\thread)	72	lwc1 $f18, THREAD_FPR18_LS64(\thread)
73	lwc1 $f19, THREAD_FPR19(\thread)	73	lwc1 $f19, THREAD_FPR19_LS64(\thread)
74	lwc1 $f20, THREAD_FPR20(\thread)	74	lwc1 $f20, THREAD_FPR20_LS64(\thread)
75	lwc1 $f21, THREAD_FPR21(\thread)	75	lwc1 $f21, THREAD_FPR21_LS64(\thread)
76	lwc1 $f22, THREAD_FPR22(\thread)	76	lwc1 $f22, THREAD_FPR22_LS64(\thread)
77	lwc1 $f23, THREAD_FPR23(\thread)	77	lwc1 $f23, THREAD_FPR23_LS64(\thread)
78	lwc1 $f24, THREAD_FPR24(\thread)	78	lwc1 $f24, THREAD_FPR24_LS64(\thread)
79	lwc1 $f25, THREAD_FPR25(\thread)	79	lwc1 $f25, THREAD_FPR25_LS64(\thread)
80	lwc1 $f26, THREAD_FPR26(\thread)	80	lwc1 $f26, THREAD_FPR26_LS64(\thread)
81	lwc1 $f27, THREAD_FPR27(\thread)	81	lwc1 $f27, THREAD_FPR27_LS64(\thread)
82	lwc1 $f28, THREAD_FPR28(\thread)	82	lwc1 $f28, THREAD_FPR28_LS64(\thread)
83	lwc1 $f29, THREAD_FPR29(\thread)	83	lwc1 $f29, THREAD_FPR29_LS64(\thread)
84	lwc1 $f30, THREAD_FPR30(\thread)	84	lwc1 $f30, THREAD_FPR30_LS64(\thread)
85	lwc1 $f31, THREAD_FPR31(\thread)	85	lwc1 $f31, THREAD_FPR31_LS64(\thread)
86	ctc1 \tmp, fcr31	86	ctc1 \tmp, fcr31
87	.endm	87	.endm
88		88


diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h index ef066b17a650..63cf43472814 100644 --- a/arch/mips/include/asm/asmmacro.h +++ b/arch/mips/include/asm/asmmacro.h
@@ -64,44 +64,44 @@
64		64
65	.macro fpu_save_16even thread tmp=t0	65	.macro fpu_save_16even thread tmp=t0
66	cfc1 \tmp, fcr31	66	cfc1 \tmp, fcr31
67	sdc1 $f0, THREAD_FPR0(\thread)	67	sdc1 $f0, THREAD_FPR0_LS64(\thread)
68	sdc1 $f2, THREAD_FPR2(\thread)	68	sdc1 $f2, THREAD_FPR2_LS64(\thread)
69	sdc1 $f4, THREAD_FPR4(\thread)	69	sdc1 $f4, THREAD_FPR4_LS64(\thread)
70	sdc1 $f6, THREAD_FPR6(\thread)	70	sdc1 $f6, THREAD_FPR6_LS64(\thread)
71	sdc1 $f8, THREAD_FPR8(\thread)	71	sdc1 $f8, THREAD_FPR8_LS64(\thread)
72	sdc1 $f10, THREAD_FPR10(\thread)	72	sdc1 $f10, THREAD_FPR10_LS64(\thread)
73	sdc1 $f12, THREAD_FPR12(\thread)	73	sdc1 $f12, THREAD_FPR12_LS64(\thread)
74	sdc1 $f14, THREAD_FPR14(\thread)	74	sdc1 $f14, THREAD_FPR14_LS64(\thread)
75	sdc1 $f16, THREAD_FPR16(\thread)	75	sdc1 $f16, THREAD_FPR16_LS64(\thread)
76	sdc1 $f18, THREAD_FPR18(\thread)	76	sdc1 $f18, THREAD_FPR18_LS64(\thread)
77	sdc1 $f20, THREAD_FPR20(\thread)	77	sdc1 $f20, THREAD_FPR20_LS64(\thread)
78	sdc1 $f22, THREAD_FPR22(\thread)	78	sdc1 $f22, THREAD_FPR22_LS64(\thread)
79	sdc1 $f24, THREAD_FPR24(\thread)	79	sdc1 $f24, THREAD_FPR24_LS64(\thread)
80	sdc1 $f26, THREAD_FPR26(\thread)	80	sdc1 $f26, THREAD_FPR26_LS64(\thread)
81	sdc1 $f28, THREAD_FPR28(\thread)	81	sdc1 $f28, THREAD_FPR28_LS64(\thread)
82	sdc1 $f30, THREAD_FPR30(\thread)	82	sdc1 $f30, THREAD_FPR30_LS64(\thread)
83	sw \tmp, THREAD_FCR31(\thread)	83	sw \tmp, THREAD_FCR31(\thread)
84	.endm	84	.endm
85		85
86	.macro fpu_save_16odd thread	86	.macro fpu_save_16odd thread
87	.set push	87	.set push
88	.set mips64r2	88	.set mips64r2
89	sdc1 $f1, THREAD_FPR1(\thread)	89	sdc1 $f1, THREAD_FPR1_LS64(\thread)
90	sdc1 $f3, THREAD_FPR3(\thread)	90	sdc1 $f3, THREAD_FPR3_LS64(\thread)
91	sdc1 $f5, THREAD_FPR5(\thread)	91	sdc1 $f5, THREAD_FPR5_LS64(\thread)
92	sdc1 $f7, THREAD_FPR7(\thread)	92	sdc1 $f7, THREAD_FPR7_LS64(\thread)
93	sdc1 $f9, THREAD_FPR9(\thread)	93	sdc1 $f9, THREAD_FPR9_LS64(\thread)
94	sdc1 $f11, THREAD_FPR11(\thread)	94	sdc1 $f11, THREAD_FPR11_LS64(\thread)
95	sdc1 $f13, THREAD_FPR13(\thread)	95	sdc1 $f13, THREAD_FPR13_LS64(\thread)
96	sdc1 $f15, THREAD_FPR15(\thread)	96	sdc1 $f15, THREAD_FPR15_LS64(\thread)
97	sdc1 $f17, THREAD_FPR17(\thread)	97	sdc1 $f17, THREAD_FPR17_LS64(\thread)
98	sdc1 $f19, THREAD_FPR19(\thread)	98	sdc1 $f19, THREAD_FPR19_LS64(\thread)
99	sdc1 $f21, THREAD_FPR21(\thread)	99	sdc1 $f21, THREAD_FPR21_LS64(\thread)
100	sdc1 $f23, THREAD_FPR23(\thread)	100	sdc1 $f23, THREAD_FPR23_LS64(\thread)
101	sdc1 $f25, THREAD_FPR25(\thread)	101	sdc1 $f25, THREAD_FPR25_LS64(\thread)
102	sdc1 $f27, THREAD_FPR27(\thread)	102	sdc1 $f27, THREAD_FPR27_LS64(\thread)
103	sdc1 $f29, THREAD_FPR29(\thread)	103	sdc1 $f29, THREAD_FPR29_LS64(\thread)
104	sdc1 $f31, THREAD_FPR31(\thread)	104	sdc1 $f31, THREAD_FPR31_LS64(\thread)
105	.set pop	105	.set pop
106	.endm	106	.endm
107		107
@@ -117,44 +117,44 @@
117		117
118	.macro fpu_restore_16even thread tmp=t0	118	.macro fpu_restore_16even thread tmp=t0
119	lw \tmp, THREAD_FCR31(\thread)	119	lw \tmp, THREAD_FCR31(\thread)
120	ldc1 $f0, THREAD_FPR0(\thread)	120	ldc1 $f0, THREAD_FPR0_LS64(\thread)
121	ldc1 $f2, THREAD_FPR2(\thread)	121	ldc1 $f2, THREAD_FPR2_LS64(\thread)
122	ldc1 $f4, THREAD_FPR4(\thread)	122	ldc1 $f4, THREAD_FPR4_LS64(\thread)
123	ldc1 $f6, THREAD_FPR6(\thread)	123	ldc1 $f6, THREAD_FPR6_LS64(\thread)
124	ldc1 $f8, THREAD_FPR8(\thread)	124	ldc1 $f8, THREAD_FPR8_LS64(\thread)
125	ldc1 $f10, THREAD_FPR10(\thread)	125	ldc1 $f10, THREAD_FPR10_LS64(\thread)
126	ldc1 $f12, THREAD_FPR12(\thread)	126	ldc1 $f12, THREAD_FPR12_LS64(\thread)
127	ldc1 $f14, THREAD_FPR14(\thread)	127	ldc1 $f14, THREAD_FPR14_LS64(\thread)
128	ldc1 $f16, THREAD_FPR16(\thread)	128	ldc1 $f16, THREAD_FPR16_LS64(\thread)
129	ldc1 $f18, THREAD_FPR18(\thread)	129	ldc1 $f18, THREAD_FPR18_LS64(\thread)
130	ldc1 $f20, THREAD_FPR20(\thread)	130	ldc1 $f20, THREAD_FPR20_LS64(\thread)
131	ldc1 $f22, THREAD_FPR22(\thread)	131	ldc1 $f22, THREAD_FPR22_LS64(\thread)
132	ldc1 $f24, THREAD_FPR24(\thread)	132	ldc1 $f24, THREAD_FPR24_LS64(\thread)
133	ldc1 $f26, THREAD_FPR26(\thread)	133	ldc1 $f26, THREAD_FPR26_LS64(\thread)
134	ldc1 $f28, THREAD_FPR28(\thread)	134	ldc1 $f28, THREAD_FPR28_LS64(\thread)
135	ldc1 $f30, THREAD_FPR30(\thread)	135	ldc1 $f30, THREAD_FPR30_LS64(\thread)
136	ctc1 \tmp, fcr31	136	ctc1 \tmp, fcr31
137	.endm	137	.endm
138		138
139	.macro fpu_restore_16odd thread	139	.macro fpu_restore_16odd thread
140	.set push	140	.set push
141	.set mips64r2	141	.set mips64r2
142	ldc1 $f1, THREAD_FPR1(\thread)	142	ldc1 $f1, THREAD_FPR1_LS64(\thread)
143	ldc1 $f3, THREAD_FPR3(\thread)	143	ldc1 $f3, THREAD_FPR3_LS64(\thread)
144	ldc1 $f5, THREAD_FPR5(\thread)	144	ldc1 $f5, THREAD_FPR5_LS64(\thread)
145	ldc1 $f7, THREAD_FPR7(\thread)	145	ldc1 $f7, THREAD_FPR7_LS64(\thread)
146	ldc1 $f9, THREAD_FPR9(\thread)	146	ldc1 $f9, THREAD_FPR9_LS64(\thread)
147	ldc1 $f11, THREAD_FPR11(\thread)	147	ldc1 $f11, THREAD_FPR11_LS64(\thread)
148	ldc1 $f13, THREAD_FPR13(\thread)	148	ldc1 $f13, THREAD_FPR13_LS64(\thread)
149	ldc1 $f15, THREAD_FPR15(\thread)	149	ldc1 $f15, THREAD_FPR15_LS64(\thread)
150	ldc1 $f17, THREAD_FPR17(\thread)	150	ldc1 $f17, THREAD_FPR17_LS64(\thread)
151	ldc1 $f19, THREAD_FPR19(\thread)	151	ldc1 $f19, THREAD_FPR19_LS64(\thread)
152	ldc1 $f21, THREAD_FPR21(\thread)	152	ldc1 $f21, THREAD_FPR21_LS64(\thread)
153	ldc1 $f23, THREAD_FPR23(\thread)	153	ldc1 $f23, THREAD_FPR23_LS64(\thread)
154	ldc1 $f25, THREAD_FPR25(\thread)	154	ldc1 $f25, THREAD_FPR25_LS64(\thread)
155	ldc1 $f27, THREAD_FPR27(\thread)	155	ldc1 $f27, THREAD_FPR27_LS64(\thread)
156	ldc1 $f29, THREAD_FPR29(\thread)	156	ldc1 $f29, THREAD_FPR29_LS64(\thread)
157	ldc1 $f31, THREAD_FPR31(\thread)	157	ldc1 $f31, THREAD_FPR31_LS64(\thread)
158	.set pop	158	.set pop
159	.endm	159	.endm
160		160


diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 8a2a45d4b147..7ff80622c8d9 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c
@@ -169,6 +169,72 @@ void output_thread_fpu_defines(void)
169	OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);	169	OFFSET(THREAD_FPR30, task_struct, thread.fpu.fpr[30]);
170	OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);	170	OFFSET(THREAD_FPR31, task_struct, thread.fpu.fpr[31]);
171		171
		172	/* the least significant 64 bits of each FP register */
		173	OFFSET(THREAD_FPR0_LS64, task_struct,
		174	thread.fpu.fpr[0].val64[FPR_IDX(64, 0)]);
		175	OFFSET(THREAD_FPR1_LS64, task_struct,
		176	thread.fpu.fpr[1].val64[FPR_IDX(64, 0)]);
		177	OFFSET(THREAD_FPR2_LS64, task_struct,
		178	thread.fpu.fpr[2].val64[FPR_IDX(64, 0)]);
		179	OFFSET(THREAD_FPR3_LS64, task_struct,
		180	thread.fpu.fpr[3].val64[FPR_IDX(64, 0)]);
		181	OFFSET(THREAD_FPR4_LS64, task_struct,
		182	thread.fpu.fpr[4].val64[FPR_IDX(64, 0)]);
		183	OFFSET(THREAD_FPR5_LS64, task_struct,
		184	thread.fpu.fpr[5].val64[FPR_IDX(64, 0)]);
		185	OFFSET(THREAD_FPR6_LS64, task_struct,
		186	thread.fpu.fpr[6].val64[FPR_IDX(64, 0)]);
		187	OFFSET(THREAD_FPR7_LS64, task_struct,
		188	thread.fpu.fpr[7].val64[FPR_IDX(64, 0)]);
		189	OFFSET(THREAD_FPR8_LS64, task_struct,
		190	thread.fpu.fpr[8].val64[FPR_IDX(64, 0)]);
		191	OFFSET(THREAD_FPR9_LS64, task_struct,
		192	thread.fpu.fpr[9].val64[FPR_IDX(64, 0)]);
		193	OFFSET(THREAD_FPR10_LS64, task_struct,
		194	thread.fpu.fpr[10].val64[FPR_IDX(64, 0)]);
		195	OFFSET(THREAD_FPR11_LS64, task_struct,
		196	thread.fpu.fpr[11].val64[FPR_IDX(64, 0)]);
		197	OFFSET(THREAD_FPR12_LS64, task_struct,
		198	thread.fpu.fpr[12].val64[FPR_IDX(64, 0)]);
		199	OFFSET(THREAD_FPR13_LS64, task_struct,
		200	thread.fpu.fpr[13].val64[FPR_IDX(64, 0)]);
		201	OFFSET(THREAD_FPR14_LS64, task_struct,
		202	thread.fpu.fpr[14].val64[FPR_IDX(64, 0)]);
		203	OFFSET(THREAD_FPR15_LS64, task_struct,
		204	thread.fpu.fpr[15].val64[FPR_IDX(64, 0)]);
		205	OFFSET(THREAD_FPR16_LS64, task_struct,
		206	thread.fpu.fpr[16].val64[FPR_IDX(64, 0)]);
		207	OFFSET(THREAD_FPR17_LS64, task_struct,
		208	thread.fpu.fpr[17].val64[FPR_IDX(64, 0)]);
		209	OFFSET(THREAD_FPR18_LS64, task_struct,
		210	thread.fpu.fpr[18].val64[FPR_IDX(64, 0)]);
		211	OFFSET(THREAD_FPR19_LS64, task_struct,
		212	thread.fpu.fpr[19].val64[FPR_IDX(64, 0)]);
		213	OFFSET(THREAD_FPR20_LS64, task_struct,
		214	thread.fpu.fpr[20].val64[FPR_IDX(64, 0)]);
		215	OFFSET(THREAD_FPR21_LS64, task_struct,
		216	thread.fpu.fpr[21].val64[FPR_IDX(64, 0)]);
		217	OFFSET(THREAD_FPR22_LS64, task_struct,
		218	thread.fpu.fpr[22].val64[FPR_IDX(64, 0)]);
		219	OFFSET(THREAD_FPR23_LS64, task_struct,
		220	thread.fpu.fpr[23].val64[FPR_IDX(64, 0)]);
		221	OFFSET(THREAD_FPR24_LS64, task_struct,
		222	thread.fpu.fpr[24].val64[FPR_IDX(64, 0)]);
		223	OFFSET(THREAD_FPR25_LS64, task_struct,
		224	thread.fpu.fpr[25].val64[FPR_IDX(64, 0)]);
		225	OFFSET(THREAD_FPR26_LS64, task_struct,
		226	thread.fpu.fpr[26].val64[FPR_IDX(64, 0)]);
		227	OFFSET(THREAD_FPR27_LS64, task_struct,
		228	thread.fpu.fpr[27].val64[FPR_IDX(64, 0)]);
		229	OFFSET(THREAD_FPR28_LS64, task_struct,
		230	thread.fpu.fpr[28].val64[FPR_IDX(64, 0)]);
		231	OFFSET(THREAD_FPR29_LS64, task_struct,
		232	thread.fpu.fpr[29].val64[FPR_IDX(64, 0)]);
		233	OFFSET(THREAD_FPR30_LS64, task_struct,
		234	thread.fpu.fpr[30].val64[FPR_IDX(64, 0)]);
		235	OFFSET(THREAD_FPR31_LS64, task_struct,
		236	thread.fpu.fpr[31].val64[FPR_IDX(64, 0)]);
		237
172	OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);	238	OFFSET(THREAD_FCR31, task_struct, thread.fpu.fcr31);
173	BLANK();	239	BLANK();
174	}	240	}