mmc: bcm281xx SDHCI driver

Add SDHCI driver for the Broadcom 281xx SoCs.

Still missing:
 - power managemement

Signed-off-by: Christian Daudt <csd@broadcom.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chris Ball <cjb@laptop.org>

4 files changed, 367 insertions, 0 deletions

diff --git a/arch/arm/configs/bcm_defconfig b/arch/arm/configs/bcm_defconfig
index e3bf2d65618e..65edf6d47215 100644
--- a/arch/arm/configs/bcm_defconfig
+++ b/arch/arm/configs/bcm_defconfig
@@ -78,6 +78,13 @@ CONFIG_BACKLIGHT_LCD_SUPPORT=y
 CONFIG_LCD_CLASS_DEVICE=y
 CONFIG_BACKLIGHT_CLASS_DEVICE=y
 # CONFIG_USB_SUPPORT is not set
+CONFIG_MMC=y
+CONFIG_MMC_UNSAFE_RESUME=y
+CONFIG_MMC_BLOCK_MINORS=32
+CONFIG_MMC_TEST=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_PLTFM=y
+CONFIG_MMC_SDHCI_BCM_KONA=y
 CONFIG_NEW_LEDS=y
 CONFIG_LEDS_CLASS=y
 CONFIG_LEDS_TRIGGERS=y
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 1be228998c81..8a4c066787d7 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -249,6 +249,17 @@ config MMC_SDHCI_S3C_DMA
 
           YMMV.
 
+config MMC_SDHCI_BCM_KONA
+        tristate "SDHCI support on Broadcom KONA platform"
+        depends on ARCH_BCM
+        select MMC_SDHCI_PLTFM
+        help
+          This selects the Broadcom Kona Secure Digital Host Controller
+          Interface(SDHCI) support.
+          This is used in Broadcom mobile SoCs.
+
+          If you have a controller with this interface, say Y or M here.
+
 config MMC_SDHCI_BCM2835
         tristate "SDHCI platform support for the BCM2835 SD/MMC Controller"
         depends on ARCH_BCM2835
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 67718c1b79ce..d422e2167e19 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -61,6 +61,7 @@ obj-$(CONFIG_MMC_SDHCI_DOVE)		+= sdhci-dove.o
 obj-$(CONFIG_MMC_SDHCI_TEGRA)           += sdhci-tegra.o
 obj-$(CONFIG_MMC_SDHCI_OF_ESDHC)        += sdhci-of-esdhc.o
 obj-$(CONFIG_MMC_SDHCI_OF_HLWD)         += sdhci-of-hlwd.o
+obj-$(CONFIG_MMC_SDHCI_BCM_KONA)        += sdhci-bcm-kona.o
 obj-$(CONFIG_MMC_SDHCI_BCM2835)         += sdhci-bcm2835.o
 
 ifeq ($(CONFIG_CB710_DEBUG),y)
diff --git a/drivers/mmc/host/sdhci-bcm-kona.c b/drivers/mmc/host/sdhci-bcm-kona.c
new file mode 100644
index 000000000000..87175f9817c2
--- /dev/null
+++ b/drivers/mmc/host/sdhci-bcm-kona.c
@@ -0,0 +1,348 @@
+/*
+ * Copyright (C) 2013 Broadcom Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2.
+ *
+ * This program is distributed "as is" WITHOUT ANY WARRANTY of any
+ * kind, whether express or implied; without even the implied warranty
+ * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/highmem.h>
+#include <linux/platform_device.h>
+#include <linux/mmc/host.h>
+#include <linux/io.h>
+#include <linux/gpio.h>
+#include <linux/clk.h>
+#include <linux/regulator/consumer.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/version.h>
+#include <linux/mmc/slot-gpio.h>
+
+#include "sdhci-pltfm.h"
+#include "sdhci.h"
+
+#define SDHCI_SOFT_RESET                        0x01000000
+#define KONA_SDHOST_CORECTRL                    0x8000
+#define KONA_SDHOST_CD_PINCTRL                  0x00000008
+#define KONA_SDHOST_STOP_HCLK                   0x00000004
+#define KONA_SDHOST_RESET                       0x00000002
+#define KONA_SDHOST_EN                          0x00000001
+
+#define KONA_SDHOST_CORESTAT                    0x8004
+#define KONA_SDHOST_WP                          0x00000002
+#define KONA_SDHOST_CD_SW                       0x00000001
+
+#define KONA_SDHOST_COREIMR                     0x8008
+#define KONA_SDHOST_IP                          0x00000001
+
+#define KONA_SDHOST_COREISR                     0x800C
+#define KONA_SDHOST_COREIMSR                    0x8010
+#define KONA_SDHOST_COREDBG1                    0x8014
+#define KONA_SDHOST_COREGPO_MASK                0x8018
+
+#define SD_DETECT_GPIO_DEBOUNCE_128MS           128
+
+#define KONA_MMC_AUTOSUSPEND_DELAY              (50)
+
+struct sdhci_bcm_kona_dev {
+        struct mutex    write_lock; /* protect back to back writes */
+};
+
+
+static int sdhci_bcm_kona_sd_reset(struct sdhci_host *host)
+{
+        unsigned int val;
+        unsigned long timeout;
+
+        /* This timeout should be sufficent for core to reset */
+        timeout = jiffies + msecs_to_jiffies(100);
+
+        /* reset the host using the top level reset */
+        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
+        val |= KONA_SDHOST_RESET;
+        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
+
+        while (!(sdhci_readl(host, KONA_SDHOST_CORECTRL) & KONA_SDHOST_RESET)) {
+                if (time_is_before_jiffies(timeout)) {
+                        pr_err("Error: sd host is stuck in reset!!!\n");
+                        return -EFAULT;
+                }
+        }
+
+        /* bring the host out of reset */
+        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
+        val &= ~KONA_SDHOST_RESET;
+
+        /*
+         * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
+         * Back-to-Back writes to same register needs delay when SD bus clock
+         * is very low w.r.t AHB clock, mainly during boot-time and during card
+         * insert-removal.
+         */
+        usleep_range(1000, 5000);
+        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
+
+        return 0;
+}
+
+static void sdhci_bcm_kona_sd_init(struct sdhci_host *host)
+{
+        unsigned int val;
+
+        /* enable the interrupt from the IP core */
+        val = sdhci_readl(host, KONA_SDHOST_COREIMR);
+        val |= KONA_SDHOST_IP;
+        sdhci_writel(host, val, KONA_SDHOST_COREIMR);
+
+        /* Enable the AHB clock gating module to the host */
+        val = sdhci_readl(host, KONA_SDHOST_CORECTRL);
+        val |= KONA_SDHOST_EN;
+
+        /*
+         * Back-to-Back register write needs a delay of 1ms at bootup (min 10uS)
+         * Back-to-Back writes to same register needs delay when SD bus clock
+         * is very low w.r.t AHB clock, mainly during boot-time and during card
+         * insert-removal.
+         */
+        usleep_range(1000, 5000);
+        sdhci_writel(host, val, KONA_SDHOST_CORECTRL);
+}
+
+/*
+ * Software emulation of the SD card insertion/removal. Set insert=1 for insert
+ * and insert=0 for removal. The card detection is done by GPIO. For Broadcom
+ * IP to function properly the bit 0 of CORESTAT register needs to be set/reset
+ * to generate the CD IRQ handled in sdhci.c which schedules card_tasklet.
+ */
+static int sdhci_bcm_kona_sd_card_emulate(struct sdhci_host *host, int insert)
+{
+        struct sdhci_pltfm_host *pltfm_priv = sdhci_priv(host);
+        struct sdhci_bcm_kona_dev *kona_dev = sdhci_pltfm_priv(pltfm_priv);
+        u32 val;
+
+        /*
+         * Back-to-Back register write needs a delay of min 10uS.
+         * Back-to-Back writes to same register needs delay when SD bus clock