diff options
author | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-24 19:11:25 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-05-24 19:11:25 -0400 |
commit | 014322dac6ae0048c928c6ca2faf0d53194f9d15 (patch) | |
tree | 6c4b40ddd4a754a9ce041d97ce8488b8a66ac50d | |
parent | 03eb14199e8a2ff2bc170b283305990151b0d619 (diff) | |
parent | 1a717c00501f02200fa003755e54f9fcbd2f865b (diff) |
Merge branch 'davinci-next' of git://gitorious.org/linux-davinci/linux-davinci into devel-stable
-rw-r--r-- | arch/arm/mach-davinci/da850.c | 2 | ||||
-rw-r--r-- | arch/arm/mach-davinci/devices-da8xx.c | 16 | ||||
-rw-r--r-- | arch/arm/mach-davinci/devices.c | 3 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/da8xx.h | 4 | ||||
-rw-r--r-- | arch/arm/mach-davinci/include/mach/hardware.h | 3 |
5 files changed, 13 insertions, 15 deletions
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index b95b9196deed..133aac405853 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -1055,7 +1055,7 @@ int da850_register_pm(struct platform_device *pdev) | |||
1055 | if (!pdata->cpupll_reg_base) | 1055 | if (!pdata->cpupll_reg_base) |
1056 | return -ENOMEM; | 1056 | return -ENOMEM; |
1057 | 1057 | ||
1058 | pdata->ddrpll_reg_base = ioremap(DA8XX_PLL1_BASE, SZ_4K); | 1058 | pdata->ddrpll_reg_base = ioremap(DA850_PLL1_BASE, SZ_4K); |
1059 | if (!pdata->ddrpll_reg_base) { | 1059 | if (!pdata->ddrpll_reg_base) { |
1060 | ret = -ENOMEM; | 1060 | ret = -ENOMEM; |
1061 | goto no_ddrpll_mem; | 1061 | goto no_ddrpll_mem; |
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c index 58a02dc7b15a..4e66881c7aee 100644 --- a/arch/arm/mach-davinci/devices-da8xx.c +++ b/arch/arm/mach-davinci/devices-da8xx.c | |||
@@ -24,23 +24,25 @@ | |||
24 | #include "clock.h" | 24 | #include "clock.h" |
25 | 25 | ||
26 | #define DA8XX_TPCC_BASE 0x01c00000 | 26 | #define DA8XX_TPCC_BASE 0x01c00000 |
27 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
28 | #define DA850_TPCC1_BASE 0x01e30000 | ||
29 | #define DA8XX_TPTC0_BASE 0x01c08000 | 27 | #define DA8XX_TPTC0_BASE 0x01c08000 |
30 | #define DA8XX_TPTC1_BASE 0x01c08400 | 28 | #define DA8XX_TPTC1_BASE 0x01c08400 |
31 | #define DA850_TPTC2_BASE 0x01e38000 | ||
32 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ | 29 | #define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ |
33 | #define DA8XX_I2C0_BASE 0x01c22000 | 30 | #define DA8XX_I2C0_BASE 0x01c22000 |
34 | #define DA8XX_RTC_BASE 0x01C23000 | 31 | #define DA8XX_RTC_BASE 0x01c23000 |
32 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
33 | #define DA8XX_SPI0_BASE 0x01c41000 | ||
34 | #define DA830_SPI1_BASE 0x01e12000 | ||
35 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
36 | #define DA850_MMCSD1_BASE 0x01e1b000 | ||
35 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 | 37 | #define DA8XX_EMAC_CPPI_PORT_BASE 0x01e20000 |
36 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 | 38 | #define DA8XX_EMAC_CPGMACSS_BASE 0x01e22000 |
37 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 | 39 | #define DA8XX_EMAC_CPGMAC_BASE 0x01e23000 |
38 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 | 40 | #define DA8XX_EMAC_MDIO_BASE 0x01e24000 |
39 | #define DA8XX_GPIO_BASE 0x01e26000 | ||
40 | #define DA8XX_I2C1_BASE 0x01e28000 | 41 | #define DA8XX_I2C1_BASE 0x01e28000 |
41 | #define DA8XX_SPI0_BASE 0x01c41000 | 42 | #define DA850_TPCC1_BASE 0x01e30000 |
42 | #define DA830_SPI1_BASE 0x01e12000 | 43 | #define DA850_TPTC2_BASE 0x01e38000 |
43 | #define DA850_SPI1_BASE 0x01f0e000 | 44 | #define DA850_SPI1_BASE 0x01f0e000 |
45 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
44 | 46 | ||
45 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 | 47 | #define DA8XX_EMAC_CTRL_REG_OFFSET 0x3000 |
46 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 | 48 | #define DA8XX_EMAC_MOD_REG_OFFSET 0x2000 |
diff --git a/arch/arm/mach-davinci/devices.c b/arch/arm/mach-davinci/devices.c index 22ebc64bc9d9..8f4f736aa267 100644 --- a/arch/arm/mach-davinci/devices.c +++ b/arch/arm/mach-davinci/devices.c | |||
@@ -33,6 +33,9 @@ | |||
33 | #define DM365_MMCSD0_BASE 0x01D11000 | 33 | #define DM365_MMCSD0_BASE 0x01D11000 |
34 | #define DM365_MMCSD1_BASE 0x01D00000 | 34 | #define DM365_MMCSD1_BASE 0x01D00000 |
35 | 35 | ||
36 | /* System control register offsets */ | ||
37 | #define DM64XX_VDD3P3V_PWDN 0x48 | ||
38 | |||
36 | static struct resource i2c_resources[] = { | 39 | static struct resource i2c_resources[] = { |
37 | { | 40 | { |
38 | .start = DAVINCI_I2C_BASE, | 41 | .start = DAVINCI_I2C_BASE, |
diff --git a/arch/arm/mach-davinci/include/mach/da8xx.h b/arch/arm/mach-davinci/include/mach/da8xx.h index e4fc1af8500e..ad64da713fc8 100644 --- a/arch/arm/mach-davinci/include/mach/da8xx.h +++ b/arch/arm/mach-davinci/include/mach/da8xx.h | |||
@@ -64,13 +64,9 @@ extern unsigned int da850_max_speed; | |||
64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 | 64 | #define DA8XX_TIMER64P1_BASE 0x01c21000 |
65 | #define DA8XX_GPIO_BASE 0x01e26000 | 65 | #define DA8XX_GPIO_BASE 0x01e26000 |
66 | #define DA8XX_PSC1_BASE 0x01e27000 | 66 | #define DA8XX_PSC1_BASE 0x01e27000 |
67 | #define DA8XX_LCD_CNTRL_BASE 0x01e13000 | ||
68 | #define DA8XX_PLL1_BASE 0x01e1a000 | ||
69 | #define DA8XX_MMCSD0_BASE 0x01c40000 | ||
70 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 | 67 | #define DA8XX_AEMIF_CS2_BASE 0x60000000 |
71 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 | 68 | #define DA8XX_AEMIF_CS3_BASE 0x62000000 |
72 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 | 69 | #define DA8XX_AEMIF_CTL_BASE 0x68000000 |
73 | #define DA8XX_DDR2_CTL_BASE 0xb0000000 | ||
74 | #define DA8XX_ARM_RAM_BASE 0xffff0000 | 70 | #define DA8XX_ARM_RAM_BASE 0xffff0000 |
75 | 71 | ||
76 | void __init da830_init(void); | 72 | void __init da830_init(void); |
diff --git a/arch/arm/mach-davinci/include/mach/hardware.h b/arch/arm/mach-davinci/include/mach/hardware.h index c45ba1f62a11..414e0b93e741 100644 --- a/arch/arm/mach-davinci/include/mach/hardware.h +++ b/arch/arm/mach-davinci/include/mach/hardware.h | |||
@@ -21,9 +21,6 @@ | |||
21 | */ | 21 | */ |
22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 | 22 | #define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000 |
23 | 23 | ||
24 | /* System control register offsets */ | ||
25 | #define DM64XX_VDD3P3V_PWDN 0x48 | ||
26 | |||
27 | /* | 24 | /* |
28 | * I/O mapping | 25 | * I/O mapping |
29 | */ | 26 | */ |