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authorHauke Mehrtens <hauke@hauke-m.de>2013-04-24 15:30:54 -0400
committerJohn W. Linville <linville@tuxdriver.com>2013-04-26 08:42:22 -0400
commit00b38ab35d9bd2253a4d1e659382871d2220e095 (patch)
tree82c3bfd588f1c59a24e9dc26abcba854d146bd2f
parent7af1ce0e0daaf181335c8edc21e12d69ee5cd1d1 (diff)
ssb: implement ssb spuravoid for chipid BCM43222
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Acked-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/ssb/driver_chipcommon_pmu.c19
1 files changed, 17 insertions, 2 deletions
diff --git a/drivers/ssb/driver_chipcommon_pmu.c b/drivers/ssb/driver_chipcommon_pmu.c
index 23c5dbfea115..1173a091b402 100644
--- a/drivers/ssb/driver_chipcommon_pmu.c
+++ b/drivers/ssb/driver_chipcommon_pmu.c
@@ -687,8 +687,23 @@ void ssb_pmu_spuravoid_pllupdate(struct ssb_chipcommon *cc, int spuravoid)
687 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD; 687 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
688 break; 688 break;
689 case 43222: 689 case 43222:
690 /* TODO: BCM43222 requires updating PLLs too */ 690 if (spuravoid == 1) {
691 return; 691 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11500008);
692 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0C000C06);
693 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x0F600a08);
694 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
695 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x2001E920);
696 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888815);
697 } else {
698 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL0, 0x11100008);
699 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL1, 0x0c000c06);
700 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL2, 0x03000a08);
701 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL3, 0x00000000);
702 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL4, 0x200005c0);
703 ssb_chipco_pll_write(cc, SSB_PMU1_PLLCTL5, 0x88888855);
704 }
705 pmu_ctl = SSB_CHIPCO_PMU_CTL_PLL_UPD;
706 break;
692 default: 707 default:
693 ssb_printk(KERN_ERR PFX 708 ssb_printk(KERN_ERR PFX
694 "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", 709 "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n",