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authorIngo Molnar <mingo@elte.hu>2009-01-30 20:56:44 -0500
committerIngo Molnar <mingo@elte.hu>2009-01-30 22:21:25 -0500
commit009eb3fe146aa6f1951f3c5235851bb8d1330dfb (patch)
tree6b2cba03c7ab3d3f067729d0e62b7674ba1c3907
parentc379698fdac7cb65c96dec549850ce606dd6ceba (diff)
x86, irq: describe NR_IRQ sizing details, clean up
Impact: cleanup Signed-off-by: Ingo Molnar <mingo@elte.hu>
-rw-r--r--arch/x86/include/asm/irq_vectors.h32
1 files changed, 23 insertions, 9 deletions
diff --git a/arch/x86/include/asm/irq_vectors.h b/arch/x86/include/asm/irq_vectors.h
index ec87910025d5..41e2450e13bd 100644
--- a/arch/x86/include/asm/irq_vectors.h
+++ b/arch/x86/include/asm/irq_vectors.h
@@ -126,23 +126,37 @@
126#define LAST_VM86_IRQ 15 126#define LAST_VM86_IRQ 15
127#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15) 127#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
128 128
129/*
130 * Size the maximum number of interrupts.
131 *
132 * If the irq_desc[] array has a sparse layout, we can size things
133 * generously - it scales up linearly with the maximum number of CPUs,
134 * and the maximum number of IO-APICs, whichever is higher.
135 *
136 * In other cases we size more conservatively, to not create too large
137 * static arrays.
138 */
139
129#define NR_IRQS_LEGACY 16 140#define NR_IRQS_LEGACY 16
130 141
142#define CPU_VECTOR_LIMIT ( 8 * NR_CPUS )
143#define IO_APIC_VECTOR_LIMIT ( 32 * MAX_IO_APICS )
144
131#ifdef CONFIG_X86_IO_APIC 145#ifdef CONFIG_X86_IO_APIC
132# ifndef CONFIG_SPARSE_IRQ 146# ifdef CONFIG_SPARSE_IRQ
147# define NR_IRQS \
148 (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ? \
149 (NR_VECTORS + CPU_VECTOR_LIMIT) : \
150 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
151# else
133# if NR_CPUS < MAX_IO_APICS 152# if NR_CPUS < MAX_IO_APICS
134# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS)) 153# define NR_IRQS (NR_VECTORS + 4*CPU_VECTOR_LIMIT)
135# else 154# else
136# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS)) 155# define NR_IRQS (NR_VECTORS + IO_APIC_VECTOR_LIMIT)
137# endif 156# endif
138# else
139# define NR_IRQS \
140 ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \
141 (NR_VECTORS + (8 * NR_CPUS)) : \
142 (NR_VECTORS + (32 * MAX_IO_APICS)))
143# endif 157# endif
144#else /* !CONFIG_X86_IO_APIC: */ 158#else /* !CONFIG_X86_IO_APIC: */
145# define NR_IRQS 16 159# define NR_IRQS NR_IRQS_LEGACY
146#endif 160#endif
147 161
148#endif /* _ASM_X86_IRQ_VECTORS_H */ 162#endif /* _ASM_X86_IRQ_VECTORS_H */