diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-09-04 09:29:01 -0400 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-09-05 12:02:32 -0400 |
| commit | 0062f1048bb6c80d66d55034b49b3d733acc4e3a (patch) | |
| tree | f8b75b186f789df0b1f4b2a3f06f8c9183197157 | |
| parent | e8a91c953fca683ef9a9335fb00d6eb3e49ac1ee (diff) | |
[ARM] omap: make sure virtual mmio addresses are __iomem pointer-like
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| -rw-r--r-- | arch/arm/plat-omap/include/mach/fpga.h | 12 | ||||
| -rw-r--r-- | arch/arm/plat-omap/include/mach/hardware.h | 2 |
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/plat-omap/include/mach/fpga.h b/arch/arm/plat-omap/include/mach/fpga.h index c92e4b42b289..f1864a652f7a 100644 --- a/arch/arm/plat-omap/include/mach/fpga.h +++ b/arch/arm/plat-omap/include/mach/fpga.h | |||
| @@ -34,9 +34,9 @@ extern void omap1510_fpga_init_irq(void); | |||
| 34 | * --------------------------------------------------------------------------- | 34 | * --------------------------------------------------------------------------- |
| 35 | */ | 35 | */ |
| 36 | /* maps in the FPGA registers and the ETHR registers */ | 36 | /* maps in the FPGA registers and the ETHR registers */ |
| 37 | #define H2P2_DBG_FPGA_BASE 0xE8000000 /* VA */ | 37 | #define H2P2_DBG_FPGA_BASE IOMEM(0xE8000000) /* VA */ |
| 38 | #define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ | 38 | #define H2P2_DBG_FPGA_SIZE SZ_4K /* SIZE */ |
| 39 | #define H2P2_DBG_FPGA_START 0x04000000 /* PA */ | 39 | #define H2P2_DBG_FPGA_START 0x04000000 /* PA */ |
| 40 | 40 | ||
| 41 | #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) | 41 | #define H2P2_DBG_FPGA_ETHR_START (H2P2_DBG_FPGA_START + 0x300) |
| 42 | #define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ | 42 | #define H2P2_DBG_FPGA_FPGA_REV (H2P2_DBG_FPGA_BASE + 0x10) /* FPGA Revision */ |
| @@ -85,9 +85,9 @@ struct h2p2_dbg_fpga { | |||
| 85 | * OMAP-1510 FPGA | 85 | * OMAP-1510 FPGA |
| 86 | * --------------------------------------------------------------------------- | 86 | * --------------------------------------------------------------------------- |
| 87 | */ | 87 | */ |
| 88 | #define OMAP1510_FPGA_BASE 0xE8000000 /* Virtual */ | 88 | #define OMAP1510_FPGA_BASE IOMEM(0xE8000000) /* VA */ |
| 89 | #define OMAP1510_FPGA_SIZE SZ_4K | 89 | #define OMAP1510_FPGA_SIZE SZ_4K |
| 90 | #define OMAP1510_FPGA_START 0x08000000 /* Physical */ | 90 | #define OMAP1510_FPGA_START 0x08000000 /* PA */ |
| 91 | 91 | ||
| 92 | /* Revision */ | 92 | /* Revision */ |
| 93 | #define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) | 93 | #define OMAP1510_FPGA_REV_LOW (OMAP1510_FPGA_BASE + 0x0) |
diff --git a/arch/arm/plat-omap/include/mach/hardware.h b/arch/arm/plat-omap/include/mach/hardware.h index 07f5d7f21528..abb01e471c4c 100644 --- a/arch/arm/plat-omap/include/mach/hardware.h +++ b/arch/arm/plat-omap/include/mach/hardware.h | |||
| @@ -89,7 +89,7 @@ | |||
| 89 | #define DPLL_CTL (0xfffecf00) | 89 | #define DPLL_CTL (0xfffecf00) |
| 90 | 90 | ||
| 91 | /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ | 91 | /* DSP clock control. Must use __raw_readw() and __raw_writew() with these */ |
| 92 | #define DSP_CONFIG_REG_BASE (0xe1008000) | 92 | #define DSP_CONFIG_REG_BASE IOMEM(0xe1008000) |
| 93 | #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) | 93 | #define DSP_CKCTL (DSP_CONFIG_REG_BASE + 0x0) |
| 94 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) | 94 | #define DSP_IDLECT1 (DSP_CONFIG_REG_BASE + 0x4) |
| 95 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) | 95 | #define DSP_IDLECT2 (DSP_CONFIG_REG_BASE + 0x8) |