aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorLinus Torvalds <torvalds@linux-foundation.org>2008-10-23 11:18:33 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2008-10-23 11:18:33 -0400
commit309e1e4240636f3a9704d77a164a08e1f5a81fea (patch)
treec8d7cc16b6cc07dd421b1a6f5b3153345043753d
parent724bdd097e4d47b6ad963db5d92258ab5c485e05 (diff)
parent7cf5244ce4a0ab3f043f2e9593e07516b0df5715 (diff)
Merge branch 'for-next' of git://git.o-hand.com/linux-mfd
* 'for-next' of git://git.o-hand.com/linux-mfd: mfd: check for platform_get_irq() return value in sm501 mfd: use pci_ioremap_bar() in sm501 mfd: Don't store volatile bits in WM8350 register cache mfd: don't export wm3850 static functions mfd: twl4030-gpio driver mfd: rtc-twl4030 driver mfd: twl4030 IRQ handling update
Diffstat
-rw-r--r--drivers/gpio/Kconfig7
-rw-r--r--drivers/gpio/Makefile1
-rw-r--r--drivers/gpio/twl4030-gpio.c521
-rw-r--r--drivers/mfd/Makefile2
-rw-r--r--drivers/mfd/sm501.c25
-rw-r--r--drivers/mfd/twl4030-core.c421
-rw-r--r--drivers/mfd/twl4030-irq.c743
-rw-r--r--drivers/mfd/wm8350-core.c5
-rw-r--r--drivers/rtc/Kconfig10
-rw-r--r--drivers/rtc/Makefile1
-rw-r--r--drivers/rtc/rtc-twl4030.c564
-rw-r--r--include/linux/i2c/twl4030.h28
12 files changed, 1897 insertions, 431 deletions
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index dbd42d6c93a7..7f2ee27fe76b 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -127,6 +127,13 @@ config GPIO_PCF857X
127 This driver provides an in-kernel interface to those GPIOs using 127 This driver provides an in-kernel interface to those GPIOs using
128 platform-neutral GPIO calls. 128 platform-neutral GPIO calls.
129 129
130config GPIO_TWL4030
131 tristate "TWL4030, TWL5030, and TPS659x0 GPIOs"
132 depends on TWL4030_CORE
133 help
134 Say yes here to access the GPIO signals of various multi-function
135 power management chips from Texas Instruments.
136
130comment "PCI GPIO expanders:" 137comment "PCI GPIO expanders:"
131 138
132config GPIO_BT8XX 139config GPIO_BT8XX
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 01b4bbde1956..6aafdeb9ad03 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -9,4 +9,5 @@ obj-$(CONFIG_GPIO_MAX732X) += max732x.o
9obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o 9obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
10obj-$(CONFIG_GPIO_PCA953X) += pca953x.o 10obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
11obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o 11obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
12obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o
12obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o 13obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o
diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
new file mode 100644
index 000000000000..37d3eec8730a
--- /dev/null
+++ b/drivers/gpio/twl4030-gpio.c
@@ -0,0 +1,521 @@
1/*
2 * twl4030_gpio.c -- access to GPIOs on TWL4030/TPS659x0 chips
3 *
4 * Copyright (C) 2006-2007 Texas Instruments, Inc.
5 * Copyright (C) 2006 MontaVista Software, Inc.
6 *
7 * Code re-arranged and cleaned up by:
8 * Syed Mohammed Khasim <x0khasim@ti.com>
9 *
10 * Initial Code:
11 * Andy Lowe / Nishanth Menon
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
26 */
27
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/interrupt.h>
31#include <linux/kthread.h>
32#include <linux/irq.h>
33#include <linux/gpio.h>
34#include <linux/platform_device.h>
35#include <linux/slab.h>
36
37#include <linux/i2c/twl4030.h>
38
39
40/*
41 * The GPIO "subchip" supports 18 GPIOs which can be configured as
42 * inputs or outputs, with pullups or pulldowns on each pin. Each
43 * GPIO can trigger interrupts on either or both edges.
44 *
45 * GPIO interrupts can be fed to either of two IRQ lines; this is
46 * intended to support multiple hosts.
47 *
48 * There are also two LED pins used sometimes as output-only GPIOs.
49 */
50
51
52static struct gpio_chip twl_gpiochip;
53static int twl4030_gpio_irq_base;
54
55/* genirq interfaces are not available to modules */
56#ifdef MODULE
57#define is_module() true
58#else
59#define is_module() false
60#endif
61
62/* GPIO_CTRL Fields */
63#define MASK_GPIO_CTRL_GPIO0CD1 BIT(0)
64#define MASK_GPIO_CTRL_GPIO1CD2 BIT(1)
65#define MASK_GPIO_CTRL_GPIO_ON BIT(2)
66
67/* Mask for GPIO registers when aggregated into a 32-bit integer */
68#define GPIO_32_MASK 0x0003ffff
69
70/* Data structures */
71static DEFINE_MUTEX(gpio_lock);
72
73/* store usage of each GPIO. - each bit represents one GPIO */
74static unsigned int gpio_usage_count;
75
76/*----------------------------------------------------------------------*/
77
78/*
79 * To configure TWL4030 GPIO module registers
80 */
81static inline int gpio_twl4030_write(u8 address, u8 data)
82{
83 return twl4030_i2c_write_u8(TWL4030_MODULE_GPIO, data, address);
84}
85
86/*----------------------------------------------------------------------*/
87
88/*
89 * LED register offsets (use TWL4030_MODULE_{LED,PWMA,PWMB}))
90 * PWMs A and B are dedicated to LEDs A and B, respectively.
91 */
92
93#define TWL4030_LED_LEDEN 0x0
94
95/* LEDEN bits */
96#define LEDEN_LEDAON BIT(0)
97#define LEDEN_LEDBON BIT(1)
98#define LEDEN_LEDAEXT BIT(2)
99#define LEDEN_LEDBEXT BIT(3)
100#define LEDEN_LEDAPWM BIT(4)
101#define LEDEN_LEDBPWM BIT(5)
102#define LEDEN_PWM_LENGTHA BIT(6)
103#define LEDEN_PWM_LENGTHB BIT(7)
104
105#define TWL4030_PWMx_PWMxON 0x0
106#define TWL4030_PWMx_PWMxOFF 0x1
107
108#define PWMxON_LENGTH BIT(7)
109
110/*----------------------------------------------------------------------*/
111
112/*
113 * To read a TWL4030 GPIO module register
114 */
115static inline int gpio_twl4030_read(u8 address)
116{
117 u8 data;
118 int ret = 0;
119
120 ret = twl4030_i2c_read_u8(TWL4030_MODULE_GPIO, &data, address);
121 return (ret < 0) ? ret : data;
122}
123
124/*----------------------------------------------------------------------*/
125
126static u8 cached_leden; /* protected by gpio_lock */
127
128/* The LED lines are open drain outputs ... a FET pulls to GND, so an
129 * external pullup is needed. We could also expose the integrated PWM
130 * as a LED brightness control; we initialize it as "always on".
131 */
132static void twl4030_led_set_value(int led, int value)
133{
134 u8 mask = LEDEN_LEDAON | LEDEN_LEDAPWM;
135 int status;
136
137 if (led)
138 mask <<= 1;
139
140 mutex_lock(&gpio_lock);
141 if (value)
142 cached_leden &= ~mask;
143 else
144 cached_leden |= mask;
145 status = twl4030_i2c_write_u8(TWL4030_MODULE_LED, cached_leden,
146 TWL4030_LED_LEDEN);
147 mutex_unlock(&gpio_lock);
148}
149
150static int twl4030_set_gpio_direction(int gpio, int is_input)
151{
152 u8 d_bnk = gpio >> 3;
153 u8 d_msk = BIT(gpio & 0x7);
154 u8 reg = 0;
155 u8 base = REG_GPIODATADIR1 + d_bnk;
156 int ret = 0;
157
158 mutex_lock(&gpio_lock);
159 ret = gpio_twl4030_read(base);
160 if (ret >= 0) {
161 if (is_input)
162 reg = ret & ~d_msk;
163 else
164 reg = ret | d_msk;
165
166 ret = gpio_twl4030_write(base, reg);
167 }
168 mutex_unlock(&gpio_lock);
169 return ret;
170}
171
172static int twl4030_set_gpio_dataout(int gpio, int enable)
173{
174 u8 d_bnk = gpio >> 3;
175 u8 d_msk = BIT(gpio & 0x7);
176 u8 base = 0;
177
178 if (enable)
179 base = REG_SETGPIODATAOUT1 + d_bnk;
180 else
181 base = REG_CLEARGPIODATAOUT1 + d_bnk;
182
183 return gpio_twl4030_write(base, d_msk);
184}
185
186static int twl4030_get_gpio_datain(int gpio)
187{
188 u8 d_bnk = gpio >> 3;
189 u8 d_off = gpio & 0x7;
190 u8 base = 0;
191 int ret = 0;
192
193 if (unlikely((gpio >= TWL4030_GPIO_MAX)
194 || !(gpio_usage_count & BIT(gpio))))
195 return -EPERM;
196
197 base = REG_GPIODATAIN1 + d_bnk;
198 ret = gpio_twl4030_read(base);
199 if (ret > 0)
200 ret = (ret >> d_off) & 0x1;
201
202 return ret;
203}
204
205/*
206 * Configure debounce timing value for a GPIO pin on TWL4030
207 */
208int twl4030_set_gpio_debounce(int gpio, int enable)
209{
210 u8 d_bnk = gpio >> 3;
211 u8 d_msk = BIT(gpio & 0x7);
212 u8 reg = 0;
213 u8 base = 0;
214 int ret = 0;
215
216 if (unlikely((gpio >= TWL4030_GPIO_MAX)
217 || !(gpio_usage_count & BIT(gpio))))
218 return -EPERM;
219
220 base = REG_GPIO_DEBEN1 + d_bnk;
221 mutex_lock(&gpio_lock);
222 ret = gpio_twl4030_read(base);
223 if (ret >= 0) {
224 if (enable)
225 reg = ret | d_msk;
226 else
227 reg = ret & ~d_msk;
228
229 ret = gpio_twl4030_write(base, reg);
230 }
231 mutex_unlock(&gpio_lock);
232 return ret;
233}
234EXPORT_SYMBOL(twl4030_set_gpio_debounce);
235
236/*----------------------------------------------------------------------*/
237
238static int twl_request(struct gpio_chip *chip, unsigned offset)
239{
240 int status = 0;
241
242 mutex_lock(&gpio_lock);
243
244 /* Support the two LED outputs as output-only GPIOs. */
245 if (offset >= TWL4030_GPIO_MAX) {
246 u8 ledclr_mask = LEDEN_LEDAON | LEDEN_LEDAEXT
247 | LEDEN_LEDAPWM | LEDEN_PWM_LENGTHA;
248 u8 module = TWL4030_MODULE_PWMA;
249
250 offset -= TWL4030_GPIO_MAX;
251 if (offset) {
252 ledclr_mask <<= 1;
253 module = TWL4030_MODULE_PWMB;
254 }
255
256 /* initialize PWM to always-drive */
257 status = twl4030_i2c_write_u8(module, 0x7f,
258 TWL4030_PWMx_PWMxOFF);
259 if (status < 0)
260 goto done;
261 status = twl4030_i2c_write_u8(module, 0x7f,
262 TWL4030_PWMx_PWMxON);
263 if (status < 0)
264 goto done;
265
266 /* init LED to not-driven (high) */
267 module = TWL4030_MODULE_LED;
268 status = twl4030_i2c_read_u8(module, &cached_leden,
269 TWL4030_LED_LEDEN);
270 if (status < 0)
271 goto done;
272 cached_leden &= ~ledclr_mask;
273 status = twl4030_i2c_write_u8(module, cached_leden,
274 TWL4030_LED_LEDEN);
275 if (status < 0)
276 goto done;
277
278 status = 0;
279 goto done;
280 }
281
282 /* on first use, turn GPIO module "on" */
283 if (!gpio_usage_count) {
284 struct twl4030_gpio_platform_data *pdata;
285 u8 value = MASK_GPIO_CTRL_GPIO_ON;
286
287 /* optionally have the first two GPIOs switch vMMC1
288 * and vMMC2 power supplies based on card presence.
289 */
290 pdata = chip->dev->platform_data;
291 value |= pdata->mmc_cd & 0x03;
292
293 status = gpio_twl4030_write(REG_GPIO_CTRL, value);
294 }
295
296 if (!status)
297 gpio_usage_count |= (0x1 << offset);
298
299done:
300 mutex_unlock(&gpio_lock);
301 return status;
302}
303
304static void twl_free(struct gpio_chip *chip, unsigned offset)
305{
306 if (offset >= TWL4030_GPIO_MAX) {
307 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, 1);
308 return;
309 }
310
311 mutex_lock(&gpio_lock);
312
313 gpio_usage_count &= ~BIT(offset);
314
315 /* on last use, switch off GPIO module */
316 if (!gpio_usage_count)
317 gpio_twl4030_write(REG_GPIO_CTRL, 0x0);
318
319 mutex_unlock(&gpio_lock);
320}
321
322static int twl_direction_in(struct gpio_chip *chip, unsigned offset)
323{
324 return (offset < TWL4030_GPIO_MAX)
325 ? twl4030_set_gpio_direction(offset, 1)
326 : -EINVAL;
327}
328
329static int twl_get(struct gpio_chip *chip, unsigned offset)
330{
331 int status = 0;
332
333 if (offset < TWL4030_GPIO_MAX)
334 status = twl4030_get_gpio_datain(offset);
335 else if (offset == TWL4030_GPIO_MAX)
336 status = cached_leden & LEDEN_LEDAON;
337 else
338 status = cached_leden & LEDEN_LEDBON;
339 return (status < 0) ? 0 : status;
340}
341
342static int twl_direction_out(struct gpio_chip *chip, unsigned offset, int value)
343{
344 if (offset < TWL4030_GPIO_MAX) {
345 twl4030_set_gpio_dataout(offset, value);
346 return twl4030_set_gpio_direction(offset, 0);
347 } else {
348 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value);
349 return 0;
350 }
351}
352
353static void twl_set(struct gpio_chip *chip, unsigned offset, int value)
354{
355 if (offset < TWL4030_GPIO_MAX)
356 twl4030_set_gpio_dataout(offset, value);
357 else
358 twl4030_led_set_value(offset - TWL4030_GPIO_MAX, value);
359}
360
361static int twl_to_irq(struct gpio_chip *chip, unsigned offset)
362{
363 return (twl4030_gpio_irq_base && (offset < TWL4030_GPIO_MAX))
364 ? (twl4030_gpio_irq_base + offset)
365 : -EINVAL;
366}
367
368static struct gpio_chip twl_gpiochip = {
369 .label = "twl4030",
370 .owner = THIS_MODULE,
371 .request = twl_request,
372 .free = twl_free,
373 .direction_input = twl_direction_in,
374 .get = twl_get,
375 .direction_output = twl_direction_out,
376 .set = twl_set,
377 .to_irq = twl_to_irq,
378 .can_sleep = 1,
379};
380
381/*----------------------------------------------------------------------*/
382
383static int __devinit gpio_twl4030_pulls(u32 ups, u32 downs)
384{
385 u8 message[6];
386 unsigned i, gpio_bit;
387
388 /* For most pins, a pulldown was enabled by default.
389 * We should have data that's specific to this board.
390 */
391 for (gpio_bit = 1, i = 1; i < 6; i++) {
392 u8 bit_mask;
393 unsigned j;
394
395 for (bit_mask = 0, j = 0; j < 8; j += 2, gpio_bit <<= 1) {
396 if (ups & gpio_bit)
397 bit_mask |= 1 << (j + 1);
398 else if (downs & gpio_bit)
399 bit_mask |= 1 << (j + 0);
400 }
401 message[i] = bit_mask;
402 }
403
404 return twl4030_i2c_write(TWL4030_MODULE_GPIO, message,
405 REG_GPIOPUPDCTR1, 5);
406}
407
408static int gpio_twl4030_remove(struct platform_device *pdev);
409
410static int __devinit gpio_twl4030_probe(struct platform_device *pdev)
411{
412 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
413 int ret;
414
415 /* maybe setup IRQs */
416 if (pdata->irq_base) {
417 if (is_module()) {
418 dev_err(&pdev->dev,
419 "can't dispatch IRQs from modules\n");
420 goto no_irqs;
421 }
422 ret = twl4030_sih_setup(TWL4030_MODULE_GPIO);
423 if (ret < 0)
424 return ret;
425 WARN_ON(ret != pdata->irq_base);
426 twl4030_gpio_irq_base = ret;
427 }
428
429no_irqs:
430 /*
431 * NOTE: boards may waste power if they don't set pullups
432 * and pulldowns correctly ... default for non-ULPI pins is
433 * pulldown, and some other pins may have external pullups
434 * or pulldowns. Careful!
435 */
436 ret = gpio_twl4030_pulls(pdata->pullups, pdata->pulldowns);
437 if (ret)
438 dev_dbg(&pdev->dev, "pullups %.05x %.05x --> %d\n",
439 pdata->pullups, pdata->pulldowns,
440 ret);
441
442 twl_gpiochip.base = pdata->gpio_base;
443 twl_gpiochip.ngpio = TWL4030_GPIO_MAX;
444 twl_gpiochip.dev = &pdev->dev;
445
446 /* NOTE: we assume VIBRA_CTL.VIBRA_EN, in MODULE_AUDIO_VOICE,
447 * is (still) clear if use_leds is set.
448 */
449 if (pdata->use_leds)
450 twl_gpiochip.ngpio += 2;
451
452 ret = gpiochip_add(&twl_gpiochip);
453 if (ret < 0) {
454 dev_err(&pdev->dev,
455 "could not register gpiochip, %d\n",
456 ret);
457 twl_gpiochip.ngpio = 0;
458 gpio_twl4030_remove(pdev);
459 } else if (pdata->setup) {
460 int status;
461
462 status = pdata->setup(&pdev->dev,
463 pdata->gpio_base, TWL4030_GPIO_MAX);
464 if (status)
465 dev_dbg(&pdev->dev, "setup --> %d\n", status);
466 }
467
468 return ret;
469}
470
471static int __devexit gpio_twl4030_remove(struct platform_device *pdev)
472{
473 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
474 int status;
475
476 if (pdata->teardown) {
477 status = pdata->teardown(&pdev->dev,
478 pdata->gpio_base, TWL4030_GPIO_MAX);
479 if (status) {
480 dev_dbg(&pdev->dev, "teardown --> %d\n", status);
481 return status;
482 }
483 }
484
485 status = gpiochip_remove(&twl_gpiochip);
486 if (status < 0)
487 return status;
488
489 if (is_module())
490 return 0;
491
492 /* REVISIT no support yet for deregistering all the IRQs */
493 WARN_ON(1);
494 return -EIO;
495}
496
497/* Note: this hardware lives inside an I2C-based multi-function device. */
498MODULE_ALIAS("platform:twl4030_gpio");
499
500static struct platform_driver gpio_twl4030_driver = {
501 .driver.name = "twl4030_gpio",
502 .driver.owner = THIS_MODULE,
503 .probe = gpio_twl4030_probe,
504 .remove = __devexit_p(gpio_twl4030_remove),
505};
506
507static int __init gpio_twl4030_init(void)
508{
509 return platform_driver_register(&gpio_twl4030_driver);
510}
511subsys_initcall(gpio_twl4030_init);
512
513static void __exit gpio_twl4030_exit(void)
514{
515 platform_driver_unregister(&gpio_twl4030_driver);
516}
517module_exit(gpio_twl4030_exit);
518
519MODULE_AUTHOR("Texas Instruments, Inc.");
520MODULE_DESCRIPTION("GPIO interface for TWL4030");
521MODULE_LICENSE("GPL");
diff --git a/drivers/mfd/Makefile b/drivers/mfd/Makefile
index 68e237b830ad..0acefe8aff87 100644
--- a/drivers/mfd/Makefile
+++ b/drivers/mfd/Makefile
@@ -17,7 +17,7 @@ wm8350-objs := wm8350-core.o wm8350-regmap.o wm8350-gpio.o
17obj-$(CONFIG_MFD_WM8350) += wm8350.o 17obj-$(CONFIG_MFD_WM8350) += wm8350.o
18obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o 18obj-$(CONFIG_MFD_WM8350_I2C) += wm8350-i2c.o
19 19
20obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o 20obj-$(CONFIG_TWL4030_CORE) += twl4030-core.o twl4030-irq.o
21 21
22obj-$(CONFIG_MFD_CORE) += mfd-core.o 22obj-$(CONFIG_MFD_CORE) += mfd-core.o
23 23
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 220e4371266b..170f9d47c2f9 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -1374,31 +1374,31 @@ static int sm501_init_dev(struct sm501_devdata *sm)
1374static int sm501_plat_probe(struct platform_device *dev) 1374static int sm501_plat_probe(struct platform_device *dev)
1375{ 1375{
1376 struct sm501_devdata *sm; 1376 struct sm501_devdata *sm;
1377 int err; 1377 int ret;
1378 1378
1379 sm = kzalloc(sizeof(struct sm501_devdata), GFP_KERNEL); 1379 sm = kzalloc(sizeof(struct sm501_devdata), GFP_KERNEL);
1380 if (sm == NULL) { 1380 if (sm == NULL) {
1381 dev_err(&dev->dev, "no memory for device data\n"); 1381 dev_err(&dev->dev, "no memory for device data\n");
1382 err = -ENOMEM; 1382 ret = -ENOMEM;
1383 goto err1; 1383 goto err1;
1384 } 1384 }
1385 1385
1386 sm->dev = &dev->dev; 1386 sm->dev = &dev->dev;
1387 sm->pdev_id = dev->id; 1387 sm->pdev_id = dev->id;
1388 sm->irq = platform_get_irq(dev, 0);
1389 sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1390 sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1391 sm->platdata = dev->dev.platform_data; 1388 sm->platdata = dev->dev.platform_data;
1392 1389
1393 if (sm->irq < 0) { 1390 ret = platform_get_irq(dev, 0);
1391 if (ret < 0) {
1394 dev_err(&dev->dev, "failed to get irq resource\n"); 1392 dev_err(&dev->dev, "failed to get irq resource\n");
1395 err = sm->irq;
1396 goto err_res; 1393 goto err_res;
1397 } 1394 }
1395 sm->irq = ret;
1398 1396
1397 sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
1398 sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
1399 if (sm->io_res == NULL || sm->mem_res == NULL) { 1399 if (sm->io_res == NULL || sm->mem_res == NULL) {
1400 dev_err(&dev->dev, "failed to get IO resource\n"); 1400 dev_err(&dev->dev, "failed to get IO resource\n");
1401 err = -ENOENT; 1401 ret = -ENOENT;
1402 goto err_res; 1402 goto err_res;
1403 } 1403 }
1404 1404
@@ -1407,7 +1407,7 @@ static int sm501_plat_probe(struct platform_device *dev)
1407 1407
1408 if (sm->regs_claim == NULL) { 1408 if (sm->regs_claim == NULL) {
1409 dev_err(&dev->dev, "cannot claim registers\n"); 1409 dev_err(&dev->dev, "cannot claim registers\n");
1410 err= -EBUSY; 1410 ret = -EBUSY;
1411 goto err_res; 1411 goto err_res;
1412 } 1412 }
1413 1413
@@ -1418,7 +1418,7 @@ static int sm501_plat_probe(struct platform_device *dev)
1418 1418
1419 if (sm->regs == NULL) { 1419 if (sm->regs == NULL) {
1420 dev_err(&dev->dev, "cannot remap registers\n"); 1420 dev_err(&dev->dev, "cannot remap registers\n");
1421 err = -EIO; 1421 ret = -EIO;
1422 goto err_claim; 1422 goto err_claim;
1423 } 1423 }
1424 1424
@@ -1430,7 +1430,7 @@ static int sm501_plat_probe(struct platform_device *dev)
1430 err_res: 1430 err_res:
1431 kfree(sm); 1431 kfree(sm);
1432 err1: 1432 err1:
1433 return err; 1433 return ret;
1434 1434
1435} 1435}
1436 1436
@@ -1625,8 +1625,7 @@ static int sm501_pci_probe(struct pci_dev *dev,
1625 goto err3; 1625 goto err3;
1626 } 1626 }
1627 1627
1628 sm->regs = ioremap(pci_resource_start(dev, 1), 1628 sm->regs = pci_ioremap_bar(dev, 1);
1629 pci_resource_len(dev, 1));
1630 1629
1631 if (sm->regs == NULL) { 1630 if (sm->regs == NULL) {
1632 dev_err(&dev->dev, "cannot remap registers\n"); 1631 dev_err(&dev->dev, "cannot remap registers\n");
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index fd9a0160202c..dd843c4fbcc7 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -27,15 +27,11 @@
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 */ 28 */
29 29
30#include <linux/kernel_stat.h>
31#include <linux/init.h> 30#include <linux/init.h>
32#include <linux/mutex.h> 31#include <linux/mutex.h>
33#include <linux/interrupt.h>
34#include <linux/irq.h>
35#include <linux/random.h>
36#include <linux/kthread.h>
37#include <linux/platform_device.h> 32#include <linux/platform_device.h>
38#include <linux/clk.h> 33#include <linux/clk.h>
34#include <linux/err.h>
39 35
40#include <linux/i2c.h> 36#include <linux/i2c.h>
41#include <linux/i2c/twl4030.h> 37#include <linux/i2c/twl4030.h>
@@ -93,26 +89,6 @@
93#define twl_has_usb() false 89#define twl_has_usb() false
94#endif 90#endif
95 91
96static inline void activate_irq(int irq)
97{
98#ifdef CONFIG_ARM
99 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
100 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
101 */
102 set_irq_flags(irq, IRQF_VALID);
103#else
104 /* same effect on other architectures */
105 set_irq_noprobe(irq);
106#endif
107}
108
109/* Primary Interrupt Handler on TWL4030 Registers */
110
111/* Register Definitions */
112
113#define REG_PIH_ISR_P1 (0x1)
114#define REG_PIH_ISR_P2 (0x2)
115#define REG_PIH_SIR (0x3)
116 92
117/* Triton Core internal information (BEGIN) */ 93/* Triton Core internal information (BEGIN) */
118 94
@@ -175,138 +151,6 @@ static inline void activate_irq(int irq)
175 151
176/*----------------------------------------------------------------------*/ 152/*----------------------------------------------------------------------*/
177 153
178/**
179 * struct twl4030_mod_iregs - TWL module IMR/ISR regs to mask/clear at init
180 * @mod_no: TWL4030 module number (e.g., TWL4030_MODULE_GPIO)
181 * @sih_ctrl: address of module SIH_CTRL register
182 * @reg_cnt: number of IMR/ISR regs
183 * @imrs: pointer to array of TWL module interrupt mask register indices
184 * @isrs: pointer to array of TWL module interrupt status register indices
185 *
186 * Ties together TWL4030 modules and lists of IMR/ISR registers to mask/clear
187 * during twl_init_irq().
188 */
189struct twl4030_mod_iregs {
190 const u8 mod_no;
191 const u8 sih_ctrl;
192 const u8 reg_cnt;
193 const u8 *imrs;
194 const u8 *isrs;
195};
196
197/* TWL4030 INT module interrupt mask registers */
198static const u8 __initconst twl4030_int_imr_regs[] = {
199 TWL4030_INT_PWR_IMR1,
200 TWL4030_INT_PWR_IMR2,
201};
202
203/* TWL4030 INT module interrupt status registers */
204static const u8 __initconst twl4030_int_isr_regs[] = {
205 TWL4030_INT_PWR_ISR1,
206 TWL4030_INT_PWR_ISR2,
207};
208
209/* TWL4030 INTERRUPTS module interrupt mask registers */
210static const u8 __initconst twl4030_interrupts_imr_regs[] = {
211 TWL4030_INTERRUPTS_BCIIMR1A,
212 TWL4030_INTERRUPTS_BCIIMR1B,
213 TWL4030_INTERRUPTS_BCIIMR2A,
214 TWL4030_INTERRUPTS_BCIIMR2B,
215};
216
217/* TWL4030 INTERRUPTS module interrupt status registers */
218static const u8 __initconst twl4030_interrupts_isr_regs[] = {
219 TWL4030_INTERRUPTS_BCIISR1A,
220 TWL4030_INTERRUPTS_BCIISR1B,
221 TWL4030_INTERRUPTS_BCIISR2A,
222 TWL4030_INTERRUPTS_BCIISR2B,
223};
224
225/* TWL4030 MADC module interrupt mask registers */
226static const u8 __initconst twl4030_madc_imr_regs[] = {
227 TWL4030_MADC_IMR1,
228 TWL4030_MADC_IMR2,
229};
230
231/* TWL4030 MADC module interrupt status registers */
232static const u8 __initconst twl4030_madc_isr_regs[] = {
233 TWL4030_MADC_ISR1,
234 TWL4030_MADC_ISR2,
235};
236
237/* TWL4030 keypad module interrupt mask registers */
238static const u8 __initconst twl4030_keypad_imr_regs[] = {
239 TWL4030_KEYPAD_KEYP_IMR1,
240 TWL4030_KEYPAD_KEYP_IMR2,
241};
242
243/* TWL4030 keypad module interrupt status registers */
244static const u8 __initconst twl4030_keypad_isr_regs[] = {
245 TWL4030_KEYPAD_KEYP_ISR1,
246 TWL4030_KEYPAD_KEYP_ISR2,
247};
248
249/* TWL4030 GPIO module interrupt mask registers */
250static const u8 __initconst twl4030_gpio_imr_regs[] = {
251 REG_GPIO_IMR1A,
252 REG_GPIO_IMR1B,
253 REG_GPIO_IMR2A,
254 REG_GPIO_IMR2B,
255 REG_GPIO_IMR3A,
256 REG_GPIO_IMR3B,
257};
258
259/* TWL4030 GPIO module interrupt status registers */
260static const u8 __initconst twl4030_gpio_isr_regs[] = {
261 REG_GPIO_ISR1A,
262 REG_GPIO_ISR1B,
263 REG_GPIO_ISR2A,
264 REG_GPIO_ISR2B,
265 REG_GPIO_ISR3A,
266 REG_GPIO_ISR3B,
267};
268
269/* TWL4030 modules that have IMR/ISR registers that must be masked/cleared */
270static const struct twl4030_mod_iregs __initconst twl4030_mod_regs[] = {
271 {
272 .mod_no = TWL4030_MODULE_INT,
273 .sih_ctrl = TWL4030_INT_PWR_SIH_CTRL,
274 .reg_cnt = ARRAY_SIZE(twl4030_int_imr_regs),
275 .imrs = twl4030_int_imr_regs,
276 .isrs = twl4030_int_isr_regs,
277 },
278 {
279 .mod_no = TWL4030_MODULE_INTERRUPTS,
280 .sih_ctrl = TWL4030_INTERRUPTS_BCISIHCTRL,
281 .reg_cnt = ARRAY_SIZE(twl4030_interrupts_imr_regs),
282 .imrs = twl4030_interrupts_imr_regs,
283 .isrs = twl4030_interrupts_isr_regs,
284 },
285 {
286 .mod_no = TWL4030_MODULE_MADC,
287 .sih_ctrl = TWL4030_MADC_SIH_CTRL,
288 .reg_cnt = ARRAY_SIZE(twl4030_madc_imr_regs),
289 .imrs = twl4030_madc_imr_regs,
290 .isrs = twl4030_madc_isr_regs,
291 },
292 {
293 .mod_no = TWL4030_MODULE_KEYPAD,
294 .sih_ctrl = TWL4030_KEYPAD_KEYP_SIH_CTRL,
295 .reg_cnt = ARRAY_SIZE(twl4030_keypad_imr_regs),
296 .imrs = twl4030_keypad_imr_regs,
297 .isrs = twl4030_keypad_isr_regs,
298 },
299 {
300 .mod_no = TWL4030_MODULE_GPIO,
301 .sih_ctrl = REG_GPIO_SIH_CTRL,
302 .reg_cnt = ARRAY_SIZE(twl4030_gpio_imr_regs),
303 .imrs = twl4030_gpio_imr_regs,
304 .isrs = twl4030_gpio_isr_regs,
305 },
306};
307
308/*----------------------------------------------------------------*/
309
310/* is driver active, bound to a chip? */ 154/* is driver active, bound to a chip? */
311static bool inuse; 155static bool inuse;
312 156
@@ -367,33 +211,6 @@ static struct twl4030mapping twl4030_map[TWL4030_MODULE_LAST + 1] = {
367 211
368/*----------------------------------------------------------------------*/ 212/*----------------------------------------------------------------------*/
369 213
370/*
371 * TWL4030 doesn't have PIH mask, hence dummy function for mask
372 * and unmask of the (eight) interrupts reported at that level ...
373 * masking is only available from SIH (secondary) modules.
374 */
375
376static void twl4030_i2c_ackirq(unsigned int irq)
377{
378}
379
380static void twl4030_i2c_disableint(unsigned int irq)
381{
382}
383
384static void twl4030_i2c_enableint(unsigned int irq)
385{
386}
387
388static struct irq_chip twl4030_irq_chip = {
389 .name = "twl4030",
390 .ack = twl4030_i2c_ackirq,
391 .mask = twl4030_i2c_disableint,
392 .unmask = twl4030_i2c_enableint,
393};
394
395/*----------------------------------------------------------------------*/
396
397/* Exported Functions */ 214/* Exported Functions */
398 215
399/** 216/**
@@ -535,108 +352,11 @@ EXPORT_SYMBOL(twl4030_i2c_read_u8);
535 352
536/*----------------------------------------------------------------------*/ 353/*----------------------------------------------------------------------*/
537 354
538static unsigned twl4030_irq_base;
539
540static struct completion irq_event;
541
542/*
543 * This thread processes interrupts reported by the Primary Interrupt Handler.
544 */
545static int twl4030_irq_thread(void *data)
546{
547 long irq = (long)data;
548 irq_desc_t *desc = irq_desc + irq;
549 static unsigned i2c_errors;
550 const static unsigned max_i2c_errors = 100;
551
552 current->flags |= PF_NOFREEZE;
553
554 while (!kthread_should_stop()) {
555 int ret;
556 int module_irq;
557 u8 pih_isr;
558
559 /* Wait for IRQ, then read PIH irq status (also blocking) */
560 wait_for_completion_interruptible(&irq_event);
561
562 ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr,
563 REG_PIH_ISR_P1);
564 if (ret) {
565 pr_warning("%s: I2C error %d reading PIH ISR\n",
566 DRIVER_NAME, ret);
567 if (++i2c_errors >= max_i2c_errors) {
568 printk(KERN_ERR "Maximum I2C error count"
569 " exceeded. Terminating %s.\n",
570 __func__);
571 break;
572 }
573 complete(&irq_event);
574 continue;
575 }
576
577 /* these handlers deal with the relevant SIH irq status */
578 local_irq_disable();
579 for (module_irq = twl4030_irq_base;
580 pih_isr;
581 pih_isr >>= 1, module_irq++) {
582 if (pih_isr & 0x1) {
583 irq_desc_t *d = irq_desc + module_irq;
584
585 d->handle_irq(module_irq, d);
586 }
587 }
588 local_irq_enable();
589
590 desc->chip->unmask(irq);
591 }
592
593 return 0;
594}
595
596/* 355/*
597 * do_twl4030_irq() is the desc->handle method for the twl4030 interrupt. 356 * NOTE: We know the first 8 IRQs after pdata->base_irq are
598 * This is a chained interrupt, so there is no desc->action method for it. 357 * for the PIH, and the next are for the PWR_INT SIH, since
599 * Now we need to query the interrupt controller in the twl4030 to determine 358 * that's how twl_init_irq() sets things up.
600 * which module is generating the interrupt request. However, we can't do i2c
601 * transactions in interrupt context, so we must defer that work to a kernel
602 * thread. All we do here is acknowledge and mask the interrupt and wakeup
603 * the kernel thread.
604 */ 359 */
605static void do_twl4030_irq(unsigned int irq, irq_desc_t *desc)
606{
607 const unsigned int cpu = smp_processor_id();
608
609 /*
610 * Earlier this was desc->triggered = 1;
611 */
612 desc->status |= IRQ_LEVEL;
613
614 /*
615 * Acknowledge, clear _AND_ disable the interrupt.
616 */
617 desc->chip->ack(irq);
618
619 if (!desc->depth) {
620 kstat_cpu(cpu).irqs[irq]++;
621
622 complete(&irq_event);
623 }
624}
625
626static struct task_struct * __init start_twl4030_irq_thread(long irq)
627{
628 struct task_struct *thread;
629
630 init_completion(&irq_event);
631 thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq");
632 if (!thread)
633 pr_err("%s: could not create twl4030 irq %ld thread!\n",
634 DRIVER_NAME, irq);
635
636 return thread;
637}
638
639/*----------------------------------------------------------------------*/
640 360
641static int add_children(struct twl4030_platform_data *pdata) 361static int add_children(struct twl4030_platform_data *pdata)
642{ 362{
@@ -668,7 +388,7 @@ static int add_children(struct twl4030_platform_data *pdata)
668 388
669 if (status == 0) { 389 if (status == 0) {
670 struct resource r = { 390 struct resource r = {
671 .start = TWL4030_PWRIRQ_CHG_PRES, 391 .start = pdata->irq_base + 8 + 1,
672 .flags = IORESOURCE_IRQ, 392 .flags = IORESOURCE_IRQ,
673 }; 393 };
674 394
@@ -817,8 +537,7 @@ static int add_children(struct twl4030_platform_data *pdata)
817 /* RTC module IRQ */ 537 /* RTC module IRQ */
818 if (status == 0) { 538 if (status == 0) {
819 struct resource r = { 539 struct resource r = {
820 /* REVISIT don't hard-wire this stuff */ 540 .start = pdata->irq_base + 8 + 3,
821 .start = TWL4030_PWRIRQ_RTC,
822 .flags = IORESOURCE_IRQ, 541 .flags = IORESOURCE_IRQ,
823 }; 542 };
824 543
@@ -863,7 +582,7 @@ static int add_children(struct twl4030_platform_data *pdata)
863 582
864 if (status == 0) { 583 if (status == 0) {
865 struct resource r = { 584 struct resource r = {
866 .start = TWL4030_PWRIRQ_USB_PRES, 585 .start = pdata->irq_base + 8 + 2,
867 .flags = IORESOURCE_IRQ, 586 .flags = IORESOURCE_IRQ,
868 }; 587 };
869 588
@@ -965,123 +684,17 @@ static void __init clocks_init(void)
965 684
966/*----------------------------------------------------------------------*/ 685/*----------------------------------------------------------------------*/
967 686
968/** 687int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end);
969 * twl4030_i2c_clear_isr - clear TWL4030 SIH ISR regs via read + write 688int twl_exit_irq(void);
970 * @mod_no: TWL4030 module number
971 * @reg: register index to clear
972 * @cor: value of the <module>_SIH_CTRL.COR bit (1 or 0)
973 *
974 * Either reads (cor == 1) or writes (cor == 0) to a TWL4030 interrupt
975 * status register to ensure that any prior interrupts are cleared.
976 * Returns the status from the I2C read operation.
977 */
978static int __init twl4030_i2c_clear_isr(u8 mod_no, u8 reg, u8 cor)
979{
980 u8 tmp;
981
982 return (cor) ? twl4030_i2c_read_u8(mod_no, &tmp, reg) :
983 twl4030_i2c_write_u8(mod_no, 0xff, reg);
984}
985
986/**
987 * twl4030_read_cor_bit - are TWL module ISRs cleared by reads or writes?
988 * @mod_no: TWL4030 module number
989 * @reg: register index to clear
990 *
991 * Returns 1 if the TWL4030 SIH interrupt status registers (ISRs) for
992 * the specified TWL module are cleared by reads, or 0 if cleared by
993 * writes.
994 */
995static int twl4030_read_cor_bit(u8 mod_no, u8 reg)
996{
997 u8 tmp = 0;
998
999 WARN_ON(twl4030_i2c_read_u8(mod_no, &tmp, reg) < 0);
1000
1001 tmp &= TWL4030_SIH_CTRL_COR_MASK;
1002 tmp >>= __ffs(TWL4030_SIH_CTRL_COR_MASK);
1003
1004 return tmp;
1005}
1006
1007/**
1008 * twl4030_mask_clear_intrs - mask and clear all TWL4030 interrupts
1009 * @t: pointer to twl4030_mod_iregs array
1010 * @t_sz: ARRAY_SIZE(t) (starting at 1)
1011 *
1012 * Mask all TWL4030 interrupt mask registers (IMRs) and clear all
1013 * interrupt status registers (ISRs). No return value, but will WARN if
1014 * any I2C operations fail.
1015 */
1016static void __init twl4030_mask_clear_intrs(const struct twl4030_mod_iregs *t,
1017 const u8 t_sz)
1018{
1019 int i, j;
1020
1021 /*
1022 * N.B. - further efficiency is possible here. Eight I2C
1023 * operations on BCI and GPIO modules are avoidable if I2C
1024 * burst read/write transactions were implemented. Would
1025 * probably save about 1ms of boot time and a small amount of
1026 * power.
1027 */
1028 for (i = 0; i < t_sz; i++) {
1029 const struct twl4030_mod_iregs tmr = t[i];
1030 int cor;
1031
1032 /* Are ISRs cleared by reads or writes? */
1033 cor = twl4030_read_cor_bit(tmr.mod_no, tmr.sih_ctrl);
1034
1035 for (j = 0; j < tmr.reg_cnt; j++) {
1036
1037 /* Mask interrupts at the TWL4030 */
1038 WARN_ON(twl4030_i2c_write_u8(tmr.mod_no, 0xff,
1039 tmr.imrs[j]) < 0);
1040
1041 /* Clear TWL4030 ISRs */
1042 WARN_ON(twl4030_i2c_clear_isr(tmr.mod_no,
1043 tmr.isrs[j], cor) < 0);
1044 }
1045 }
1046}
1047
1048
1049static void twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
1050{
1051 int i;
1052
1053 /*
1054 * Mask and clear all TWL4030 interrupts since initially we do
1055 * not have any TWL4030 module interrupt handlers present
1056 */
1057 twl4030_mask_clear_intrs(twl4030_mod_regs,
1058 ARRAY_SIZE(twl4030_mod_regs));
1059
1060 twl4030_irq_base = irq_base;
1061
1062 /* install an irq handler for each of the PIH modules */
1063 for (i = irq_base; i < irq_end; i++) {
1064 set_irq_chip_and_handler(i, &twl4030_irq_chip,
1065 handle_simple_irq);
1066 activate_irq(i);
1067 }
1068
1069 /* install an irq handler to demultiplex the TWL4030 interrupt */
1070 set_irq_data(irq_num, start_twl4030_irq_thread(irq_num));
1071 set_irq_chained_handler(irq_num, do_twl4030_irq);
1072}
1073
1074/*----------------------------------------------------------------------*/
1075 689
1076static int twl4030_remove(struct i2c_client *client) 690static int twl4030_remove(struct i2c_client *client)
1077{ 691{
1078 unsigned i; 692 unsigned i;
693 int status;
1079 694
1080 /* FIXME undo twl_init_irq() */ 695 status = twl_exit_irq();
1081 if (twl4030_irq_base) { 696 if (status < 0)
1082 dev_err(&client->dev, "can't yet clean up IRQs?\n"); 697 return status;
1083 return -ENOSYS;
1084 }
1085 698
1086 for (i = 0; i < TWL4030_NUM_SLAVES; i++) { 699 for (i = 0; i < TWL4030_NUM_SLAVES; i++) {
1087 struct twl4030_client *twl = &twl4030_modules[i]; 700 struct twl4030_client *twl = &twl4030_modules[i];
@@ -1112,7 +725,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
1112 return -EIO; 725 return -EIO;
1113 } 726 }
1114 727
1115 if (inuse || twl4030_irq_base) { 728 if (inuse) {
1116 dev_dbg(&client->dev, "driver is already in use\n"); 729 dev_dbg(&client->dev, "driver is already in use\n");
1117 return -EBUSY; 730 return -EBUSY;
1118 } 731 }
@@ -1146,9 +759,9 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
1146 if (client->irq 759 if (client->irq
1147 && pdata->irq_base 760 && pdata->irq_base
1148 && pdata->irq_end > pdata->irq_base) { 761 && pdata->irq_end > pdata->irq_base) {
1149 twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end); 762 status = twl_init_irq(client->irq, pdata->irq_base, pdata->irq_end);
1150 dev_info(&client->dev, "IRQ %d chains IRQs %d..%d\n", 763 if (status < 0)
1151 client->irq, pdata->irq_base, pdata->irq_end - 1); 764 goto fail;
1152 } 765 }
1153 766
1154 status = add_children(pdata); 767 status = add_children(pdata);
diff --git a/drivers/mfd/twl4030-irq.c b/drivers/mfd/twl4030-irq.c
new file mode 100644
index 000000000000..fae868a8d499
--- /dev/null
+++ b/drivers/mfd/twl4030-irq.c
@@ -0,0 +1,743 @@
1/*
2 * twl4030-irq.c - TWL4030/TPS659x0 irq support
3 *
4 * Copyright (C) 2005-2006 Texas Instruments, Inc.
5 *
6 * Modifications to defer interrupt handling to a kernel thread:
7 * Copyright (C) 2006 MontaVista Software, Inc.
8 *
9 * Based on tlv320aic23.c:
10 * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
11 *
12 * Code cleanup and modifications to IRQ handler.
13 * by syed khasim <x0khasim@ti.com>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 */
29
30#include <linux/init.h>
31#include <linux/interrupt.h>
32#include <linux/irq.h>
33#include <linux/kthread.h>
34
35#include <linux/i2c/twl4030.h>
36
37
38/*
39 * TWL4030 IRQ handling has two stages in hardware, and thus in software.
40 * The Primary Interrupt Handler (PIH) stage exposes status bits saying
41 * which Secondary Interrupt Handler (SIH) stage is raising an interrupt.
42 * SIH modules are more traditional IRQ components, which support per-IRQ
43 * enable/disable and trigger controls; they do most of the work.
44 *
45 * These chips are designed to support IRQ handling from two different
46 * I2C masters. Each has a dedicated IRQ line, and dedicated IRQ status
47 * and mask registers in the PIH and SIH modules.
48 *
49 * We set up IRQs starting at a platform-specified base, always starting
50 * with PIH and the SIH for PWR_INT and then usually adding GPIO:
51 * base + 0 .. base + 7 PIH
52 * base + 8 .. base + 15 SIH for PWR_INT
53 * base + 16 .. base + 33 SIH for GPIO
54 */
55
56/* PIH register offsets */
57#define REG_PIH_ISR_P1 0x01
58#define REG_PIH_ISR_P2 0x02
59#define REG_PIH_SIR 0x03 /* for testing */
60
61
62/* Linux could (eventually) use either IRQ line */
63static int irq_line;
64
65struct sih {
66 char name[8];
67 u8 module; /* module id */
68 u8 control_offset; /* for SIH_CTRL */
69 bool set_cor;
70
71 u8 bits; /* valid in isr/imr */
72 u8 bytes_ixr; /* bytelen of ISR/IMR/SIR */
73
74 u8 edr_offset;
75 u8 bytes_edr; /* bytelen of EDR */
76
77 /* SIR ignored -- set interrupt, for testing only */
78 struct irq_data {
79 u8 isr_offset;
80 u8 imr_offset;
81 } mask[2];
82 /* + 2 bytes padding */
83};
84
85#define SIH_INITIALIZER(modname, nbits) \
86 .module = TWL4030_MODULE_ ## modname, \
87 .control_offset = TWL4030_ ## modname ## _SIH_CTRL, \
88 .bits = nbits, \
89 .bytes_ixr = DIV_ROUND_UP(nbits, 8), \
90 .edr_offset = TWL4030_ ## modname ## _EDR, \
91 .bytes_edr = DIV_ROUND_UP((2*(nbits)), 8), \
92 .mask = { { \
93 .isr_offset = TWL4030_ ## modname ## _ISR1, \
94 .imr_offset = TWL4030_ ## modname ## _IMR1, \
95 }, \
96 { \
97 .isr_offset = TWL4030_ ## modname ## _ISR2, \
98 .imr_offset = TWL4030_ ## modname ## _IMR2, \
99 }, },
100
101/* register naming policies are inconsistent ... */
102#define TWL4030_INT_PWR_EDR TWL4030_INT_PWR_EDR1
103#define TWL4030_MODULE_KEYPAD_KEYP TWL4030_MODULE_KEYPAD
104#define TWL4030_MODULE_INT_PWR TWL4030_MODULE_INT
105
106
107/* Order in this table matches order in PIH_ISR. That is,
108 * BIT(n) in PIH_ISR is sih_modules[n].
109 */
110static const struct sih sih_modules[6] = {
111 [0] = {
112 .name = "gpio",
113 .module = TWL4030_MODULE_GPIO,
114 .control_offset = REG_GPIO_SIH_CTRL,
115 .set_cor = true,
116 .bits = TWL4030_GPIO_MAX,
117 .bytes_ixr = 3,
118 /* Note: *all* of these IRQs default to no-trigger */
119 .edr_offset = REG_GPIO_EDR1,
120 .bytes_edr = 5,
121 .mask = { {
122 .isr_offset = REG_GPIO_ISR1A,
123 .imr_offset = REG_GPIO_IMR1A,
124 }, {
125 .isr_offset = REG_GPIO_ISR1B,
126 .imr_offset = REG_GPIO_IMR1B,
127 }, },
128 },
129 [1] = {
130 .name = "keypad",
131 .set_cor = true,
132 SIH_INITIALIZER(KEYPAD_KEYP, 4)
133 },
134 [2] = {
135 .name = "bci",
136 .module = TWL4030_MODULE_INTERRUPTS,
137 .control_offset = TWL4030_INTERRUPTS_BCISIHCTRL,
138 .bits = 12,
139 .bytes_ixr = 2,
140 .edr_offset = TWL4030_INTERRUPTS_BCIEDR1,
141 /* Note: most of these IRQs default to no-trigger */
142 .bytes_edr = 3,
143 .mask = { {
144 .isr_offset = TWL4030_INTERRUPTS_BCIISR1A,
145 .imr_offset = TWL4030_INTERRUPTS_BCIIMR1A,
146 }, {
147 .isr_offset = TWL4030_INTERRUPTS_BCIISR1B,
148 .imr_offset = TWL4030_INTERRUPTS_BCIIMR1B,
149 }, },
150 },
151 [3] = {
152 .name = "madc",
153 SIH_INITIALIZER(MADC, 4)
154 },
155 [4] = {
156 /* USB doesn't use the same SIH organization */
157 .name = "usb",
158 },
159 [5] = {
160 .name = "power",
161 .set_cor = true,
162 SIH_INITIALIZER(INT_PWR, 8)
163 },
164 /* there are no SIH modules #6 or #7 ... */
165};
166
167#undef TWL4030_MODULE_KEYPAD_KEYP
168#undef TWL4030_MODULE_INT_PWR
169#undef TWL4030_INT_PWR_EDR
170
171/*----------------------------------------------------------------------*/
172
173static unsigned twl4030_irq_base;
174
175static struct completion irq_event;
176
177/*
178 * This thread processes interrupts reported by the Primary Interrupt Handler.
179 */
180static int twl4030_irq_thread(void *data)
181{
182 long irq = (long)data;
183 irq_desc_t *desc = irq_desc + irq;
184 static unsigned i2c_errors;
185 const static unsigned max_i2c_errors = 100;
186
187 current->flags |= PF_NOFREEZE;
188
189 while (!kthread_should_stop()) {
190 int ret;
191 int module_irq;
192 u8 pih_isr;
193
194 /* Wait for IRQ, then read PIH irq status (also blocking) */
195 wait_for_completion_interruptible(&irq_event);
196
197 ret = twl4030_i2c_read_u8(TWL4030_MODULE_PIH, &pih_isr,
198 REG_PIH_ISR_P1);
199 if (ret) {
200 pr_warning("twl4030: I2C error %d reading PIH ISR\n",
201 ret);
202 if (++i2c_errors >= max_i2c_errors) {
203 printk(KERN_ERR "Maximum I2C error count"
204 " exceeded. Terminating %s.\n",
205 __func__);
206 break;
207 }
208 complete(&irq_event);
209 continue;
210 }
211
212 /* these handlers deal with the relevant SIH irq status */
213 local_irq_disable();
214 for (module_irq = twl4030_irq_base;
215 pih_isr;
216 pih_isr >>= 1, module_irq++) {
217 if (pih_isr & 0x1) {
218 irq_desc_t *d = irq_desc + module_irq;
219
220 /* These can't be masked ... always warn
221 * if we get any surprises.
222 */
223 if (d->status & IRQ_DISABLED)
224 note_interrupt(module_irq, d,
225 IRQ_NONE);
226 else
227 d->handle_irq(module_irq, d);
228 }
229 }
230 local_irq_enable();
231
232 desc->chip->unmask(irq);
233 }
234
235 return 0;
236}
237
238/*
239 * handle_twl4030_pih() is the desc->handle method for the twl4030 interrupt.
240 * This is a chained interrupt, so there is no desc->action method for it.
241 * Now we need to query the interrupt controller in the twl4030 to determine
242 * which module is generating the interrupt request. However, we can't do i2c
243 * transactions in interrupt context, so we must defer that work to a kernel
244 * thread. All we do here is acknowledge and mask the interrupt and wakeup
245 * the kernel thread.
246 */
247static void handle_twl4030_pih(unsigned int irq, irq_desc_t *desc)
248{
249 /* Acknowledge, clear *AND* mask the interrupt... */
250 desc->chip->ack(irq);
251 complete(&irq_event);
252}
253
254static struct task_struct *start_twl4030_irq_thread(long irq)
255{
256 struct task_struct *thread;
257
258 init_completion(&irq_event);
259 thread = kthread_run(twl4030_irq_thread, (void *)irq, "twl4030-irq");
260 if (!thread)
261 pr_err("twl4030: could not create irq %ld thread!\n", irq);
262
263 return thread;
264}
265
266/*----------------------------------------------------------------------*/
267
268/*
269 * twl4030_init_sih_modules() ... start from a known state where no
270 * IRQs will be coming in, and where we can quickly enable them then
271 * handle them as they arrive. Mask all IRQs: maybe init SIH_CTRL.
272 *
273 * NOTE: we don't touch EDR registers here; they stay with hardware
274 * defaults or whatever the last value was. Note that when both EDR
275 * bits for an IRQ are clear, that's as if its IMR bit is set...
276 */
277static int twl4030_init_sih_modules(unsigned line)
278{
279 const struct sih *sih;
280 u8 buf[4];
281 int i;
282 int status;
283
284 /* line 0 == int1_n signal; line 1 == int2_n signal */
285 if (line > 1)
286 return -EINVAL;
287
288 irq_line = line;
289
290 /* disable all interrupts on our line */
291 memset(buf, 0xff, sizeof buf);
292 sih = sih_modules;
293 for (i = 0; i < ARRAY_SIZE(sih_modules); i++, sih++) {
294
295 /* skip USB -- it's funky */
296 if (!sih->bytes_ixr)
297 continue;
298
299 status = twl4030_i2c_write(sih->module, buf,
300 sih->mask[line].imr_offset, sih->bytes_ixr);
301 if (status < 0)
302 pr_err("twl4030: err %d initializing %s %s\n",
303 status, sih->name, "IMR");
304
305 /* Maybe disable "exclusive" mode; buffer second pending irq;
306 * set Clear-On-Read (COR) bit.
307 *
308 * NOTE that sometimes COR polarity is documented as being
309 * inverted: for MADC and BCI, COR=1 means "clear on write".
310 * And for PWR_INT it's not documented...
311 */
312 if (sih->set_cor) {
313 status = twl4030_i2c_write_u8(sih->module,
314 TWL4030_SIH_CTRL_COR_MASK,
315 sih->control_offset);
316 if (status < 0)
317 pr_err("twl4030: err %d initializing %s %s\n",
318 status, sih->name, "SIH_CTRL");
319 }
320 }
321
322 sih = sih_modules;
323 for (i = 0; i < ARRAY_SIZE(sih_modules); i++, sih++) {
324 u8 rxbuf[4];
325 int j;
326
327 /* skip USB */
328 if (!sih->bytes_ixr)
329 continue;
330
331 /* Clear pending interrupt status. Either the read was
332 * enough, or we need to write those bits. Repeat, in
333 * case an IRQ is pending (PENDDIS=0) ... that's not
334 * uncommon with PWR_INT.PWRON.
335 */
336 for (j = 0; j < 2; j++) {
337 status = twl4030_i2c_read(sih->module, rxbuf,
338 sih->mask[line].isr_offset, sih->bytes_ixr);
339 if (status < 0)
340 pr_err("twl4030: err %d initializing %s %s\n",
341 status, sih->name, "ISR");
342
343 if (!sih->set_cor)
344 status = twl4030_i2c_write(sih->module, buf,
345 sih->mask[line].isr_offset,
346 sih->bytes_ixr);
347 /* else COR=1 means read sufficed.
348 * (for most SIH modules...)
349 */
350 }
351 }
352
353 return 0;
354}
355
356static inline void activate_irq(int irq)
357{
358#ifdef CONFIG_ARM
359 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
360 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
361 */
362 set_irq_flags(irq, IRQF_VALID);
363#else
364 /* same effect on other architectures */
365 set_irq_noprobe(irq);
366#endif
367}
368
369/*----------------------------------------------------------------------*/
370
371static DEFINE_SPINLOCK(sih_agent_lock);
372
373static struct workqueue_struct *wq;
374
375struct sih_agent {
376 int irq_base;
377 const struct sih *sih;
378
379 u32 imr;
380 bool imr_change_pending;
381 struct work_struct mask_work;
382
383 u32 edge_change;
384 struct work_struct edge_work;
385};
386
387static void twl4030_sih_do_mask(struct work_struct *work)
388{
389 struct sih_agent *agent;
390 const struct sih *sih;
391 union {
392 u8 bytes[4];
393 u32 word;
394 } imr;
395 int status;
396
397 agent = container_of(work, struct sih_agent, mask_work);
398
399 /* see what work we have */
400 spin_lock_irq(&sih_agent_lock);
401 if (agent->imr_change_pending) {
402 sih = agent->sih;
403 /* byte[0] gets overwritten as we write ... */
404 imr.word = cpu_to_le32(agent->imr << 8);
405 agent->imr_change_pending = false;
406 } else
407 sih = NULL;
408 spin_unlock_irq(&sih_agent_lock);
409 if (!sih)
410 return;
411
412 /* write the whole mask ... simpler than subsetting it */
413 status = twl4030_i2c_write(sih->module, imr.bytes,
414 sih->mask[irq_line].imr_offset, sih->bytes_ixr);
415 if (status)
416 pr_err("twl4030: %s, %s --> %d\n", __func__,
417 "write", status);
418}
419
420static void twl4030_sih_do_edge(struct work_struct *work)
421{
422 struct sih_agent *agent;
423 const struct sih *sih;
424 u8 bytes[6];
425 u32 edge_change;
426 int status;
427
428 agent = container_of(work, struct sih_agent, edge_work);
429
430 /* see what work we have */
431 spin_lock_irq(&sih_agent_lock);
432 edge_change = agent->edge_change;
433 agent->edge_change = 0;;
434 sih = edge_change ? agent->sih : NULL;
435 spin_unlock_irq(&sih_agent_lock);
436 if (!sih)
437 return;
438
439 /* Read, reserving first byte for write scratch. Yes, this
440 * could be cached for some speedup ... but be careful about
441 * any processor on the other IRQ line, EDR registers are
442 * shared.
443 */
444 status = twl4030_i2c_read(sih->module, bytes + 1,
445 sih->edr_offset, sih->bytes_edr);
446 if (status) {
447 pr_err("twl4030: %s, %s --> %d\n", __func__,
448 "read", status);
449 return;
450 }
451
452 /* Modify only the bits we know must change */
453 while (edge_change) {
454 int i = fls(edge_change) - 1;
455 struct irq_desc *d = irq_desc + i + agent->irq_base;
456 int byte = 1 + (i >> 2);
457 int off = (i & 0x3) * 2;
458
459 bytes[byte] &= ~(0x03 << off);
460
461 spin_lock_irq(&d->lock);
462 if (d->status & IRQ_TYPE_EDGE_RISING)
463 bytes[byte] |= BIT(off + 1);
464 if (d->status & IRQ_TYPE_EDGE_FALLING)
465 bytes[byte] |= BIT(off + 0);
466 spin_unlock_irq(&d->lock);
467
468 edge_change &= ~BIT(i);
469 }
470
471 /* Write */
472 status = twl4030_i2c_write(sih->module, bytes,
473 sih->edr_offset, sih->bytes_edr);
474 if (status)
475 pr_err("twl4030: %s, %s --> %d\n", __func__,
476 "write", status);
477}
478
479/*----------------------------------------------------------------------*/
480
481/*
482 * All irq_chip methods get issued from code holding irq_desc[irq].lock,
483 * which can't perform the underlying I2C operations (because they sleep).
484 * So we must hand them off to a thread (workqueue) and cope with asynch
485 * completion, potentially including some re-ordering, of these requests.
486 */
487
488static void twl4030_sih_mask(unsigned irq)
489{
490 struct sih_agent *sih = get_irq_chip_data(irq);
491 unsigned long flags;
492
493 spin_lock_irqsave(&sih_agent_lock, flags);
494 sih->imr |= BIT(irq - sih->irq_base);
495 sih->imr_change_pending = true;
496 queue_work(wq, &sih->mask_work);
497 spin_unlock_irqrestore(&sih_agent_lock, flags);
498}
499
500static void twl4030_sih_unmask(unsigned irq)
501{
502 struct sih_agent *sih = get_irq_chip_data(irq);
503 unsigned long flags;
504
505 spin_lock_irqsave(&sih_agent_lock, flags);
506 sih->imr &= ~BIT(irq - sih->irq_base);
507 sih->imr_change_pending = true;
508 queue_work(wq, &sih->mask_work);
509 spin_unlock_irqrestore(&sih_agent_lock, flags);
510}
511
512static int twl4030_sih_set_type(unsigned irq, unsigned trigger)
513{
514 struct sih_agent *sih = get_irq_chip_data(irq);
515 struct irq_desc *desc = irq_desc + irq;
516 unsigned long flags;
517
518 if (trigger & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING))
519 return -EINVAL;
520
521 spin_lock_irqsave(&sih_agent_lock, flags);
522 if ((desc->status & IRQ_TYPE_SENSE_MASK) != trigger) {
523 desc->status &= ~IRQ_TYPE_SENSE_MASK;
524 desc->status |= trigger;
525 sih->edge_change |= BIT(irq - sih->irq_base);
526 queue_work(wq, &sih->edge_work);
527 }
528 spin_unlock_irqrestore(&sih_agent_lock, flags);
529 return 0;
530}
531
532static struct irq_chip twl4030_sih_irq_chip = {
533 .name = "twl4030",
534 .mask = twl4030_sih_mask,
535 .unmask = twl4030_sih_unmask,
536 .set_type = twl4030_sih_set_type,
537};
538
539/*----------------------------------------------------------------------*/
540
541static inline int sih_read_isr(const struct sih *sih)
542{
543 int status;
544 union {
545 u8 bytes[4];
546 u32 word;
547 } isr;
548
549 /* FIXME need retry-on-error ... */
550
551 isr.word = 0;
552 status = twl4030_i2c_read(sih->module, isr.bytes,
553 sih->mask[irq_line].isr_offset, sih->bytes_ixr);
554
555 return (status < 0) ? status : le32_to_cpu(isr.word);
556}
557
558/*
559 * Generic handler for SIH interrupts ... we "know" this is called
560 * in task context, with IRQs enabled.
561 */
562static void handle_twl4030_sih(unsigned irq, struct irq_desc *desc)
563{
564 struct sih_agent *agent = get_irq_data(irq);
565 const struct sih *sih = agent->sih;
566 int isr;
567
568 /* reading ISR acks the IRQs, using clear-on-read mode */
569 local_irq_enable();
570 isr = sih_read_isr(sih);
571 local_irq_disable();
572
573 if (isr < 0) {
574 pr_err("twl4030: %s SIH, read ISR error %d\n",
575 sih->name, isr);
576 /* REVISIT: recover; eventually mask it all, etc */
577 return;
578 }
579
580 while (isr) {
581 irq = fls(isr);
582 irq--;
583 isr &= ~BIT(irq);
584
585 if (irq < sih->bits)
586 generic_handle_irq(agent->irq_base + irq);
587 else
588 pr_err("twl4030: %s SIH, invalid ISR bit %d\n",
589 sih->name, irq);
590 }
591}
592
593static unsigned twl4030_irq_next;
594
595/* returns the first IRQ used by this SIH bank,
596 * or negative errno
597 */
598int twl4030_sih_setup(int module)
599{
600 int sih_mod;
601 const struct sih *sih = NULL;
602 struct sih_agent *agent;
603 int i, irq;
604 int status = -EINVAL;
605 unsigned irq_base = twl4030_irq_next;
606
607 /* only support modules with standard clear-on-read for now */
608 for (sih_mod = 0, sih = sih_modules;
609 sih_mod < ARRAY_SIZE(sih_modules);
610 sih_mod++, sih++) {
611 if (sih->module == module && sih->set_cor) {
612 if (!WARN((irq_base + sih->bits) > NR_IRQS,
613 "irq %d for %s too big\n",
614 irq_base + sih->bits,
615 sih->name))
616 status = 0;
617 break;
618 }
619 }
620 if (status < 0)
621 return status;
622
623 agent = kzalloc(sizeof *agent, GFP_KERNEL);
624 if (!agent)
625 return -ENOMEM;
626
627 status = 0;
628
629 agent->irq_base = irq_base;
630 agent->sih = sih;
631 agent->imr = ~0;
632 INIT_WORK(&agent->mask_work, twl4030_sih_do_mask);
633 INIT_WORK(&agent->edge_work, twl4030_sih_do_edge);
634
635 for (i = 0; i < sih->bits; i++) {
636 irq = irq_base + i;
637
638 set_irq_chip_and_handler(irq, &twl4030_sih_irq_chip,
639 handle_edge_irq);
640 set_irq_chip_data(irq, agent);
641 activate_irq(irq);
642 }
643
644 status = irq_base;
645 twl4030_irq_next += i;
646
647 /* replace generic PIH handler (handle_simple_irq) */
648 irq = sih_mod + twl4030_irq_base;
649 set_irq_data(irq, agent);
650 set_irq_chained_handler(irq, handle_twl4030_sih);
651
652 pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", sih->name,
653 irq, irq_base, twl4030_irq_next - 1);
654
655 return status;
656}
657
658/* FIXME need a call to reverse twl4030_sih_setup() ... */
659
660
661/*----------------------------------------------------------------------*/
662
663/* FIXME pass in which interrupt line we'll use ... */
664#define twl_irq_line 0
665
666int twl_init_irq(int irq_num, unsigned irq_base, unsigned irq_end)
667{
668 static struct irq_chip twl4030_irq_chip;
669
670 int status;
671 int i;
672 struct task_struct *task;
673
674 /*
675 * Mask and clear all TWL4030 interrupts since initially we do
676 * not have any TWL4030 module interrupt handlers present
677 */
678 status = twl4030_init_sih_modules(twl_irq_line);
679 if (status < 0)
680 return status;
681
682 wq = create_singlethread_workqueue("twl4030-irqchip");
683 if (!wq) {
684 pr_err("twl4030: workqueue FAIL\n");
685 return -ESRCH;
686 }
687
688 twl4030_irq_base = irq_base;
689
690 /* install an irq handler for each of the SIH modules;
691 * clone dummy irq_chip since PIH can't *do* anything
692 */
693 twl4030_irq_chip = dummy_irq_chip;
694 twl4030_irq_chip.name = "twl4030";
695
696 twl4030_sih_irq_chip.ack = dummy_irq_chip.ack;
697
698 for (i = irq_base; i < irq_end; i++) {
699 set_irq_chip_and_handler(i, &twl4030_irq_chip,
700 handle_simple_irq);
701 activate_irq(i);
702 }
703 twl4030_irq_next = i;
704 pr_info("twl4030: %s (irq %d) chaining IRQs %d..%d\n", "PIH",
705 irq_num, irq_base, twl4030_irq_next - 1);
706
707 /* ... and the PWR_INT module ... */
708 status = twl4030_sih_setup(TWL4030_MODULE_INT);
709 if (status < 0) {
710 pr_err("twl4030: sih_setup PWR INT --> %d\n", status);
711 goto fail;
712 }
713
714 /* install an irq handler to demultiplex the TWL4030 interrupt */
715 task = start_twl4030_irq_thread(irq_num);
716 if (!task) {
717 pr_err("twl4030: irq thread FAIL\n");
718 status = -ESRCH;
719 goto fail;
720 }
721
722 set_irq_data(irq_num, task);
723 set_irq_chained_handler(irq_num, handle_twl4030_pih);
724
725 return status;
726
727fail:
728 for (i = irq_base; i < irq_end; i++)
729 set_irq_chip_and_handler(i, NULL, NULL);
730 destroy_workqueue(wq);
731 wq = NULL;
732 return status;
733}
734
735int twl_exit_irq(void)
736{
737 /* FIXME undo twl_init_irq() */
738 if (twl4030_irq_base) {
739 pr_err("twl4030: can't yet clean up IRQs?\n");
740 return -ENOSYS;
741 }
742 return 0;
743}
diff --git a/drivers/mfd/wm8350-core.c b/drivers/mfd/wm8350-core.c
index bf87f675e7fa..0d47fb9e4b3b 100644
--- a/drivers/mfd/wm8350-core.c
+++ b/drivers/mfd/wm8350-core.c
@@ -183,6 +183,9 @@ static int wm8350_write(struct wm8350 *wm8350, u8 reg, int num_regs, u16 *src)
183 (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable) 183 (wm8350->reg_cache[i] & ~wm8350_reg_io_map[i].writable)
184 | src[i - reg]; 184 | src[i - reg];
185 185
186 /* Don't store volatile bits */
187 wm8350->reg_cache[i] &= ~wm8350_reg_io_map[i].vol;
188
186 src[i - reg] = cpu_to_be16(src[i - reg]); 189 src[i - reg] = cpu_to_be16(src[i - reg]);
187 } 190 }
188 191
@@ -1120,6 +1123,7 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int mode)
1120 } 1123 }
1121 value = be16_to_cpu(value); 1124 value = be16_to_cpu(value);
1122 value &= wm8350_reg_io_map[i].readable; 1125 value &= wm8350_reg_io_map[i].readable;
1126 value &= ~wm8350_reg_io_map[i].vol;
1123 wm8350->reg_cache[i] = value; 1127 wm8350->reg_cache[i] = value;
1124 } else 1128 } else
1125 wm8350->reg_cache[i] = reg_map[i]; 1129 wm8350->reg_cache[i] = reg_map[i];
@@ -1128,7 +1132,6 @@ static int wm8350_create_cache(struct wm8350 *wm8350, int mode)
1128out: 1132out:
1129 return ret; 1133 return ret;
1130} 1134}
1131EXPORT_SYMBOL_GPL(wm8350_create_cache);
1132 1135
1133/* 1136/*
1134 * Register a client device. This is non-fatal since there is no need to 1137 * Register a client device. This is non-fatal since there is no need to
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 814f49fde530..847481dc8d72 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -246,6 +246,16 @@ config RTC_DRV_TWL92330
246 platforms. The support is integrated with the rest of 246 platforms. The support is integrated with the rest of
247 the Menelaus driver; it's not separate module. 247 the Menelaus driver; it's not separate module.
248 248
249config RTC_DRV_TWL4030
250 tristate "TI TWL4030/TWL5030/TPS659x0"
251 depends on RTC_CLASS && TWL4030_CORE
252 help
253 If you say yes here you get support for the RTC on the
254 TWL4030 family chips, used mostly with OMAP3 platforms.
255
256 This driver can also be built as a module. If so, the module
257 will be called rtc-twl4030.
258
249config RTC_DRV_S35390A 259config RTC_DRV_S35390A
250 tristate "Seiko Instruments S-35390A" 260 tristate "Seiko Instruments S-35390A"
251 select BITREVERSE 261 select BITREVERSE
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index d6a9ac7176ea..e9e8474cc8fe 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -63,6 +63,7 @@ obj-$(CONFIG_RTC_DRV_SA1100) += rtc-sa1100.o
63obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o 63obj-$(CONFIG_RTC_DRV_SH) += rtc-sh.o
64obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o 64obj-$(CONFIG_RTC_DRV_STK17TA8) += rtc-stk17ta8.o
65obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o 65obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o
66obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl4030.o
66obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o 67obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o
67obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o 68obj-$(CONFIG_RTC_DRV_VR41XX) += rtc-vr41xx.o
68obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o 69obj-$(CONFIG_RTC_DRV_X1205) += rtc-x1205.o
diff --git a/drivers/rtc/rtc-twl4030.c b/drivers/rtc/rtc-twl4030.c
new file mode 100644
index 000000000000..abe87a4d2665
--- /dev/null
+++ b/drivers/rtc/rtc-twl4030.c
@@ -0,0 +1,564 @@
1/*
2 * rtc-twl4030.c -- TWL4030 Real Time Clock interface
3 *
4 * Copyright (C) 2007 MontaVista Software, Inc
5 * Author: Alexandre Rusev <source@mvista.com>
6 *
7 * Based on original TI driver twl4030-rtc.c
8 * Copyright (C) 2006 Texas Instruments, Inc.
9 *
10 * Based on rtc-omap.c
11 * Copyright (C) 2003 MontaVista Software, Inc.
12 * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
13 * Copyright (C) 2006 David Brownell
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/types.h>
25#include <linux/rtc.h>
26#include <linux/bcd.h>
27#include <linux/platform_device.h>
28#include <linux/interrupt.h>
29
30#include <linux/i2c/twl4030.h>
31
32
33/*
34 * RTC block register offsets (use TWL_MODULE_RTC)
35 */
36#define REG_SECONDS_REG 0x00
37#define REG_MINUTES_REG 0x01
38#define REG_HOURS_REG 0x02
39#define REG_DAYS_REG 0x03
40#define REG_MONTHS_REG 0x04
41#define REG_YEARS_REG 0x05
42#define REG_WEEKS_REG 0x06
43
44#define REG_ALARM_SECONDS_REG 0x07
45#define REG_ALARM_MINUTES_REG 0x08
46#define REG_ALARM_HOURS_REG 0x09
47#define REG_ALARM_DAYS_REG 0x0A
48#define REG_ALARM_MONTHS_REG 0x0B
49#define REG_ALARM_YEARS_REG 0x0C
50
51#define REG_RTC_CTRL_REG 0x0D
52#define REG_RTC_STATUS_REG 0x0E
53#define REG_RTC_INTERRUPTS_REG 0x0F
54
55#define REG_RTC_COMP_LSB_REG 0x10
56#define REG_RTC_COMP_MSB_REG 0x11
57
58/* RTC_CTRL_REG bitfields */
59#define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
60#define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
61#define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
62#define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
63#define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
64#define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
65#define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
66
67/* RTC_STATUS_REG bitfields */
68#define BIT_RTC_STATUS_REG_RUN_M 0x02
69#define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
70#define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
71#define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
72#define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
73#define BIT_RTC_STATUS_REG_ALARM_M 0x40
74#define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
75
76/* RTC_INTERRUPTS_REG bitfields */
77#define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
78#define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
79#define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
80
81
82/* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
83#define ALL_TIME_REGS 6
84
85/*----------------------------------------------------------------------*/
86
87/*
88 * Supports 1 byte read from TWL4030 RTC register.
89 */
90static int twl4030_rtc_read_u8(u8 *data, u8 reg)
91{
92 int ret;
93
94 ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
95 if (ret < 0)
96 pr_err("twl4030_rtc: Could not read TWL4030"
97 "register %X - error %d\n", reg, ret);
98 return ret;
99}
100
101/*
102 * Supports 1 byte write to TWL4030 RTC registers.
103 */
104static int twl4030_rtc_write_u8(u8 data, u8 reg)
105{
106 int ret;
107
108 ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
109 if (ret < 0)
110 pr_err("twl4030_rtc: Could not write TWL4030"
111 "register %X - error %d\n", reg, ret);
112 return ret;
113}
114
115/*
116 * Cache the value for timer/alarm interrupts register; this is
117 * only changed by callers holding rtc ops lock (or resume).
118 */
119static unsigned char rtc_irq_bits;
120
121/*
122 * Enable timer and/or alarm interrupts.
123 */
124static int set_rtc_irq_bit(unsigned char bit)
125{
126 unsigned char val;
127 int ret;
128
129 val = rtc_irq_bits | bit;
130 ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
131 if (ret == 0)
132 rtc_irq_bits = val;
133
134 return ret;
135}
136
137/*
138 * Disable timer and/or alarm interrupts.
139 */
140static int mask_rtc_irq_bit(unsigned char bit)
141{
142 unsigned char val;
143 int ret;
144
145 val = rtc_irq_bits & ~bit;
146 ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
147 if (ret == 0)
148 rtc_irq_bits = val;
149
150 return ret;
151}
152
153static inline int twl4030_rtc_alarm_irq_set_state(int enabled)
154{
155 int ret;
156
157 if (enabled)
158 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
159 else
160 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
161
162 return ret;
163}
164
165static inline int twl4030_rtc_irq_set_state(int enabled)
166{
167 int ret;
168
169 if (enabled)
170 ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
171 else
172 ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
173
174 return ret;
175}
176
177/*
178 * Gets current TWL4030 RTC time and date parameters.
179 *
180 * The RTC's time/alarm representation is not what gmtime(3) requires
181 * Linux to use:
182 *
183 * - Months are 1..12 vs Linux 0-11
184 * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
185 */
186static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
187{
188 unsigned char rtc_data[ALL_TIME_REGS + 1];
189 int ret;
190 u8 save_control;
191
192 ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
193 if (ret < 0)
194 return ret;
195
196 save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
197
198 ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
199 if (ret < 0)
200 return ret;
201
202 ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
203 REG_SECONDS_REG, ALL_TIME_REGS);
204
205 if (ret < 0) {
206 dev_err(dev, "rtc_read_time error %d\n", ret);
207 return ret;
208 }
209
210 tm->tm_sec = bcd2bin(rtc_data[0]);
211 tm->tm_min = bcd2bin(rtc_data[1]);
212 tm->tm_hour = bcd2bin(rtc_data[2]);
213 tm->tm_mday = bcd2bin(rtc_data[3]);
214 tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
215 tm->tm_year = bcd2bin(rtc_data[5]) + 100;
216
217 return ret;
218}
219
220static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
221{
222 unsigned char save_control;
223 unsigned char rtc_data[ALL_TIME_REGS + 1];
224 int ret;
225
226 rtc_data[1] = bin2bcd(tm->tm_sec);
227 rtc_data[2] = bin2bcd(tm->tm_min);
228 rtc_data[3] = bin2bcd(tm->tm_hour);
229 rtc_data[4] = bin2bcd(tm->tm_mday);
230 rtc_data[5] = bin2bcd(tm->tm_mon + 1);
231 rtc_data[6] = bin2bcd(tm->tm_year - 100);
232
233 /* Stop RTC while updating the TC registers */
234 ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
235 if (ret < 0)
236 goto out;
237
238 save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
239 twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
240 if (ret < 0)
241 goto out;
242
243 /* update all the time registers in one shot */
244 ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
245 REG_SECONDS_REG, ALL_TIME_REGS);
246 if (ret < 0) {
247 dev_err(dev, "rtc_set_time error %d\n", ret);
248 goto out;
249 }
250
251 /* Start back RTC */
252 save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
253 ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
254
255out:
256 return ret;
257}
258
259/*
260 * Gets current TWL4030 RTC alarm time.
261 */
262static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
263{
264 unsigned char rtc_data[ALL_TIME_REGS + 1];
265 int ret;
266
267 ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
268 REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
269 if (ret < 0) {
270 dev_err(dev, "rtc_read_alarm error %d\n", ret);
271 return ret;
272 }
273
274 /* some of these fields may be wildcard/"match all" */
275 alm->time.tm_sec = bcd2bin(rtc_data[0]);
276 alm->time.tm_min = bcd2bin(rtc_data[1]);
277 alm->time.tm_hour = bcd2bin(rtc_data[2]);
278 alm->time.tm_mday = bcd2bin(rtc_data[3]);
279 alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
280 alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
281
282 /* report cached alarm enable state */
283 if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
284 alm->enabled = 1;
285
286 return ret;
287}
288
289static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
290{
291 unsigned char alarm_data[ALL_TIME_REGS + 1];
292 int ret;
293
294 ret = twl4030_rtc_alarm_irq_set_state(0);
295 if (ret)
296 goto out;
297
298 alarm_data[1] = bin2bcd(alm->time.tm_sec);
299 alarm_data[2] = bin2bcd(alm->time.tm_min);
300 alarm_data[3] = bin2bcd(alm->time.tm_hour);
301 alarm_data[4] = bin2bcd(alm->time.tm_mday);
302 alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
303 alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
304
305 /* update all the alarm registers in one shot */
306 ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
307 REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
308 if (ret) {
309 dev_err(dev, "rtc_set_alarm error %d\n", ret);
310 goto out;
311 }
312
313 if (alm->enabled)
314 ret = twl4030_rtc_alarm_irq_set_state(1);
315out:
316 return ret;
317}
318
319#ifdef CONFIG_RTC_INTF_DEV
320
321static int twl4030_rtc_ioctl(struct device *dev, unsigned int cmd,
322 unsigned long arg)
323{
324 switch (cmd) {
325 case RTC_AIE_OFF:
326 return twl4030_rtc_alarm_irq_set_state(0);
327 case RTC_AIE_ON:
328 return twl4030_rtc_alarm_irq_set_state(1);
329 case RTC_UIE_OFF:
330 return twl4030_rtc_irq_set_state(0);
331 case RTC_UIE_ON:
332 return twl4030_rtc_irq_set_state(1);
333
334 default:
335 return -ENOIOCTLCMD;
336 }
337}
338
339#else
340#define omap_rtc_ioctl NULL
341#endif
342
343static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
344{
345 unsigned long events = 0;
346 int ret = IRQ_NONE;
347 int res;
348 u8 rd_reg;
349
350#ifdef CONFIG_LOCKDEP
351 /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
352 * we don't want and can't tolerate. Although it might be
353 * friendlier not to borrow this thread context...
354 */
355 local_irq_enable();
356#endif
357
358 res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
359 if (res)
360 goto out;
361 /*
362 * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
363 * only one (ALARM or RTC) interrupt source may be enabled
364 * at time, we also could check our results
365 * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
366 */
367 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
368 events |= RTC_IRQF | RTC_AF;
369 else
370 events |= RTC_IRQF | RTC_UF;
371
372 res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
373 REG_RTC_STATUS_REG);
374 if (res)
375 goto out;
376
377 /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
378 * needs 2 reads to clear the interrupt. One read is done in
379 * do_twl4030_pwrirq(). Doing the second read, to clear
380 * the bit.
381 *
382 * FIXME the reason PWR_ISR1 needs an extra read is that
383 * RTC_IF retriggered until we cleared REG_ALARM_M above.
384 * But re-reading like this is a bad hack; by doing so we
385 * risk wrongly clearing status for some other IRQ (losing
386 * the interrupt). Be smarter about handling RTC_UF ...
387 */
388 res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
389 &rd_reg, TWL4030_INT_PWR_ISR1);
390 if (res)
391 goto out;
392
393 /* Notify RTC core on event */
394 rtc_update_irq(rtc, 1, events);
395
396 ret = IRQ_HANDLED;
397out:
398 return ret;
399}
400
401static struct rtc_class_ops twl4030_rtc_ops = {
402 .ioctl = twl4030_rtc_ioctl,
403 .read_time = twl4030_rtc_read_time,
404 .set_time = twl4030_rtc_set_time,
405 .read_alarm = twl4030_rtc_read_alarm,
406 .set_alarm = twl4030_rtc_set_alarm,
407};
408
409/*----------------------------------------------------------------------*/
410
411static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
412{
413 struct rtc_device *rtc;
414 int ret = 0;
415 int irq = platform_get_irq(pdev, 0);
416 u8 rd_reg;
417
418 if (irq < 0)
419 return irq;
420
421 rtc = rtc_device_register(pdev->name,
422 &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
423 if (IS_ERR(rtc)) {
424 ret = -EINVAL;
425 dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
426 PTR_ERR(rtc));
427 goto out0;
428
429 }
430
431 platform_set_drvdata(pdev, rtc);
432
433 ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
434
435 if (ret < 0)
436 goto out1;
437
438 if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
439 dev_warn(&pdev->dev, "Power up reset detected.\n");
440
441 if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
442 dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
443
444 /* Clear RTC Power up reset and pending alarm interrupts */
445 ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
446 if (ret < 0)
447 goto out1;
448
449 ret = request_irq(irq, twl4030_rtc_interrupt,
450 IRQF_TRIGGER_RISING,
451 rtc->dev.bus_id, rtc);
452 if (ret < 0) {
453 dev_err(&pdev->dev, "IRQ is not free.\n");
454 goto out1;
455 }
456
457 /* Check RTC module status, Enable if it is off */
458 ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
459 if (ret < 0)
460 goto out2;
461
462 if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
463 dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
464 rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
465 ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
466 if (ret < 0)
467 goto out2;
468 }
469
470 /* init cached IRQ enable bits */
471 ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
472 if (ret < 0)
473 goto out2;
474
475 return ret;
476
477
478out2:
479 free_irq(irq, rtc);
480out1:
481 rtc_device_unregister(rtc);
482out0:
483 return ret;
484}
485
486/*
487 * Disable all TWL4030 RTC module interrupts.
488 * Sets status flag to free.
489 */
490static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
491{
492 /* leave rtc running, but disable irqs */
493 struct rtc_device *rtc = platform_get_drvdata(pdev);
494 int irq = platform_get_irq(pdev, 0);
495
496 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
497 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
498
499 free_irq(irq, rtc);
500
501 rtc_device_unregister(rtc);
502 platform_set_drvdata(pdev, NULL);
503 return 0;
504}
505
506static void twl4030_rtc_shutdown(struct platform_device *pdev)
507{
508 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
509 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
510}
511
512#ifdef CONFIG_PM
513
514static unsigned char irqstat;
515
516static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
517{
518 irqstat = rtc_irq_bits;
519
520 /* REVISIT alarm may need to wake us from sleep */
521 mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M |
522 BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
523 return 0;
524}
525
526static int twl4030_rtc_resume(struct platform_device *pdev)
527{
528 set_rtc_irq_bit(irqstat);
529 return 0;
530}
531
532#else
533#define twl4030_rtc_suspend NULL
534#define twl4030_rtc_resume NULL
535#endif
536
537MODULE_ALIAS("platform:twl4030_rtc");
538
539static struct platform_driver twl4030rtc_driver = {
540 .probe = twl4030_rtc_probe,
541 .remove = __devexit_p(twl4030_rtc_remove),
542 .shutdown = twl4030_rtc_shutdown,
543 .suspend = twl4030_rtc_suspend,
544 .resume = twl4030_rtc_resume,
545 .driver = {
546 .owner = THIS_MODULE,
547 .name = "twl4030_rtc",
548 },
549};
550
551static int __init twl4030_rtc_init(void)
552{
553 return platform_driver_register(&twl4030rtc_driver);
554}
555module_init(twl4030_rtc_init);
556
557static void __exit twl4030_rtc_exit(void)
558{
559 platform_driver_unregister(&twl4030rtc_driver);
560}
561module_exit(twl4030_rtc_exit);
562
563MODULE_AUTHOR("Texas Instruments, MontaVista Software");
564MODULE_LICENSE("GPL");
diff --git a/include/linux/i2c/twl4030.h b/include/linux/i2c/twl4030.h
index cdb453162a97..fb604dcd38f1 100644
--- a/include/linux/i2c/twl4030.h
+++ b/include/linux/i2c/twl4030.h
@@ -228,6 +228,12 @@ struct twl4030_gpio_platform_data {
228 int gpio_base; 228 int gpio_base;
229 unsigned irq_base, irq_end; 229 unsigned irq_base, irq_end;
230 230
231 /* package the two LED signals as output-only GPIOs? */
232 bool use_leds;
233
234 /* gpio-n should control VMMC(n+1) if BIT(n) in mmc_cd is set */
235 u8 mmc_cd;
236
231 /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup 237 /* For gpio-N, bit (1 << N) in "pullups" is set if that pullup
232 * should be enabled. Else, if that bit is set in "pulldowns", 238 * should be enabled. Else, if that bit is set in "pulldowns",
233 * that pulldown is enabled. Don't waste power by letting any 239 * that pulldown is enabled. Don't waste power by letting any
@@ -277,6 +283,8 @@ struct twl4030_platform_data {
277 283
278/*----------------------------------------------------------------------*/ 284/*----------------------------------------------------------------------*/
279 285
286int twl4030_sih_setup(int module);
287
280/* 288/*
281 * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the 289 * FIXME completely stop using TWL4030_IRQ_BASE ... instead, pass the
282 * IRQ data to subsidiary devices using platform device resources. 290 * IRQ data to subsidiary devices using platform device resources.
@@ -291,16 +299,16 @@ struct twl4030_platform_data {
291#define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2) 299#define TWL4030_MODIRQ_BCI (TWL4030_IRQ_BASE + 2)
292#define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3) 300#define TWL4030_MODIRQ_MADC (TWL4030_IRQ_BASE + 3)
293/* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */ 301/* #define TWL4030_MODIRQ_USB (TWL4030_IRQ_BASE + 4) */
294#define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) 302/* #define TWL4030_MODIRQ_PWR (TWL4030_IRQ_BASE + 5) */
295 303
296#define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0) 304#define TWL4030_PWRIRQ_PWRBTN (TWL4030_PWR_IRQ_BASE + 0)
297#define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) 305/* #define TWL4030_PWRIRQ_CHG_PRES (TWL4030_PWR_IRQ_BASE + 1) */
298#define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) 306/* #define TWL4030_PWRIRQ_USB_PRES (TWL4030_PWR_IRQ_BASE + 2) */
299#define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) 307/* #define TWL4030_PWRIRQ_RTC (TWL4030_PWR_IRQ_BASE + 3) */
300#define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) 308/* #define TWL4030_PWRIRQ_HOT_DIE (TWL4030_PWR_IRQ_BASE + 4) */
301#define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) 309/* #define TWL4030_PWRIRQ_PWROK_TIMEOUT (TWL4030_PWR_IRQ_BASE + 5) */
302#define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) 310/* #define TWL4030_PWRIRQ_MBCHG (TWL4030_PWR_IRQ_BASE + 6) */
303#define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) 311/* #define TWL4030_PWRIRQ_SC_DETECT (TWL4030_PWR_IRQ_BASE + 7) */
304 312
305/* Rest are unsued currently*/ 313/* Rest are unsued currently*/
306 314
@@ -317,17 +325,13 @@ struct twl4030_platform_data {
317/* TWL4030 GPIO interrupt definitions */ 325/* TWL4030 GPIO interrupt definitions */
318 326
319#define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n)) 327#define TWL4030_GPIO_IRQ_NO(n) (TWL4030_GPIO_IRQ_BASE + (n))
320#define TWL4030_GPIO_IS_ENABLE 1
321 328
322/* 329/*
323 * Exported TWL4030 GPIO APIs 330 * Exported TWL4030 GPIO APIs
324 * 331 *
325 * WARNING -- use standard GPIO and IRQ calls instead; these will vanish. 332 * WARNING -- use standard GPIO and IRQ calls instead; these will vanish.
326 */ 333 */
327int twl4030_get_gpio_datain(int gpio);
328int twl4030_request_gpio(int gpio);
329int twl4030_set_gpio_debounce(int gpio, int enable); 334int twl4030_set_gpio_debounce(int gpio, int enable);
330int twl4030_free_gpio(int gpio);
331 335
332#if defined(CONFIG_TWL4030_BCI_BATTERY) || \ 336#if defined(CONFIG_TWL4030_BCI_BATTERY) || \
333 defined(CONFIG_TWL4030_BCI_BATTERY_MODULE) 337 defined(CONFIG_TWL4030_BCI_BATTERY_MODULE)
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 23:00:38 -0500