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authorRabin Vincent <rabin.vincent@stericsson.com>2011-01-25 05:18:17 -0500
committerDan Williams <dan.j.williams@intel.com>2011-01-31 01:27:17 -0500
commit95944c6ef5b5214508273992416adb836b63c73f (patch)
tree82de42e488516b4338fcd5e9908545c611573a0b
parentd924abad7fa9a78d70b20552bf27fe4f7a19a2fb (diff)
dma40: implement prep_memcpy as a wrapper around memcpy_sg
To simplify the code. Acked-by: Per Forlin <per.forlin@stericsson.com> Acked-by: Jonas Aaberg <jonas.aberg@stericsson.com> Signed-off-by: Rabin Vincent <rabin.vincent@stericsson.com> Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
-rw-r--r--drivers/dma/ste_dma40.c107
-rw-r--r--drivers/dma/ste_dma40_ll.c2
-rw-r--r--drivers/dma/ste_dma40_ll.h11
3 files changed, 10 insertions, 110 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index bd72269dac08..0a20179349b0 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -1863,108 +1863,19 @@ static struct dma_async_tx_descriptor *d40_prep_memcpy(struct dma_chan *chan,
1863 size_t size, 1863 size_t size,
1864 unsigned long dma_flags) 1864 unsigned long dma_flags)
1865{ 1865{
1866 struct d40_desc *d40d; 1866 struct scatterlist dst_sg;
1867 struct d40_chan *d40c = container_of(chan, struct d40_chan, 1867 struct scatterlist src_sg;
1868 chan);
1869 unsigned long flags;
1870
1871 if (d40c->phy_chan == NULL) {
1872 chan_err(d40c, "Channel is not allocated.\n");
1873 return ERR_PTR(-EINVAL);
1874 }
1875
1876 spin_lock_irqsave(&d40c->lock, flags);
1877 d40d = d40_desc_get(d40c);
1878
1879 if (d40d == NULL) {
1880 chan_err(d40c, "Descriptor is NULL\n");
1881 goto err;
1882 }
1883
1884 d40d->txd.flags = dma_flags;
1885 d40d->lli_len = d40_size_2_dmalen(size,
1886 d40c->dma_cfg.src_info.data_width,
1887 d40c->dma_cfg.dst_info.data_width);
1888 if (d40d->lli_len < 0) {
1889 chan_err(d40c, "Unaligned size\n");
1890 goto err;
1891 }
1892
1893
1894 dma_async_tx_descriptor_init(&d40d->txd, chan);
1895
1896 d40d->txd.tx_submit = d40_tx_submit;
1897
1898 if (chan_is_logical(d40c)) {
1899
1900 if (d40_pool_lli_alloc(d40c,d40d, d40d->lli_len, true) < 0) {
1901 chan_err(d40c, "Out of memory\n");
1902 goto err;
1903 }
1904 d40d->lli_current = 0;
1905
1906 if (d40_log_buf_to_lli(d40d->lli_log.src,
1907 src,
1908 size,
1909 d40c->log_def.lcsp1,
1910 d40c->dma_cfg.src_info.data_width,
1911 d40c->dma_cfg.dst_info.data_width,
1912 true) == NULL)
1913 goto err;
1914
1915 if (d40_log_buf_to_lli(d40d->lli_log.dst,
1916 dst,
1917 size,
1918 d40c->log_def.lcsp3,
1919 d40c->dma_cfg.dst_info.data_width,
1920 d40c->dma_cfg.src_info.data_width,
1921 true) == NULL)
1922 goto err;
1923
1924 } else {
1925
1926 if (d40_pool_lli_alloc(d40c, d40d, d40d->lli_len, false) < 0) {
1927 chan_err(d40c, "Out of memory\n");
1928 goto err;
1929 }
1930
1931 if (d40_phy_buf_to_lli(d40d->lli_phy.src,
1932 src,
1933 size,
1934 d40c->dma_cfg.src_info.psize,
1935 0,
1936 d40c->src_def_cfg,
1937 true,
1938 d40c->dma_cfg.src_info.data_width,
1939 d40c->dma_cfg.dst_info.data_width,
1940 false) == NULL)
1941 goto err;
1942 1868
1943 if (d40_phy_buf_to_lli(d40d->lli_phy.dst, 1869 sg_init_table(&dst_sg, 1);
1944 dst, 1870 sg_init_table(&src_sg, 1);
1945 size,
1946 d40c->dma_cfg.dst_info.psize,
1947 0,
1948 d40c->dst_def_cfg,
1949 true,
1950 d40c->dma_cfg.dst_info.data_width,
1951 d40c->dma_cfg.src_info.data_width,
1952 false) == NULL)
1953 goto err;
1954 1871
1955 dma_sync_single_for_device(d40c->base->dev, 1872 sg_dma_address(&dst_sg) = dst;
1956 d40d->lli_pool.dma_addr, 1873 sg_dma_address(&src_sg) = src;
1957 d40d->lli_pool.size, DMA_TO_DEVICE);
1958 }
1959 1874
1960 spin_unlock_irqrestore(&d40c->lock, flags); 1875 sg_dma_len(&dst_sg) = size;
1961 return &d40d->txd; 1876 sg_dma_len(&src_sg) = size;
1962 1877
1963err: 1878 return stedma40_memcpy_sg(chan, &dst_sg, &src_sg, 1, dma_flags);
1964 if (d40d)
1965 d40_desc_free(d40c, d40d);
1966 spin_unlock_irqrestore(&d40c->lock, flags);
1967 return NULL;
1968} 1879}
1969 1880
1970static struct dma_async_tx_descriptor * 1881static struct dma_async_tx_descriptor *
diff --git a/drivers/dma/ste_dma40_ll.c b/drivers/dma/ste_dma40_ll.c
index 6f03f580c492..552c5972c75e 100644
--- a/drivers/dma/ste_dma40_ll.c
+++ b/drivers/dma/ste_dma40_ll.c
@@ -198,7 +198,7 @@ static int d40_seg_size(int size, int data_width1, int data_width2)
198 return seg_max; 198 return seg_max;
199} 199}
200 200
201struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli, 201static struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli,
202 dma_addr_t addr, 202 dma_addr_t addr,
203 u32 size, 203 u32 size,
204 int psize, 204 int psize,
diff --git a/drivers/dma/ste_dma40_ll.h b/drivers/dma/ste_dma40_ll.h
index e93f394187a3..a5d71714ebf7 100644
--- a/drivers/dma/ste_dma40_ll.h
+++ b/drivers/dma/ste_dma40_ll.h
@@ -312,17 +312,6 @@ int d40_phy_sg_to_lli(struct scatterlist *sg,
312 u32 data_width2, 312 u32 data_width2,
313 int psize); 313 int psize);
314 314
315struct d40_phy_lli *d40_phy_buf_to_lli(struct d40_phy_lli *lli,
316 dma_addr_t data,
317 u32 data_size,
318 int psize,
319 dma_addr_t next_lli,
320 u32 reg_cfg,
321 bool term_int,
322 u32 data_width1,
323 u32 data_width2,
324 bool is_device);
325
326void d40_phy_lli_write(void __iomem *virtbase, 315void d40_phy_lli_write(void __iomem *virtbase,
327 u32 phy_chan_num, 316 u32 phy_chan_num,
328 struct d40_phy_lli *lli_dst, 317 struct d40_phy_lli *lli_dst,