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* drm/i915: Use DPCD value for max DP lanes.Keith Packard2011-11-16
| | | | | | | | | | The BIOS VBT value for an eDP panel has been shown to be incorrect on one machine, and we haven't found any machines where the DPCD value was wrong, so we'll use the DPCD value everywhere. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Initiate DP link training only on the lanes we'll be usingKeith Packard2011-11-16
| | | | | | | | | | Limit the link training setting command to the lanes needed for the current mode. It seems vaguely possible that a monitor will try to train the other lanes and fail in some way, so this seems like the safer plan. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Remove trailing white spaceKeith Packard2011-11-16
| | | | | | | Found a couple of bare tabs in intel_dp.c Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Try harder during dp pattern 1 link trainingKeith Packard2011-11-16
| | | | | | | | | | Instead of going through the sequence just once, run through the whole set up to 5 times to see if something can work. This isn't part of the DP spec, but the BIOS seems to do it, and given that link training failure is so bad, it seems reasonable to follow suit. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Make DP prepare/commit consistent with DP dpmsKeith Packard2011-11-16
| | | | | | | | | | | Make sure the sequence of operations in all three functions makes sense: 1) The backlight must be off unless the screen is running 2) The link must be running to turn the eDP panel on/off 3) The CPU eDP PLL must be running until everything is off Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Let panel power sequencing hardware do its jobKeith Packard2011-11-16
| | | | | | | | | | The panel power sequencing hardware tracks the stages of panel power sequencing and signals when the panel is completely on or off. Instead of blindly assuming the panel timings will work, poll the panel power status register until it shows the correct values. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Treat PCH eDP like DP in most placesKeith Packard2011-11-16
| | | | | | | | PCH eDP has many of the same needs as regular PCH DP connections, including the DP_CTl bit settings, the TRANS_DP_CTL register. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Remove link_status field from intel_dp structureKeith Packard2011-11-16
| | | | | | | | No persistent data was ever stored here, so link_status is instead allocated on the stack as needed. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
* drm/i915: Move common PCH_PP_CONTROL setup to ironlake_get_pp_controlKeith Packard2011-11-16
| | | | | | | | | | Every usage of PCH_PP_CONTROL sets the PANEL_UNLOCK_REGS value to ensure that writes will be respected, move this to a common function to make the driver cleaner. No functional changes. Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Module parameters using '-1' as default must be signed typeKeith Packard2011-11-10
| | | | | | | | | | Testing i915_panel_use_ssc for the default value was broken, so the driver would never autodetect the correct value. Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Michel Alexandre Salim <salimma@fedoraproject.org> Tested-by: Michel Alexandre Salim <salimma@fedoraproject.org> Cc: stable@kernel.org
* drm/i915: Turn on another required clock gating bit on gen6.Eric Anholt2011-11-07
| | | | | | | | | | Unlike the previous one, I don't have known testcases it fixes. I'd rather not go through the same debug cycle on whatever testcases those might be. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Turn on a required 3D clock gating bit on Sandybridge.Eric Anholt2011-11-07
| | | | | | | | | Fixes rendering failures in Unigine Tropics and Sanctuary and the mesa "fire" demo. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: enable cacheable objects on IvybridgeJesse Barnes2011-11-03
| | | | | | | | IVB supports these bits as well. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: add constants to size fence arrays and fieldsDaniel Vetter2011-11-03
| | | | | | | | In preparation of to support 32 fences on Ivybdrigde. Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Ivybridge still has fences!Daniel Vetter2011-11-03
| | | | | | | | | | So don't forget to restore them on resume and dump them into the error state. Cc: stable@kernel.org Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: forcewake warning fixes in debugfsBen Widawsky2011-11-03
| | | | | | | | | | Some more unsafe debugfs access are fixed with this patch. I tested all reads, but didn't thoroughly test the writes. Cc: "Nicolas Kalkhof" <nkalkhof@web.de> Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Fix object refcount leak on mmappable size limit error path.Eric Anholt2011-11-01
| | | | | | | | | | | | I've been seeing memory leaks on my system in the form of large (300-400MB) GEM objects created by now-dead processes laying around clogging up memory. I usually notice when it gets to about 1.2GB of them. Hopefully this clears up the issue, but I just found this bug by inspection. Signed-off-by: Eric Anholt <eric@anholt.net> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: Use mode_config.mutex in ironlake_panel_vdd_workKeith Packard2011-11-01
| | | | | | Use of the struct_mutex is not correct for locking in mode setting paths. Signed-off-by: Keith Packard <keithp@keithp.com>
* agp: iommu_gfx_mapped only available if CONFIG_INTEL_IOMMU is setKeith Packard2011-10-28
| | | | | | | | | | | Kernels with no iommu support cannot ever need the Ironlake work-around, so never enable it in that case. Might be better to completely remove the work-around from the kernel in this case? Signed-off-by: Keith Packard <keithp@keithp.com> Reviewed-by: Ben Widawsky <ben@bwidawsk.net>
* drm/i915: fix if statement (bogus semi-colon)Dan Carpenter2011-10-28
| | | | | | | | The semi-colon is a typo here and it makes the if statement unconditional. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: intel_choose_pipe_bpp_dither messages should be DRM_DEBUG_KMSAdam Jackson2011-10-28
| | | | | | | Shouldn't hide these behind _DRIVER, they're all KMS-related. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: only match on PCI_BASE_CLASS_DISPLAYDaniel Vetter2011-10-28
| | | | | | | | | | | ... not DISPLAY_VGA, because we ignore the VGA subclass with our class_mask. It confused me until Chris Wilson clued me up. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
* drm/i915: disable temporal dithering on the internal panelDaniel Vetter2011-10-28
| | | | | | | | | | | | | <ajax> i'm getting tempted to just disable temporal <mjg59> Approved. <ajax> apparently it makes the screen look pulse-y which is worse than the disease. References: http://lists.freedesktop.org/archives/intel-gfx/2011-October/012545.html Tested-by: Олег Герман <oleg.german@gmail.com> Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Keith Packard <keithp@keithp.com>
* Merge branch 'drm-core-next' of git://people.freedesktop.org/~airlied/linuxLinus Torvalds2011-10-28
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'drm-core-next' of git://people.freedesktop.org/~airlied/linux: (290 commits) Revert "drm/ttm: add a way to bo_wait for either the last read or last write" Revert "drm/radeon/kms: add a new gem_wait ioctl with read/write flags" vmwgfx: Don't pass unused arguments to do_dirty functions vmwgfx: Emulate depth 32 framebuffers drm/radeon: Lower the severity of the radeon lockup messages. drm/i915/dp: Fix eDP on PCH DP on CPT/PPT drm/i915/dp: Introduce is_cpu_edp() drm/i915: use correct SPD type value drm/i915: fix ILK+ infoframe support drm/i915: add DP test request handling drm/i915: read full receiver capability field during DP hot plug drm/i915/dp: Remove eDP special cases from bandwidth checks drm/i915/dp: Fix the math in intel_dp_link_required drm/i915/panel: Always record the backlight level again (but cleverly) i915: Move i915_read/write out of line drm/i915: remove transcoder PLL mashing from mode_set per specs drm/i915: if transcoder disable fails, say which drm/i915: set watermarks for third pipe on IVB drm/i915: export a CPT mode set verification function drm/i915: fix transcoder PLL select masking ...
| * Revert "drm/ttm: add a way to bo_wait for either the last read or last write"Dave Airlie2011-10-27
| | | | | | | | | | | | | | | | | | This reverts commit dfadbbdb57b3f2bb33e14f129a43047c6f0caefa. Further upstream discussion between Marek and Thomas decided this wasn't fully baked and needed further work, so revert it before it hits mainline. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * Revert "drm/radeon/kms: add a new gem_wait ioctl with read/write flags"Dave Airlie2011-10-27
| | | | | | | | | | | | | | | | | | This reverts commit d3ed74027f1dd197b7e08247a40d3bf9be1852b0. Further upstream discussion between Thomas and Marek decided this needed more work and driver specifics. So revert before it goes upstream. Signed-off-by: Dave Airlie <airlied@redhat.com>
| * Merge branch 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux ↵Dave Airlie2011-10-24
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | into drm-core-next * 'drm-intel-next' of git://people.freedesktop.org/~keithp/linux: (72 commits) drm/i915/dp: Fix eDP on PCH DP on CPT/PPT drm/i915/dp: Introduce is_cpu_edp() drm/i915: use correct SPD type value drm/i915: fix ILK+ infoframe support drm/i915: add DP test request handling drm/i915: read full receiver capability field during DP hot plug drm/i915/dp: Remove eDP special cases from bandwidth checks drm/i915/dp: Fix the math in intel_dp_link_required drm/i915/panel: Always record the backlight level again (but cleverly) i915: Move i915_read/write out of line drm/i915: remove transcoder PLL mashing from mode_set per specs drm/i915: if transcoder disable fails, say which drm/i915: set watermarks for third pipe on IVB drm/i915: export a CPT mode set verification function drm/i915: fix transcoder PLL select masking drm/i915: fix IVB cursor support drm/i915: fix debug output for 3 pipe configs drm/i915: add PLL sharing support to handle 3 pipes drm/i915: fix PCH PLL assertion check for 3 pipes drm/i915: use transcoder select bits on VGA and HDMI on CPT ...
| | * drm/i915/dp: Fix eDP on PCH DP on CPT/PPTAdam Jackson2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | According to the gen6 docs, only the DP_A port (on-CPU eDP) still uses the old IBX bit shift for the link training pattern setup bits. Signed-off-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/dp: Introduce is_cpu_edp()Adam Jackson2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | The obvious counterpart to is_pch_edp(). Convert existing instances of the idiom to the new routine. Signed-off-by: Adam Jackson <ajax@redhat.com> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: use correct SPD type valueJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | SPD frames are actually type 0x83, not just 0x3. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix ILK+ infoframe supportJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Misc fixes based on tests with an infoframe analyzer: - checksum *does* include header bytes - DIP enable & AVI infoframe are tied together in hw, so disable both and make sure AVI frames are enabled first - use every vsync flag for SPD frames to avoid reserved value in frequency field when enabling both AVI & SPD Fixes https://bugs.freedesktop.org/show_bug.cgi?id=40281. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Cc: stable@kernel.org Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add DP test request handlingJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | DPCD 1.1+ adds some automated test infrastructure support. Add support for reading the IRQ source and jumping to a test handling routine if needed. Subsequent patches will handle particular tests; this patch just ACKs any requested tests by default. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: read full receiver capability field during DP hot plugJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Read link status first, followed by the full DPCD receiver cap field rather than just the first 8 bytes. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/dp: Remove eDP special cases from bandwidth checksAdam Jackson2011-10-21
| | | | | | | | | | | | | | | | | | | | | These were just working around the math being wrong. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/dp: Fix the math in intel_dp_link_requiredAdam Jackson2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | The previous code was confused about units, which is pretty reasonable given that the units themselves are confusing. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915/panel: Always record the backlight level again (but cleverly)Takashi Iwai2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The commit 47356eb67285014527a5ab87543ba1fae3d1e10a introduced a mechanism to record the backlight level only at disabling time, but it also introduced a regression. Since intel_lvds_enable() may be called without disabling (e.g. intel_lvds_commit() calls it unconditionally), the backlight gets back to the last recorded value. For example, this happens when you dim the backlight, close the lid and open the lid, then the backlight suddenly goes to the brightest. This patch fixes the bug by recording the backlight level always when changed via intel_panel_set_backlight(). And, intel_panel_{enable|disable}_backlight() call the internal function not to update the recorded level wrongly. Cc: <stable@kernel.org> Signed-off-by: Takashi Iwai <tiwai@suse.de> Reviewed-by: Keith Packard <keithp@keithp.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * i915: Move i915_read/write out of lineAndi Kleen2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With the tracing code in there they are far too big to inline. .text savings compared to a non force inline kernel: i915_restore_display 4393 12036 +7643 i915_save_display 4295 11459 +7164 i915_handle_error 2979 6666 +3687 i915_driver_irq_handler 2923 5086 +2163 i915_ringbuffer_info 458 1661 +1203 i915_save_vga - 1200 +1200 i915_driver_irq_uninstall 453 1624 +1171 i915_driver_irq_postinstall 913 2078 +1165 ironlake_enable_drps 719 1872 +1153 i915_restore_vga - 1142 +1142 intel_display_capture_error_state 784 2030 +1246 intel_init_emon 719 2016 +1297 and more ... [AK: these are older numbers, with the new SNB forcewake checks it will be even worse] Signed-off-by: Andi Kleen <ak@linux.intel.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: remove transcoder PLL mashing from mode_set per specsJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Belongs in PCH enable instead. The duplication is worrying and the specs explicitly list transcoder select *after* actual PLL enable, which doesn't occur until later. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: if transcoder disable fails, say whichJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | Just some extra debug output. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: set watermarks for third pipe on IVBJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The watermark reg for the third pipe is in an unusual offset; add support for it and set watermarks for 3 pipe configs. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: export a CPT mode set verification functionJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At the point where we check, we can't do much about the failure, but it can aid debugging. Note that the auto-train override bit will be reset as part of normal mode setting with this patch if a pipe ever does get stuck, but that's consistent with the workaround for CPT provided by the hardware team. This patch helped catch the fact that the pipe wasn't running in the !composite sync FDI case on my IVB SDV, so has already shown to be useful. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix transcoder PLL select maskingJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Transcoder A will always use PLL A and transcoder B will use PLL B. But transcoder C could use either, so always mask the select bits off before or'ing in a new value. Reported-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix IVB cursor supportJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The cursor regs have moved around, add the offsets and new macros for getting at them. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix debug output for 3 pipe configsJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | We can have more than just A and B these days. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: add PLL sharing support to handle 3 pipesJesse Barnes2011-10-21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add two new fields to the intel_crtc struct for 3 pipe support: no_pll and use_pll_a. The no_pll field is only set on the 3rd pipe to indicate that it doesn't have a PLL of its own and so shouldn't try to write the main PLL regs. The use_pll_a field controls which PLL pipe 3 will share, A or B. The core code will try to share PLLs with whichever pipe has the same timings, rejecting the mode set if none is found. This means that pipe 3 must always be set after one of the other pipes has been configured with real PLL settings. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: fix PCH PLL assertion check for 3 pipesJesse Barnes2011-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a couple of checks now that we're using the 3rd transcoder: 1) make sure the transcoder PLL enable bit is set for the transcoder in question 2) when checking actual PLL enable, use the selected PLL number rather than the transcoder number (they could be different now) Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: use transcoder select bits on VGA and HDMI on CPTJesse Barnes2011-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Required for 3 pipe functionality. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: split refclk code out of ironlake_crtc_mode_setJesse Barnes2011-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Just a cleanup to make the mode_set function more manageable. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: support 3 pipes on IVB+Jesse Barnes2011-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Well almost anyway. IVB has 3 planes, pipes, transcoders, and FDI interfaces, but only 2 pipe PLLs. So two of the pipes must use the same pipe timings (e.g. 2 DP plus one other, or two HDMI with the same mode and one other, etc.). Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
| | * drm/i915: PLL macro cleanup and pipe assertion checkJesse Barnes2011-10-20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a macro for accessing the two pipe PLLs and add a check to make sure we don't access a non-existent one in the enable/disable functions. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Tested-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Reviewed-By: Eugeni Dodonov <eugeni.dodonov@intel.com> Signed-off-by: Keith Packard <keithp@keithp.com>
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-21 16:23:30 -0400