litmus-rt-tegra.git - LITMUS^RT and MC^2 V0 support for the NVIDIA Tegra 3 SoC

	Commit message (Expand)	Author	Age
*	agp/intel: Fix typo in G4x_GMCH_SIZE_VT_2M	Chris Wilson	2011-07-13
*	agp/intel: add Ivy Bridge support	Jesse Barnes	2011-05-13
*	agp/intel: Experiment with a 855GM GWB bit	Chris Wilson	2011-02-22
*	agp/intel: Flush the chipset write buffers when changing GTT base	Chris Wilson	2011-01-11
*	intel-gtt: maximize ggtt size on platforms that support this	Daniel Vetter	2010-10-27
*	Merge branch 'drm-intel-fixes' into HEAD	Chris Wilson	2010-09-21
\|\
\| *	drm/i915,agp/intel: Add second set of PCI-IDs for B43	Chris Wilson	2010-09-17
* \|	intel-gtt: introduce intel_gtt_driver	Daniel Vetter	2010-09-08
* \|	agp/intel: make intel-gtt.c into a real source file	Daniel Vetter	2010-09-08
\|/
*	intel_agp,i915: Add more sandybridge graphics device ids	Zhenyu Wang	2010-09-07
*	agp/intel: use #ifdef idiom for intel-agp.h	Zhenyu Wang	2010-09-07
*	drm/i915,intel_agp: Add support for Sandybridge D0	Zhenyu Wang	2010-08-22
*	agp/intel: Add actual definitions of the Sandybridge PTE caching bits.	Zhenyu Wang	2010-08-01
*	agp/intel: introduce intel-agp.h header file	Daniel Vetter	2010-04-18