litmus-rt-tegra.git - LITMUS^RT and MC^2 V0 support for the NVIDIA Tegra 3 SoC

	Commit message (Expand)	Author	Age
*	MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1	Shane McDonald	2010-05-15
*	MIPS: Add accessor functions and bit definitions for c0_PageGrain	David Daney	2010-02-27
*	MIPS: Decode c0_config4 for large TLBs.	David Daney	2010-02-27
*	MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs	David VomLehn	2010-01-27
*	MIPS: Add hugetlbfs page defines.	David Daney	2009-06-17
*	MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.	Ralf Baechle	2009-05-14
*	MIPS: Cavium: Add support for 8k and 32k page sizes.	Ralf Baechle	2009-05-14
*	MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.	Kevin D. Kissell	2009-05-14
*	MIPS: Change {set,clear,change}_c0_<foo> to return old value.	Ralf Baechle	2009-03-23
*	MIPS: Override assembler target architecture for octeon.	David Daney	2009-01-11
*	MIPS: Add Cavium OCTEON specific register definitions to mipsregs.h	David Daney	2009-01-11
*	MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors	Shinya Kuribayashi	2008-10-27
*	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle	2008-10-11