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| * | | m68knommu: use read/write IO access functions in ColdFire m532x setup codeGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Get rid of the use of local IO access macros and switch to using the standard read*/write* family of access functions for the ColdFire m532x setup code. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: modify ColdFire 532x GPIO register definitions to be consistentGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ColdFire 532x CPU register definitions for the multi-function setup pins are inconsistently defined compared with other ColdFire parts. Modify the register defintions to be just the addresses, not pointers. This also fixes the erroneous use in one case of using these values in the UART setup code for the 532x. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove a lot of unsed definitions for 532x ColdFireGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There are a lot of unused and uneccessary definitions in the header to support the ColdFire 532x CPU family. Remove the junk. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove address offsets relative to IPSBAR for ColdFire 527xGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the last address definitions relative to the IPSBAR peripheral region for the ColdFire 527x family. This involved cleaning up some magic numbers used in the code part, and making them proper register definitions in the 527x specific header. This is part of the process of cleaning up the ColdFire register definitions to make them consistently use absolute addresses for the primary registers. This will reduce the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: remove unused ColdFire 5282 register definitionsGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | There is a bunch of old unused and ugly register definitions in the ColdFire 5282 header. Remove them. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pinsGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The registers used to configure and set the multifunction pins on the 5272 ColdFire are defined as absolute addresses. So the use of them does not need to be offset relative to the peripheral region address. Fix two cases of incorrect usage of these addresses. Both affect UART initialization, one in the common UART pin setup code, the other in the NETtel board specific UART signal handling. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the ColdFire 5249 MBAR peripheral register definitions absolute addresses, instead of offsets into the region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make remaining ColdFire 5272 register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make the remaining definitions of the 5272 ColdFire registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Park and Assignment register definitions absolute ↵Greg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire MPARK and IRQ Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Chip Select register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Chip Select registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Interrupt Source register definitions absolute ↵Greg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | addresses Make all definitions of the ColdFire Interrupt Source registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire Pin Assignment register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Pin Assignment registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire watchdog register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Software watchdog registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire SYPCR and RSR register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Reset and System registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the abolsute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: make ColdFire IMR and IPR register definitions absolute addressesGreg Ungerer2012-09-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make all definitions of the ColdFire Interrupt Mask and Pending registers absolute addresses. Currently some are relative to the MBAR peripheral region. The various ColdFire parts use different methods to address the internal registers, some are absolute, some are relative to peripheral regions which can be mapped at different address ranges (such as the MBAR and IPSBAR registers). We don't want to deal with this in the code when we are accessing these registers, so make all register definitions the absolute address - factoring out whether it is an offset into a peripheral region. This makes them all consistently defined, and reduces the occasional bugs caused by inconsistent definition of the register addresses. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | | m68knommu: use "r", not "i" constraint in cacheflush asm'sPhilippe De Muyter2012-09-27
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | Let the compiler choose which register to use in the cache flushing asm statements, instead of imposing %d0. Additionally, fix two typo's. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | / cross-arch: don't corrupt personality flags upon exec()Jiri Kosina2012-10-05
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Historically, the top three bytes of personality have been used for things such as ADDR_NO_RANDOMIZE, which made sense only for specific architectures. We now however have a flag there that is general no matter the architecture (UNAME26); generally we have to be careful to preserve the personality flags across exec(). This patch tries to fix all architectures that forcefully overwrite personality flags during exec() (ppc32 and s390 have been fixed recently by commits f9783ec862ea ("[S390] Do not clobber personality flags on exec") and 59e4c3a2fe9c ("powerpc/32: Don't clobber personality flags on exec") in a similar way already). Signed-off-by: Jiri Kosina <jkosina@suse.cz> Cc: Haavard Skinnemoen <hskinnemoen@gmail.com> Cc: Hans-Christian Egtvedt <egtvedt@samfundet.no> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Mark Salter <msalter@redhat.com> Cc: Mikael Starvik <starvik@axis.com> Cc: Jesper Nilsson <jesper.nilsson@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Richard Kuo <rkuo@codeaurora.org> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Michal Simek <monstr@monstr.eu> Cc: Koichi Yasutake <yasutake.koichi@jp.panasonic.com> Cc: Jonas Bonn <jonas@southpole.se> Cc: Chen Liqin <liqin.chen@sunplusct.com> Cc: Lennox Wu <lennox.wu@gmail.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | UAPI: (Scripted) Convert #include "..." to #include <path/...> in kernel ↵David Howells2012-10-02
| | | | | | | | | | | | | | | | | | | | | | | | system headers Convert #include "..." to #include <path/...> in kernel system headers. Signed-off-by: David Howells <dhowells@redhat.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Acked-by: Dave Jones <davej@redhat.com>
* | m68k/apollo: Remove disabled definitions in apollohw.hGeert Uytterhoeven2012-08-18
|/ | | | Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* Merge branch 'for-linus' of ↵Linus Torvalds2012-08-03
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k Pull m68k updates from Geert Uytterhoeven. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Make sys_atomic_cmpxchg_32 work on classic m68k m68k/apollo: Rename "timer" to "apollo_timer" zorro: Remove unused zorro_bus.devices m68k: Remove never used asm/shm.h m68k/sun3: Remove unselectable code in prom_init() m68k: Use asm-generic version of <asm/sections.h> m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop} mtd/uclinux: Use generic __bss_stop instead of _ebss m68knommu: Allow ColdFire CPUs to use unaligned accesses m68k: Remove five unused headers m68k: CPU32 does not support unaligned accesses m68k: Introduce config option CPU_HAS_NO_UNALIGNED m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64 m68k: Move CPU_HAS_* config options m68k: Remove duplicate FPU config option m68knommu: Clean up printing of sections m68k: Use asm-generic version of <asm/types.h> m68k: Use Kbuild logic to import asm-generic headers
| * m68k/apollo: Rename "timer" to "apollo_timer"Geert Uytterhoeven2012-07-22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In file included from include/linux/kgdb.h:17, from include/linux/fb.h:8, from drivers/video/dnfb.c:15: include/linux/serial_8250.h:71: error: expected identifier or ‘(’ before numeric constant include/linux/serial_8250.h:72: error: expected ‘;’ before ‘struct’ make[1]: *** [drivers/video/dnfb.o] Error 1 This is caused by #define timer (IO_BASE + timer_physaddr) in <asm/apollohw.h>, which conflicts with the new "timer" struct member in <linux/serial_8250.h>. Rename "timer" to "apollo_timer", as it's a way too generic name for a global #define. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> -- http://kisskb.ellerman.id.au/kisskb/buildresult/6739606/
| * m68k: Remove never used asm/shm.hPaul Bolle2012-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | m68k's asm/shm.h header has been part of the tree ever since m68k support got added in v1.3.94. (It started as /include/asm-m68k/shm.h and moved to its current location a few years ago.) It seems it was never used: no file ever included it and nothing used the macros it defines. (Actually, from v2.5.46 until v2.6.29-rc3 it was included by m68knommu's asm/shm.h. But that header was just a very thin wrapper for this header and was itself unused too.) This header can safely be removed. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Use asm-generic version of <asm/sections.h>Geert Uytterhoeven2012-06-27
| | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Replace m68k-specific _[se]bss by generic __bss_{start,stop}Geert Uytterhoeven2012-06-27
| | | | | | | | | | | | | | | | BSS_SECTION() provides the __bss_{start,stop} symbols, so there's no need to wrap our own _[se]bss around it. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Remove five unused headersPaul Bolle2012-06-27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are five entirely unused headers in arch/m68k/include/asm. Nothing includes these headers. And a few tests found no hits for the things they provide (which makes sense). MC68332.h, mac_mouse.h, and mcfmbus.h are all unused since at least v2.6.12-rc2 (I didn't bother looking further back than that). apollodma.h is unused since v2.6.19: commit 2ed0ce5b57950a620155433c62a5a02a067f1376 ("m68k/Apollo: Remove obsolete arch/m68k/apollo/dma.c") removed the last file interested in that header. And everything interested in <asm/sbus.h> was removed in the v2.6.28 release cycle. The last occurrence of "sbus.h" was deleted with commit 0c0db98b50ed1217c0dbf4051722034ba314d06e ("sparc: Remove Documentation/sparc/sbus_drivers.txt"). I'm not sure whether anything relevant for m68k was included in v2.6.27, but it doesn't really matter. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Greg Ungerer<gerg@uclinux.org> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Introduce config option CPU_HAS_NO_UNALIGNEDGeert Uytterhoeven2012-06-10
| | | | | | | | | | | | | | | | Use CONFIG_CPU_HAS_NO_UNALIGNED instead of open coding CONFIG_M68000 || CONFIG_COLDFIRE Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: delay, muldi3 - Use CONFIG_CPU_HAS_NO_MULDIV64Geert Uytterhoeven2012-06-10
| | | | | | | | | | | | | | instead of open coding CONFIG_M68000 || CONFIG_COLDFIRE Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer<gerg@uclinux.org>
| * m68k: Use asm-generic version of <asm/types.h>Geert Uytterhoeven2012-06-10
| | | | | | | | | | | | | | | | The extra definition for BITS_PER_LONG we had is also indirectly provided by <asm-generic/types.h>, via <asm-generic/int-ll64.h> and <asm/bitsperlong.h> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * m68k: Use Kbuild logic to import asm-generic headersGeert Uytterhoeven2012-06-10
| | | | | | | | | | | | | | Replace all headers files that just include their asm-generic version by Kbuild logic Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
* | ipc: use Kconfig options for __ARCH_WANT_[COMPAT_]IPC_PARSE_VERSIONWill Deacon2012-07-30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rather than #define the options manually in the architecture code, add Kconfig options for them and select them there instead. This also allows us to select the compat IPC version parsing automatically for platforms using the old compat IPC interface. Reported-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* | Merge branch 'for-next' of ↵Linus Torvalds2012-07-24
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu Pull m68knommu arch update from Greg Ungerer: "Quite a varied set of changes this time. - A little more merge cleanup, this time the assembler entry code. - New sub-architecture support for the ColdFire 5251/5253 and 5441x CPU families. - Specific clk support code for the ColdFire 520x and 532x CPU familes. - Refactoring of the ColdFire GPIO support. - PCI bus support for some ColdFire CPUS that have PCI hardware (54xx family). This showed up a few problems with ColdFire cache, allocating coherent memory and bi-directional DMA support. Fixes for those too." * 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: (21 commits) m68k: allow PCI bus to be enabled for ColdFire m54xx CPUs m68k: add PCI bus code support for the ColdFire M54xx SoC family m68k: add IO access definitions to support PCI on ColdFire platforms m68k: add PCI bus support definitions for the ColdFire M54xx SoC family m68k: common PCI support definitions and code m68k: add support for DMA_BIDIRECTIONAL in dma support functions m68k: fix ColdFire clear cache operation m68k: use simpler dma_alloc_coherent() for ColdFire CPUs m68knommu: platform support for 8390 based ethernet used on some boards m68knommu: Add clk definitions for m532x. m68knommu: Add clk definitions for m520x. m68knommu: Add rtc device for m5441x. m68knommu: add definitions for the third interrupt controller on devices that don't have a third interrupt controller. m68knommu: Add support for the Coldfire m5441x. m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 coldfire-qspi: Add support for the Coldfire 5251/5253. m68knommu: Add support for the Coldfire 5251/5253 m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate mcf_gpio_chips. m68k: merge the MMU and non-MMU versions of the entry.S code m68k: use jbsr to call functions instead of bsrl ...
| * | m68k: add IO access definitions to support PCI on ColdFire platformsGreg Ungerer2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | Define the usual memory access functions (readb/writeb/...) and I/O space functions (inb/outb/...) for PCI bus support on ColdFire CPU based platforms. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * | m68k: add PCI bus support definitions for the ColdFire M54xx SoC familyGreg Ungerer2012-07-17
| | | | | | | | | | | | | | | | | | | | | Add all the required definitoins to support the ColdFire M54xx SoC PCI hardware unit. These are strait out of the MCF5475 Reference Manual. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68k: common PCI support definitions and codeGreg Ungerer2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | | | | Basic set of definitions and support code required to turn on CONFIG_PCI for the m68k architecture. Nothing specific to any PCI implementation in any m68k class CPU hardware yet. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
| * | m68k: fix ColdFire clear cache operationGreg Ungerer2012-07-17
| | | | | | | | | | | | | | | | | | | | | | | | The code for clearing (invalidating) the ColdFire cache is actually performing a push operation. Add functions to clear the cache, and fix cache_clear() to call the appropriate clear cache function. Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: Add clk definitions for m532x.Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | The 532x has individually controllable clocks for it peripherals. Add clk definitions for these and add default initialization of either enabled or disabled. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: Add clk definitions for m520x.Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | The 520x has individually controllable clocks for its peripherals. Add clk definitions for these and add default initialization of either enabled or disabled for all of the clocks. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: Add rtc device for m5441x.Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | Add definitions for the m5441x rtc device and an init_BSP function to the m5441x device code. Signed-off-by: Steven King <sfking@fdwdc.com>
| * | m68knommu: add definitions for the third interrupt controller on devices ↵Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | that don't have a third interrupt controller. Extending the interrupt controller code in intc-simr.c to support the third interrupt controller on the m5441x means we need to add defines (as 0) for the third interrupt controller on devices that don't have a third interrupt controller. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: Add support for the Coldfire m5441x.Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for the Coldfire 5441x (54410/54415/54416/54417/54418). Currently we only support noMMU mode. It requires the PIT patch posted previously as it uses the PIT instead of the dma timer as a clock source so we can get all that GENERIC_CLOCKEVENTS goodness. It also adds some simple clk definitions and very simple minded power management. The gpio code is tweeked and some additional devices are added to devices.c. The Makefile uses -mv4e as apparently, the only difference a v4m (m5441x) and a v4e is the later has a FPU, which I don't think should matter to us in the kernel. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | use MCF_IRQ_PIT1 instead of MCFINT_VECBASE + MCFINT_PIT1 so we can support those parts that have the pit1 interrupt on other than the first interrupt controller. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: Add support for the Coldfire 5251/5253Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | Basic support for the Coldfire 5251/5253. Signed-off-by: Steven king <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
| * | m68knommu: refactor Coldfire GPIO not to require GPIOLIB, eliminate ↵Steven King2012-07-15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | mcf_gpio_chips. If we're not connecting external GPIO extenders via i2c or spi or whatever, we probably don't need GPIOLIB. If we provide an alternate implementation of the GPIOLIB functions to use when only on-chip GPIO is needed, we can change ARCH_REQUIRE_GPIOLIB to ARCH_WANTS_OPTIONAL_GPIOLIB so that GPIOLIB becomes optional. The downside is that in the GPIOLIB=n case, we lose all error checking done by gpiolib, ie multiply allocating the gpio, free'ing gpio etc., so that the only checking that can be done is if we reference a gpio on an external part. Targets that need the extra error checking can still select GPIOLIB=y. For the case where GPIOLIB=y, we can simplify the table of gpio chips to use a single chip, eliminating the tables of chips in the 5xxx.c files. The original motivation for the definition of multiple chips was to match the way many of the Coldfire variants defined their gpio as a spare array in memory. However, all this really gains us is some error checking when we request a gpio, gpiolib can check that it doesn't fall in one of the holes. If thats important, I think we can still come up with a better way of accomplishing that. Also in this patch is some general cleanup and reorganizing of the gpio header files (I'm sure I must have had a reason why I sometimes used a prefix of mcf_gpio and other times mcfgpio but for the life of me I can't think of it now). Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* | | net: add support for NS8390 based eth controllers on some ColdFire CPU boardsGreg Ungerer2012-07-12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A number of older ColdFire CPU based boards use NS8390 based network controllers. Most use the Davicom 9008F or the UMC 9008F. This driver provides the support code to get these devices working on these platforms. Generally the NS8390 based eth device is direct connected via the general purpose bus of the ColdFire CPU. So its addressing and interrupt setup is fixed on each of the different platforms (classic platform setup). This driver is based on the other drivers/net/ethernet/8390 drivers, and includes the lib8390.c code. It uses the existing definitions of the board NS8390 device addresses, interrupts and access types from the arch/m68k/include/asm/mcf8390.h, but moves the IO access functions into the driver code and out of that header. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | | m68knommu: move the badly named mcfne.h to a better mcf8390.hGreg Ungerer2012-07-12
|/ / | | | | | | | | | | | | | | The mcfne.h include contains definitions to support NS8390 eth based hardware on ColdFire based CPU boards. So change its name to reflect that better. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: David S. Miller <davem@davemloft.net>
* | Merge branch 'for-linus' of ↵Linus Torvalds2012-06-13
|\| | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k Pull m68k update from Geert Uytterhoeven. This makes m68k use the generic library functions for the user-space strn[cpy|len] functions. * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k: m68k: Use generic strncpy_from_user(), strlen_user(), and strnlen_user()
| * m68k: Use generic strncpy_from_user(), strlen_user(), and strnlen_user()Geert Uytterhoeven2012-06-06
| | | | | | | | | | Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Greg Ungerer <gerg@uclinux.org>
* | m68knommu: m528x qspi definition fixSteven King2012-06-11
|/ | | | | | | The consolidation of the qspi code missed a definition for 528x. Signed-off-by: Steven King <sfking@fdwdc.com> Signed-off-by: Greg Ungerer <gerg@uclinux.org>
* bury __kernel_nlink_t, make internal nlink_t consistentAl Viro2012-05-30
| | | | Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
* Merge branch 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2012-05-24
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull KVM changes from Avi Kivity: "Changes include additional instruction emulation, page-crossing MMIO, faster dirty logging, preventing the watchdog from killing a stopped guest, module autoload, a new MSI ABI, and some minor optimizations and fixes. Outside x86 we have a small s390 and a very large ppc update. Regarding the new (for kvm) rebaseless workflow, some of the patches that were merged before we switch trees had to be rebased, while others are true pulls. In either case the signoffs should be correct now." Fix up trivial conflicts in Documentation/feature-removal-schedule.txt arch/powerpc/kvm/book3s_segment.S and arch/x86/include/asm/kvm_para.h. I suspect the kvm_para.h resolution ends up doing the "do I have cpuid" check effectively twice (it was done differently in two different commits), but better safe than sorry ;) * 'next' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (125 commits) KVM: make asm-generic/kvm_para.h have an ifdef __KERNEL__ block KVM: s390: onereg for timer related registers KVM: s390: epoch difference and TOD programmable field KVM: s390: KVM_GET/SET_ONEREG for s390 KVM: s390: add capability indicating COW support KVM: Fix mmu_reload() clash with nested vmx event injection KVM: MMU: Don't use RCU for lockless shadow walking KVM: VMX: Optimize %ds, %es reload KVM: VMX: Fix %ds/%es clobber KVM: x86 emulator: convert bsf/bsr instructions to emulate_2op_SrcV_nobyte() KVM: VMX: unlike vmcs on fail path KVM: PPC: Emulator: clean up SPR reads and writes KVM: PPC: Emulator: clean up instruction parsing kvm/powerpc: Add new ioctl to retreive server MMU infos kvm/book3s: Make kernel emulated H_PUT_TCE available for "PR" KVM KVM: PPC: bookehv: Fix r8/r13 storing in level exception handler KVM: PPC: Book3S: Enable IRQs during exit handling KVM: PPC: Fix PR KVM on POWER7 bare metal KVM: PPC: Fix stbux emulation KVM: PPC: bookehv: Use lwz/stw instead of PPC_LL/PPC_STL for 32-bit fields ...
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