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1/*
2 * Copyright (C) 2011 NVIDIA Corporation.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 * You should have received a copy of the GNU General Public License
14 * along with this program; if not, write to the Free Software
15 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
16 * 02111-1307, USA
17 */
18
19#ifndef __SH532U_H__
20#define __SH532U_H__
21
22#include <media/nvc_focus.h>
23
24
25struct sh532u_platform_data {
26 int cfg;
27 int num;
28 int sync;
29 const char *dev_name;
30 struct nvc_focus_nvc (*nvc);
31 struct nvc_focus_cap (*cap);
32 struct sh532u_pdata_info (*info);
33 __u8 i2c_addr_rom;
34 unsigned gpio_reset;
35/* Due to a Linux limitation, a GPIO is defined to "enable" the device. This
36 * workaround is for when the device's power GPIO's are behind an I2C expander.
37 * The Linux limitation doesn't allow the I2C GPIO expander to be ready for
38 * use when this device is probed.
39 */
40 unsigned gpio_en;
41};
42
43struct sh532u_pdata_info {
44 __s16 pos_low;
45 __s16 pos_high;
46 __s16 limit_low;
47 __s16 limit_high;
48 int move_timeoutms;
49 __u32 focus_hyper_ratio;
50 __u32 focus_hyper_div;
51};
52
53
54/* Register Definition : Sany Driver IC */
55/* EEPROM addresses */
56#define addrHallOffset 0x10
57#define addrHallBias 0x11
58#define addrInf1 0x12
59#define addrMac1 0x13
60#define addrLoopGainH 0x14
61#define addrLoopGainL 0x15
62#define addrInf2 0x16
63#define addrMac2 0x17
64
65#define addrInf1_H 0x20 /* bottom mechanical limit of HVCA */
66#define addrInf1_L 0x21
67#define addrMac1_H 0x22 /* top mechanical limit of HVCA */
68#define addrMac1_L 0x23
69#define addrInf2_H 0x24 /* lens position when object is ?120cm */
70#define addrInf2_L 0x25
71#define addrMac2_H 0x26 /* lens position when object is ?10cm */
72#define addrMac2_L 0x27
73#define addrDacDeltaUp_H 0x28 /* difference between face up and down */
74#define addrDacDeltaUp_L 0x29
75#define addrAFoffset_H 0x2A /* best focus position subtract value */
76#define addrAFoffset_L 0x2B
77
78/* Convergence Judgement */
79#define INI_MSSET_211 0x00
80#define CHTGOKN_TIME 0x80
81#define CHTGOKN_WAIT 1
82#define CHTGOKN_TIMEOUT 50
83#define CHTGSTOKN_TOMEOUT 15
84
85/* StepMove */
86#define STMV_SIZE 0x0180
87
88#define STMCHTG_ON 0x08
89#define STMSV_ON 0x04
90#define STMLFF_ON 0x02
91#define STMVEN_ON 0x01
92#define STMCHTG_OFF 0x00
93#define STMSV_OFF 0x00
94#define STMLFF_OFF 0x00
95#define STMVEN_OFF 0x00
96
97#define STMCHTG_SET STMCHTG_ON
98#define STMSV_SET STMSV_ON
99#define STMLFF_SET STMLFF_OFF
100
101#define CHTGST_ON 0x01
102#define DEFAULT_DADAT 0x8040
103
104/* Delay RAM 00h ~ 3Fh */
105#define ADHXI_211H 0x00
106#define ADHXI_211L 0x01
107#define PIDZO_211H 0x02
108#define PIDZO_211L 0x03
109#define RZ_211H 0x04
110#define RZ_211L 0x05
111#define DZ1_211H 0x06
112#define DZ1_211L 0x07
113#define DZ2_211H 0x08
114#define DZ2_211L 0x09
115#define UZ1_211H 0x0A
116#define UZ1_211L 0x0B
117#define UZ2_211H 0x0C
118#define UZ2_211L 0x0D
119#define IZ1_211H 0x0E
120#define IZ1_211L 0x0F
121#define IZ2_211H 0x10
122#define IZ2_211L 0x11
123#define MS1Z01_211H 0x12
124#define MS1Z01_211L 0x13
125#define MS1Z11_211H 0x14
126#define MS1Z11_211L 0x15
127#define MS1Z12_211H 0x16
128#define MS1Z12_211L 0x17
129#define MS1Z22_211H 0x18
130#define MS1Z22_211L 0x19
131#define MS2Z01_211H 0x1A
132#define MS2Z01_211L 0x1B
133#define MS2Z11_211H 0x1C
134#define MS2Z11_211L 0x1D
135#define MS2Z12_211H 0x1E
136#define MS2Z12_211L 0x1F
137#define MS2Z22_211H 0x20
138#define MS2Z22_211L 0x21
139#define MS2Z23_211H 0x22
140#define MS2Z23_211L 0x23
141#define OZ1_211H 0x24
142#define OZ1_211L 0x25
143#define OZ2_211H 0x26
144#define OZ2_211L 0x27
145#define DAHLXO_211H 0x28
146#define DAHLXO_211L 0x29
147#define OZ3_211H 0x2A
148#define OZ3_211L 0x2B
149#define OZ4_211H 0x2C
150#define OZ4_211L 0x2D
151#define OZ5_211H 0x2E
152#define OZ5_211L 0x2F
153#define oe_211H 0x30
154#define oe_211L 0x31
155#define MSR1CMAX_211H 0x32
156#define MSR1CMAX_211L 0x33
157#define MSR1CMIN_211H 0x34
158#define MSR1CMIN_211L 0x35
159#define MSR2CMAX_211H 0x36
160#define MSR2CMAX_211L 0x37
161#define MSR2CMIN_211H 0x38
162#define MSR2CMIN_211L 0x39
163#define OFFSET_211H 0x3A
164#define OFFSET_211L 0x3B
165#define ADOFFSET_211H 0x3C
166#define ADOFFSET_211L 0x3D
167#define EZ_211H 0x3E
168#define EZ_211L 0x3F
169
170/* Coefficient RAM 40h ~ 7Fh */
171#define ag_211H 0x40
172#define ag_211L 0x41
173#define da_211H 0x42
174#define da_211L 0x43
175#define db_211H 0x44
176#define db_211L 0x45
177#define dc_211H 0x46
178#define dc_211L 0x47
179#define dg_211H 0x48
180#define dg_211L 0x49
181#define pg_211H 0x4A
182#define pg_211L 0x4B
183#define gain1_211H 0x4C
184#define gain1_211L 0x4D
185#define gain2_211H 0x4E
186#define gain2_211L 0x4F
187#define ua_211H 0x50
188#define ua_211L 0x51
189#define uc_211H 0x52
190#define uc_211L 0x53
191#define ia_211H 0x54
192#define ia_211L 0x55
193#define ib_211H 0x56
194#define ib_211L 0x57
195#define i_c_211H 0x58
196#define i_c_211L 0x59
197#define ms11a_211H 0x5A
198#define ms11a_211L 0x5B
199#define ms11c_211H 0x5C
200#define ms11c_211L 0x5D
201#define ms12a_211H 0x5E
202#define ms12a_211L 0x5F
203#define ms12c_211H 0x60
204#define ms12c_211L 0x61
205#define ms21a_211H 0x62
206#define ms21a_211L 0x63
207#define ms21b_211H 0x64
208#define ms21b_211L 0x65
209#define ms21c_211H 0x66
210#define ms21c_211L 0x67
211#define ms22a_211H 0x68
212#define ms22a_211L 0x69
213#define ms22c_211H 0x6A
214#define ms22c_211L 0x6B
215#define ms22d_211H 0x6C
216#define ms22d_211L 0x6D
217#define ms22e_211H 0x6E
218#define ms22e_211L 0x6F
219#define ms23p_211H 0x70
220#define ms23p_211L 0x71
221#define oa_211H 0x72
222#define oa_211L 0x73
223#define oc_211H 0x74
224#define oc_211L 0x75
225#define PX12_211H 0x76
226#define PX12_211L 0x77
227#define PX3_211H 0x78
228#define PX3_211L 0x79
229#define MS2X_211H 0x7A
230#define MS2X_211L 0x7B
231#define CHTGX_211H 0x7C
232#define CHTGX_211L 0x7D
233#define CHTGN_211H 0x7E
234#define CHTGN_211L 0x7F
235
236/* Register 80h ~ 9F */
237#define CLKSEL_211 0x80
238#define ADSET_211 0x81
239#define PWMSEL_211 0x82
240#define SWTCH_211 0x83
241#define STBY_211 0x84
242#define CLR_211 0x85
243#define DSSEL_211 0x86
244#define ENBL_211 0x87
245#define ANA1_211 0x88
246#define STMVEN_211 0x8A
247#define STPT_211 0x8B
248#define SWFC_211 0x8C
249#define SWEN_211 0x8D
250#define MSNUM_211 0x8E
251#define MSSET_211 0x8F
252#define DLYMON_211 0x90
253#define MONA_211 0x91
254#define PWMLIMIT_211 0x92
255#define PINSEL_211 0x93
256#define PWMSEL2_211 0x94
257#define SFTRST_211 0x95
258#define TEST_211 0x96
259#define PWMZONE2_211 0x97
260#define PWMZONE1_211 0x98
261#define PWMZONE0_211 0x99
262#define ZONE3_211 0x9A
263#define ZONE2_211 0x9B
264#define ZONE1_211 0x9C
265#define ZONE0_211 0x9D
266#define GCTIM_211 0x9E
267#define GCTIM_211NU 0x9F
268#define STMINT_211 0xA0
269#define STMVENDH_211 0xA1
270#define STMVENDL_211 0xA2
271#define MSNUMR_211 0xA3
272#define ANA2_211 0xA4
273
274/* Device ID of HVCA Drive IC */
275#define HVCA_DEVICE_ID 0xE4
276
277/* Device ID of E2P ROM */
278#define EEP_DEVICE_ID 0xA0
279#define EEP_PAGE0 0x00
280#define EEP_PAGE1 0x02
281#define EEP_PAGE2 0x04
282#define EEP_PAGE3 0x06
283/* E2P ROM has 1023 bytes. So there are 4 pages memory */
284/* E2PROM Device ID = 1 0 1 0 0 P0 P1 0 */
285/*
286P0 P1
2870 0 : Page 0
2880 1 : Page 1
2891 0 : Page 2
2901 1 : Page 3
291*/
292/* Page 0: address 0x000~0x0FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE0 */
293/* Page 1: address 0x100~0x1FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE1 */
294/* Page 2: address 0x200~0x2FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE2 */
295/* Page 3: address 0x300~0x3FF, E2PROM Device ID = E2P_DEVICE_ID|E2P_PAGE3 */
296/*
297*/
298
299/* E2P data type define of HVCA Initial Value Section */
300#define DIRECT_MODE 0x00
301#define INDIRECT_EEPROM 0x10
302#define INDIRECT_HVCA 0x20
303#define MASK_AND 0x70
304#define MASK_OR 0x80
305
306#define DATA_1BYTE 0x01
307#define DATA_2BYTE 0x02
308
309#define START_ADDR 0x0030
310#define END_ADDR 0x01BF
311
312/*Macro define*/
313#if !defined(abs)
314#define abs(a) (((a) > 0) ? (a) : -(a))
315#endif
316
317#endif
318/* __SH532U_H__ */
319