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Diffstat (limited to 'include/linux/mlx4/device.h')
-rw-r--r--include/linux/mlx4/device.h60
1 files changed, 38 insertions, 22 deletions
diff --git a/include/linux/mlx4/device.h b/include/linux/mlx4/device.h
index 8985768e2c0..387329e0230 100644
--- a/include/linux/mlx4/device.h
+++ b/include/linux/mlx4/device.h
@@ -58,22 +58,28 @@ enum {
58}; 58};
59 59
60enum { 60enum {
61 MLX4_DEV_CAP_FLAG_RC = 1 << 0, 61 MLX4_DEV_CAP_FLAG_RC = 1LL << 0,
62 MLX4_DEV_CAP_FLAG_UC = 1 << 1, 62 MLX4_DEV_CAP_FLAG_UC = 1LL << 1,
63 MLX4_DEV_CAP_FLAG_UD = 1 << 2, 63 MLX4_DEV_CAP_FLAG_UD = 1LL << 2,
64 MLX4_DEV_CAP_FLAG_SRQ = 1 << 6, 64 MLX4_DEV_CAP_FLAG_SRQ = 1LL << 6,
65 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1 << 7, 65 MLX4_DEV_CAP_FLAG_IPOIB_CSUM = 1LL << 7,
66 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1 << 8, 66 MLX4_DEV_CAP_FLAG_BAD_PKEY_CNTR = 1LL << 8,
67 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1 << 9, 67 MLX4_DEV_CAP_FLAG_BAD_QKEY_CNTR = 1LL << 9,
68 MLX4_DEV_CAP_FLAG_DPDP = 1 << 12, 68 MLX4_DEV_CAP_FLAG_DPDP = 1LL << 12,
69 MLX4_DEV_CAP_FLAG_BLH = 1 << 15, 69 MLX4_DEV_CAP_FLAG_BLH = 1LL << 15,
70 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1 << 16, 70 MLX4_DEV_CAP_FLAG_MEM_WINDOW = 1LL << 16,
71 MLX4_DEV_CAP_FLAG_APM = 1 << 17, 71 MLX4_DEV_CAP_FLAG_APM = 1LL << 17,
72 MLX4_DEV_CAP_FLAG_ATOMIC = 1 << 18, 72 MLX4_DEV_CAP_FLAG_ATOMIC = 1LL << 18,
73 MLX4_DEV_CAP_FLAG_RAW_MCAST = 1 << 19, 73 MLX4_DEV_CAP_FLAG_RAW_MCAST = 1LL << 19,
74 MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1 << 20, 74 MLX4_DEV_CAP_FLAG_UD_AV_PORT = 1LL << 20,
75 MLX4_DEV_CAP_FLAG_UD_MCAST = 1 << 21, 75 MLX4_DEV_CAP_FLAG_UD_MCAST = 1LL << 21,
76 MLX4_DEV_CAP_FLAG_IBOE = 1 << 30 76 MLX4_DEV_CAP_FLAG_IBOE = 1LL << 30,
77 MLX4_DEV_CAP_FLAG_UC_LOOPBACK = 1LL << 32,
78 MLX4_DEV_CAP_FLAG_WOL = 1LL << 38,
79 MLX4_DEV_CAP_FLAG_UDP_RSS = 1LL << 40,
80 MLX4_DEV_CAP_FLAG_VEP_UC_STEER = 1LL << 41,
81 MLX4_DEV_CAP_FLAG_VEP_MC_STEER = 1LL << 42,
82 MLX4_DEV_CAP_FLAG_COUNTERS = 1LL << 48
77}; 83};
78 84
79enum { 85enum {
@@ -253,15 +259,10 @@ struct mlx4_caps {
253 int mtt_entry_sz; 259 int mtt_entry_sz;
254 u32 max_msg_sz; 260 u32 max_msg_sz;
255 u32 page_size_cap; 261 u32 page_size_cap;
256 u32 flags; 262 u64 flags;
257 u32 bmme_flags; 263 u32 bmme_flags;
258 u32 reserved_lkey; 264 u32 reserved_lkey;
259 u16 stat_rate_support; 265 u16 stat_rate_support;
260 int udp_rss;
261 int loopback_support;
262 int vep_uc_steering;
263 int vep_mc_steering;
264 int wol;
265 u8 port_width_cap[MLX4_MAX_PORTS + 1]; 266 u8 port_width_cap[MLX4_MAX_PORTS + 1];
266 int max_gso_sz; 267 int max_gso_sz;
267 int reserved_qps_cnt[MLX4_NUM_QP_REGION]; 268 int reserved_qps_cnt[MLX4_NUM_QP_REGION];
@@ -274,6 +275,7 @@ struct mlx4_caps {
274 u8 supported_type[MLX4_MAX_PORTS + 1]; 275 u8 supported_type[MLX4_MAX_PORTS + 1];
275 u32 port_mask; 276 u32 port_mask;
276 enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1]; 277 enum mlx4_port_type possible_type[MLX4_MAX_PORTS + 1];
278 u32 max_counters;
277}; 279};
278 280
279struct mlx4_buf_list { 281struct mlx4_buf_list {
@@ -438,6 +440,17 @@ union mlx4_ext_av {
438 struct mlx4_eth_av eth; 440 struct mlx4_eth_av eth;
439}; 441};
440 442
443struct mlx4_counter {
444 u8 reserved1[3];
445 u8 counter_mode;
446 __be32 num_ifc;
447 u32 reserved2[2];
448 __be64 rx_frames;
449 __be64 rx_bytes;
450 __be64 tx_frames;
451 __be64 tx_bytes;
452};
453
441struct mlx4_dev { 454struct mlx4_dev {
442 struct pci_dev *pdev; 455 struct pci_dev *pdev;
443 unsigned long flags; 456 unsigned long flags;
@@ -568,4 +581,7 @@ void mlx4_release_eq(struct mlx4_dev *dev, int vec);
568int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); 581int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port);
569int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); 582int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port);
570 583
584int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx);
585void mlx4_counter_free(struct mlx4_dev *dev, u32 idx);
586
571#endif /* MLX4_DEVICE_H */ 587#endif /* MLX4_DEVICE_H */