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-rw-r--r--include/asm-arm/arch-iop33x/iop331.h96
1 files changed, 2 insertions, 94 deletions
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h
index a7f47122c5e..e85e1a2e1a8 100644
--- a/include/asm-arm/arch-iop33x/iop331.h
+++ b/include/asm-arm/arch-iop33x/iop331.h
@@ -24,27 +24,6 @@
24#endif 24#endif
25 25
26/* 26/*
27 * IOP331 I/O and Mem space regions for PCI autoconfiguration
28 */
29#define IOP331_PCI_IO_WINDOW_SIZE 0x00010000
30#define IOP331_PCI_LOWER_IO_PA 0x90000000
31#define IOP331_PCI_LOWER_IO_VA 0xfe000000
32#define IOP331_PCI_LOWER_IO_BA (*IOP331_OIOWTVR)
33#define IOP331_PCI_UPPER_IO_PA (IOP331_PCI_LOWER_IO_PA + IOP331_PCI_IO_WINDOW_SIZE - 1)
34#define IOP331_PCI_UPPER_IO_VA (IOP331_PCI_LOWER_IO_VA + IOP331_PCI_IO_WINDOW_SIZE - 1)
35#define IOP331_PCI_UPPER_IO_BA (IOP331_PCI_LOWER_IO_BA + IOP331_PCI_IO_WINDOW_SIZE - 1)
36#define IOP331_PCI_IO_OFFSET (IOP331_PCI_LOWER_IO_VA - IOP331_PCI_LOWER_IO_BA)
37
38/* this can be 128M if OMWTVR1 is set */
39#define IOP331_PCI_MEM_WINDOW_SIZE 0x04000000 /* 64M outbound window */
40/* #define IOP331_PCI_MEM_WINDOW_SIZE (~*IOP331_IALR1 + 1) */
41#define IOP331_PCI_LOWER_MEM_PA 0x80000000
42#define IOP331_PCI_LOWER_MEM_BA (*IOP331_OMWTVR0)
43#define IOP331_PCI_UPPER_MEM_PA (IOP331_PCI_LOWER_MEM_PA + IOP331_PCI_MEM_WINDOW_SIZE - 1)
44#define IOP331_PCI_UPPER_MEM_BA (IOP331_PCI_LOWER_MEM_BA + IOP331_PCI_MEM_WINDOW_SIZE - 1)
45#define IOP331_PCI_MEM_OFFSET (IOP331_PCI_LOWER_MEM_PA - IOP331_PCI_LOWER_MEM_BA)
46
47/*
48 * IOP331 chipset registers 27 * IOP331 chipset registers
49 */ 28 */
50#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/ 29#define IOP331_VIRT_MEM_BASE 0xfeffe000 /* chip virtual mem address*/
@@ -54,79 +33,6 @@
54/* Reserved 0x00000000 through 0x000000FF */ 33/* Reserved 0x00000000 through 0x000000FF */
55 34
56/* Address Translation Unit 0x00000100 through 0x000001FF */ 35/* Address Translation Unit 0x00000100 through 0x000001FF */
57#define IOP331_ATUVID (volatile u16 *)IOP331_REG_ADDR(0x00000100)
58#define IOP331_ATUDID (volatile u16 *)IOP331_REG_ADDR(0x00000102)
59#define IOP331_ATUCMD (volatile u16 *)IOP331_REG_ADDR(0x00000104)
60#define IOP331_ATUSR (volatile u16 *)IOP331_REG_ADDR(0x00000106)
61#define IOP331_ATURID (volatile u8 *)IOP331_REG_ADDR(0x00000108)
62#define IOP331_ATUCCR (volatile u32 *)IOP331_REG_ADDR(0x00000109)
63#define IOP331_ATUCLSR (volatile u8 *)IOP331_REG_ADDR(0x0000010C)
64#define IOP331_ATULT (volatile u8 *)IOP331_REG_ADDR(0x0000010D)
65#define IOP331_ATUHTR (volatile u8 *)IOP331_REG_ADDR(0x0000010E)
66#define IOP331_ATUBIST (volatile u8 *)IOP331_REG_ADDR(0x0000010F)
67#define IOP331_IABAR0 (volatile u32 *)IOP331_REG_ADDR(0x00000110)
68#define IOP331_IAUBAR0 (volatile u32 *)IOP331_REG_ADDR(0x00000114)
69#define IOP331_IABAR1 (volatile u32 *)IOP331_REG_ADDR(0x00000118)
70#define IOP331_IAUBAR1 (volatile u32 *)IOP331_REG_ADDR(0x0000011C)
71#define IOP331_IABAR2 (volatile u32 *)IOP331_REG_ADDR(0x00000120)
72#define IOP331_IAUBAR2 (volatile u32 *)IOP331_REG_ADDR(0x00000124)
73#define IOP331_ASVIR (volatile u16 *)IOP331_REG_ADDR(0x0000012C)
74#define IOP331_ASIR (volatile u16 *)IOP331_REG_ADDR(0x0000012E)
75#define IOP331_ERBAR (volatile u32 *)IOP331_REG_ADDR(0x00000130)
76#define IOP331_ATU_CAPPTR (volatile u32 *)IOP331_REG_ADDR(0x00000134)
77/* Reserved 0x00000138 through 0x0000013B */
78#define IOP331_ATUILR (volatile u8 *)IOP331_REG_ADDR(0x0000013C)
79#define IOP331_ATUIPR (volatile u8 *)IOP331_REG_ADDR(0x0000013D)
80#define IOP331_ATUMGNT (volatile u8 *)IOP331_REG_ADDR(0x0000013E)
81#define IOP331_ATUMLAT (volatile u8 *)IOP331_REG_ADDR(0x0000013F)
82#define IOP331_IALR0 (volatile u32 *)IOP331_REG_ADDR(0x00000140)
83#define IOP331_IATVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000144)
84#define IOP331_ERLR (volatile u32 *)IOP331_REG_ADDR(0x00000148)
85#define IOP331_ERTVR (volatile u32 *)IOP331_REG_ADDR(0x0000014C)
86#define IOP331_IALR1 (volatile u32 *)IOP331_REG_ADDR(0x00000150)
87#define IOP331_IALR2 (volatile u32 *)IOP331_REG_ADDR(0x00000154)
88#define IOP331_IATVR2 (volatile u32 *)IOP331_REG_ADDR(0x00000158)
89#define IOP331_OIOWTVR (volatile u32 *)IOP331_REG_ADDR(0x0000015C)
90#define IOP331_OMWTVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000160)
91#define IOP331_OUMWTVR0 (volatile u32 *)IOP331_REG_ADDR(0x00000164)
92#define IOP331_OMWTVR1 (volatile u32 *)IOP331_REG_ADDR(0x00000168)
93#define IOP331_OUMWTVR1 (volatile u32 *)IOP331_REG_ADDR(0x0000016C)
94/* Reserved 0x00000170 through 0x00000177*/
95#define IOP331_OUDWTVR (volatile u32 *)IOP331_REG_ADDR(0x00000178)
96/* Reserved 0x0000017C through 0x0000017F*/
97#define IOP331_ATUCR (volatile u32 *)IOP331_REG_ADDR(0x00000180)
98#define IOP331_PCSR (volatile u32 *)IOP331_REG_ADDR(0x00000184)
99#define IOP331_ATUISR (volatile u32 *)IOP331_REG_ADDR(0x00000188)
100#define IOP331_ATUIMR (volatile u32 *)IOP331_REG_ADDR(0x0000018C)
101#define IOP331_IABAR3 (volatile u32 *)IOP331_REG_ADDR(0x00000190)
102#define IOP331_IAUBAR3 (volatile u32 *)IOP331_REG_ADDR(0x00000194)
103#define IOP331_IALR3 (volatile u32 *)IOP331_REG_ADDR(0x00000198)
104#define IOP331_IATVR3 (volatile u32 *)IOP331_REG_ADDR(0x0000019C)
105/* Reserved 0x000001A0 through 0x000001A3*/
106#define IOP331_OCCAR (volatile u32 *)IOP331_REG_ADDR(0x000001A4)
107/* Reserved 0x000001A8 through 0x000001AB*/
108#define IOP331_OCCDR (volatile u32 *)IOP331_REG_ADDR(0x000001AC)
109/* Reserved 0x000001B0 through 0x000001BB*/
110#define IOP331_VPDCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001B8)
111#define IOP331_VPDNXTP (volatile u8 *)IOP331_REG_ADDR(0x000001B9)
112#define IOP331_VPDAR (volatile u16 *)IOP331_REG_ADDR(0x000001BA)
113#define IOP331_VPDDR (volatile u32 *)IOP331_REG_ADDR(0x000001BC)
114#define IOP331_PMCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001C0)
115#define IOP331_PMNEXT (volatile u8 *)IOP331_REG_ADDR(0x000001C1)
116#define IOP331_APMCR (volatile u16 *)IOP331_REG_ADDR(0x000001C2)
117#define IOP331_APMCSR (volatile u16 *)IOP331_REG_ADDR(0x000001C4)
118/* Reserved 0x000001C6 through 0x000001CF */
119#define IOP331_MSICAPID (volatile u8 *)IOP331_REG_ADDR(0x000001D0)
120#define IOP331_MSINXTP (volatile u8 *)IOP331_REG_ADDR(0x000001D1)
121#define IOP331_MSIMCR (volatile u16 *)IOP331_REG_ADDR(0x000001D2)
122#define IOP331_MSIMAR (volatile u32 *)IOP331_REG_ADDR(0x000001D4)
123#define IOP331_MSIMUAR (volatile u32 *)IOP331_REG_ADDR(0x000001D8)
124#define IOP331_MSIMDR (volatile u32 *)IOP331_REG_ADDR(0x000001DC)
125#define IOP331_PCIXCAPID (volatile u8 *)IOP331_REG_ADDR(0x000001E0)
126#define IOP331_PCIXNEXT (volatile u8 *)IOP331_REG_ADDR(0x000001E1)
127#define IOP331_PCIXCMD (volatile u16 *)IOP331_REG_ADDR(0x000001E2)
128#define IOP331_PCIXSR (volatile u32 *)IOP331_REG_ADDR(0x000001E4)
129#define IOP331_PCIIRSR (volatile u32 *)IOP331_REG_ADDR(0x000001EC)
130 36
131/* Messaging Unit 0x00000300 through 0x000003FF */ 37/* Messaging Unit 0x00000300 through 0x000003FF */
132 38
@@ -332,6 +238,8 @@
332 238
333/* Reserved 0x0000178c through 0x000019ff */ 239/* Reserved 0x0000178c through 0x000019ff */
334 240
241#include <asm/hardware/iop3xx.h>
242
335 243
336#ifndef __ASSEMBLY__ 244#ifndef __ASSEMBLY__
337extern void iop331_init_irq(void); 245extern void iop331_init_irq(void);
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 16:44:55 -0500