diff options
Diffstat (limited to 'include/acpi/actbl1.h')
-rw-r--r-- | include/acpi/actbl1.h | 52 |
1 files changed, 29 insertions, 23 deletions
diff --git a/include/acpi/actbl1.h b/include/acpi/actbl1.h index 33de5f4d2cc..93c175a4f44 100644 --- a/include/acpi/actbl1.h +++ b/include/acpi/actbl1.h | |||
@@ -52,8 +52,7 @@ | |||
52 | struct rsdt_descriptor_rev1 | 52 | struct rsdt_descriptor_rev1 |
53 | { | 53 | { |
54 | ACPI_TABLE_HEADER_DEF /* ACPI common table header */ | 54 | ACPI_TABLE_HEADER_DEF /* ACPI common table header */ |
55 | u32 table_offset_entry [1]; /* Array of pointers to other */ | 55 | u32 table_offset_entry[1]; /* Array of pointers to ACPI tables */ |
56 | /* ACPI tables */ | ||
57 | }; | 56 | }; |
58 | 57 | ||
59 | 58 | ||
@@ -62,14 +61,19 @@ struct rsdt_descriptor_rev1 | |||
62 | */ | 61 | */ |
63 | struct facs_descriptor_rev1 | 62 | struct facs_descriptor_rev1 |
64 | { | 63 | { |
65 | char signature[4]; /* ACPI Signature */ | 64 | char signature[4]; /* ASCII table signature */ |
66 | u32 length; /* Length of structure, in bytes */ | 65 | u32 length; /* Length of structure in bytes */ |
67 | u32 hardware_signature; /* Hardware configuration signature */ | 66 | u32 hardware_signature; /* Hardware configuration signature */ |
68 | u32 firmware_waking_vector; /* ACPI OS waking vector */ | 67 | u32 firmware_waking_vector; /* ACPI OS waking vector */ |
69 | u32 global_lock; /* Global Lock */ | 68 | u32 global_lock; /* Global Lock */ |
70 | u32 S4bios_f : 1; /* Indicates if S4BIOS support is present */ | 69 | |
71 | u32 reserved1 : 31; /* Must be 0 */ | 70 | /* Flags (32 bits) */ |
72 | u8 resverved3 [40]; /* Reserved - must be zero */ | 71 | |
72 | u8 S4bios_f : 1; /* 00: S4BIOS support is present */ | ||
73 | u8 : 7; /* 01-07: Reserved, must be zero */ | ||
74 | u8 reserved1[3]; /* 08-31: Reserved, must be zero */ | ||
75 | |||
76 | u8 reserved2[40]; /* Reserved, must be zero */ | ||
73 | }; | 77 | }; |
74 | 78 | ||
75 | 79 | ||
@@ -82,13 +86,13 @@ struct fadt_descriptor_rev1 | |||
82 | u32 firmware_ctrl; /* Physical address of FACS */ | 86 | u32 firmware_ctrl; /* Physical address of FACS */ |
83 | u32 dsdt; /* Physical address of DSDT */ | 87 | u32 dsdt; /* Physical address of DSDT */ |
84 | u8 model; /* System Interrupt Model */ | 88 | u8 model; /* System Interrupt Model */ |
85 | u8 reserved1; /* Reserved */ | 89 | u8 reserved1; /* Reserved, must be zero */ |
86 | u16 sci_int; /* System vector of SCI interrupt */ | 90 | u16 sci_int; /* System vector of SCI interrupt */ |
87 | u32 smi_cmd; /* Port address of SMI command port */ | 91 | u32 smi_cmd; /* Port address of SMI command port */ |
88 | u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ | 92 | u8 acpi_enable; /* Value to write to smi_cmd to enable ACPI */ |
89 | u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ | 93 | u8 acpi_disable; /* Value to write to smi_cmd to disable ACPI */ |
90 | u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ | 94 | u8 S4bios_req; /* Value to write to SMI CMD to enter S4BIOS state */ |
91 | u8 reserved2; /* Reserved - must be zero */ | 95 | u8 reserved2; /* Reserved, must be zero */ |
92 | u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ | 96 | u32 pm1a_evt_blk; /* Port address of Power Mgt 1a acpi_event Reg Blk */ |
93 | u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ | 97 | u32 pm1b_evt_blk; /* Port address of Power Mgt 1b acpi_event Reg Blk */ |
94 | u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ | 98 | u32 pm1a_cnt_blk; /* Port address of Power Mgt 1a Control Reg Blk */ |
@@ -104,7 +108,7 @@ struct fadt_descriptor_rev1 | |||
104 | u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ | 108 | u8 gpe0_blk_len; /* Byte Length of ports at gpe0_blk */ |
105 | u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ | 109 | u8 gpe1_blk_len; /* Byte Length of ports at gpe1_blk */ |
106 | u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ | 110 | u8 gpe1_base; /* Offset in gpe model where gpe1 events start */ |
107 | u8 reserved3; /* Reserved */ | 111 | u8 reserved3; /* Reserved, must be zero */ |
108 | u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ | 112 | u16 plvl2_lat; /* Worst case HW latency to enter/exit C2 state */ |
109 | u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ | 113 | u16 plvl3_lat; /* Worst case HW latency to enter/exit C3 state */ |
110 | u16 flush_size; /* Size of area read to flush caches */ | 114 | u16 flush_size; /* Size of area read to flush caches */ |
@@ -114,19 +118,21 @@ struct fadt_descriptor_rev1 | |||
114 | u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ | 118 | u8 day_alrm; /* Index to day-of-month alarm in RTC CMOS RAM */ |
115 | u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ | 119 | u8 mon_alrm; /* Index to month-of-year alarm in RTC CMOS RAM */ |
116 | u8 century; /* Index to century in RTC CMOS RAM */ | 120 | u8 century; /* Index to century in RTC CMOS RAM */ |
117 | u8 reserved4; /* Reserved */ | 121 | u8 reserved4[3]; /* Reserved, must be zero */ |
118 | u8 reserved4a; /* Reserved */ | 122 | |
119 | u8 reserved4b; /* Reserved */ | 123 | /* Flags (32 bits) */ |
120 | u32 wb_invd : 1; /* The wbinvd instruction works properly */ | 124 | |
121 | u32 wb_invd_flush : 1; /* The wbinvd flushes but does not invalidate */ | 125 | u8 wb_invd : 1; /* 00: The wbinvd instruction works properly */ |
122 | u32 proc_c1 : 1; /* All processors support C1 state */ | 126 | u8 wb_invd_flush : 1; /* 01: The wbinvd flushes but does not invalidate */ |
123 | u32 plvl2_up : 1; /* C2 state works on MP system */ | 127 | u8 proc_c1 : 1; /* 02: All processors support C1 state */ |
124 | u32 pwr_button : 1; /* Power button is handled as a generic feature */ | 128 | u8 plvl2_up : 1; /* 03: C2 state works on MP system */ |
125 | u32 sleep_button : 1; /* Sleep button is handled as a generic feature, or not present */ | 129 | u8 pwr_button : 1; /* 04: Power button is handled as a generic feature */ |
126 | u32 fixed_rTC : 1; /* RTC wakeup stat not in fixed register space */ | 130 | u8 sleep_button : 1; /* 05: Sleep button is handled as a generic feature, or not present */ |
127 | u32 rtcs4 : 1; /* RTC wakeup stat not possible from S4 */ | 131 | u8 fixed_rTC : 1; /* 06: RTC wakeup stat not in fixed register space */ |
128 | u32 tmr_val_ext : 1; /* The tmr_val width is 32 bits (0 = 24 bits) */ | 132 | u8 rtcs4 : 1; /* 07: RTC wakeup stat not possible from S4 */ |
129 | u32 reserved5 : 23; /* Reserved - must be zero */ | 133 | u8 tmr_val_ext : 1; /* 08: tmr_val width is 32 bits (0 = 24 bits) */ |
134 | u8 : 7; /* 09-15: Reserved, must be zero */ | ||
135 | u8 reserved5[2]; /* 16-31: Reserved, must be zero */ | ||
130 | }; | 136 | }; |
131 | 137 | ||
132 | #pragma pack() | 138 | #pragma pack() |