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-rw-r--r--drivers/net/smc91x.h62
-rw-r--r--drivers/tty/serial/Kconfig23
-rw-r--r--drivers/tty/serial/Makefile1
-rw-r--r--drivers/tty/serial/serial_lh7a40x.c682
-rw-r--r--drivers/usb/Kconfig1
-rw-r--r--drivers/usb/gadget/Kconfig12
-rw-r--r--drivers/usb/gadget/Makefile1
-rw-r--r--drivers/usb/gadget/gadget_chips.h8
-rw-r--r--drivers/usb/gadget/lh7a40x_udc.c2152
-rw-r--r--drivers/usb/gadget/lh7a40x_udc.h259
-rw-r--r--drivers/usb/host/ohci-hcd.c5
-rw-r--r--drivers/usb/host/ohci-lh7a404.c252
-rw-r--r--drivers/usb/host/ohci.h10
-rw-r--r--drivers/video/Kconfig63
14 files changed, 0 insertions, 3531 deletions
diff --git a/drivers/net/smc91x.h b/drivers/net/smc91x.h
index ee747919a76..68d48ab6eac 100644
--- a/drivers/net/smc91x.h
+++ b/drivers/net/smc91x.h
@@ -206,68 +206,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
206#define RPC_LSA_DEFAULT RPC_LED_TX_RX 206#define RPC_LSA_DEFAULT RPC_LED_TX_RX
207#define RPC_LSB_DEFAULT RPC_LED_100_10 207#define RPC_LSB_DEFAULT RPC_LED_100_10
208 208
209#elif defined(CONFIG_MACH_LPD79520) || \
210 defined(CONFIG_MACH_LPD7A400) || \
211 defined(CONFIG_MACH_LPD7A404)
212
213/* The LPD7X_IOBARRIER is necessary to overcome a mismatch between the
214 * way that the CPU handles chip selects and the way that the SMC chip
215 * expects the chip select to operate. Refer to
216 * Documentation/arm/Sharp-LH/IOBarrier for details. The read from
217 * IOBARRIER is a byte, in order that we read the least-common
218 * denominator. It would be wasteful to read 32 bits from an 8-bit
219 * accessible region.
220 *
221 * There is no explicit protection against interrupts intervening
222 * between the writew and the IOBARRIER. In SMC ISR there is a
223 * preamble that performs an IOBARRIER in the extremely unlikely event
224 * that the driver interrupts itself between a writew to the chip an
225 * the IOBARRIER that follows *and* the cache is large enough that the
226 * first off-chip access while handing the interrupt is to the SMC
227 * chip. Other devices in the same address space as the SMC chip must
228 * be aware of the potential for trouble and perform a similar
229 * IOBARRIER on entry to their ISR.
230 */
231
232#include <mach/constants.h> /* IOBARRIER_VIRT */
233
234#define SMC_CAN_USE_8BIT 0
235#define SMC_CAN_USE_16BIT 1
236#define SMC_CAN_USE_32BIT 0
237#define SMC_NOWAIT 0
238#define LPD7X_IOBARRIER readb (IOBARRIER_VIRT)
239
240#define SMC_inw(a,r)\
241 ({ unsigned short v = readw ((void*) ((a) + (r))); LPD7X_IOBARRIER; v; })
242#define SMC_outw(v,a,r) ({ writew ((v), (a) + (r)); LPD7X_IOBARRIER; })
243
244#define SMC_insw LPD7_SMC_insw
245static inline void LPD7_SMC_insw (unsigned char* a, int r,
246 unsigned char* p, int l)
247{
248 unsigned short* ps = (unsigned short*) p;
249 while (l-- > 0) {
250 *ps++ = readw (a + r);
251 LPD7X_IOBARRIER;
252 }
253}
254
255#define SMC_outsw LPD7_SMC_outsw
256static inline void LPD7_SMC_outsw (unsigned char* a, int r,
257 unsigned char* p, int l)
258{
259 unsigned short* ps = (unsigned short*) p;
260 while (l-- > 0) {
261 writew (*ps++, a + r);
262 LPD7X_IOBARRIER;
263 }
264}
265
266#define SMC_INTERRUPT_PREAMBLE LPD7X_IOBARRIER
267
268#define RPC_LSA_DEFAULT RPC_LED_TX_RX
269#define RPC_LSB_DEFAULT RPC_LED_100_10
270
271#elif defined(CONFIG_ARCH_VERSATILE) 209#elif defined(CONFIG_ARCH_VERSATILE)
272 210
273#define SMC_CAN_USE_8BIT 1 211#define SMC_CAN_USE_8BIT 1
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index d9ccbf82509..e461be164f6 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -1110,29 +1110,6 @@ config SERIAL_PMACZILOG_CONSOLE
1110 on your (Power)Mac as the console, you can do so by answering 1110 on your (Power)Mac as the console, you can do so by answering
1111 Y to this option. 1111 Y to this option.
1112 1112
1113config SERIAL_LH7A40X
1114 tristate "Sharp LH7A40X embedded UART support"
1115 depends on ARM && ARCH_LH7A40X
1116 select SERIAL_CORE
1117 help
1118 This enables support for the three on-board UARTs of the
1119 Sharp LH7A40X series CPUs. Choose Y or M.
1120
1121config SERIAL_LH7A40X_CONSOLE
1122 bool "Support for console on Sharp LH7A40X serial port"
1123 depends on SERIAL_LH7A40X=y
1124 select SERIAL_CORE_CONSOLE
1125 help
1126 Say Y here if you wish to use one of the serial ports as the
1127 system console--the system console is the device which
1128 receives all kernel messages and warnings and which allows
1129 logins in single user mode.
1130
1131 Even if you say Y here, the currently visible framebuffer console
1132 (/dev/tty0) will still be used as the default system console, but
1133 you can alter that using a kernel command line, for example
1134 "console=ttyAM1".
1135
1136config SERIAL_CPM 1113config SERIAL_CPM
1137 tristate "CPM SCC/SMC serial port support" 1114 tristate "CPM SCC/SMC serial port support"
1138 depends on CPM2 || 8xx 1115 depends on CPM2 || 8xx
diff --git a/drivers/tty/serial/Makefile b/drivers/tty/serial/Makefile
index d94dc005c8a..31e868cb49b 100644
--- a/drivers/tty/serial/Makefile
+++ b/drivers/tty/serial/Makefile
@@ -54,7 +54,6 @@ obj-$(CONFIG_SERIAL_68328) += 68328serial.o
54obj-$(CONFIG_SERIAL_68360) += 68360serial.o 54obj-$(CONFIG_SERIAL_68360) += 68360serial.o
55obj-$(CONFIG_SERIAL_MCF) += mcf.o 55obj-$(CONFIG_SERIAL_MCF) += mcf.o
56obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o 56obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o
57obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
58obj-$(CONFIG_SERIAL_DZ) += dz.o 57obj-$(CONFIG_SERIAL_DZ) += dz.o
59obj-$(CONFIG_SERIAL_ZS) += zs.o 58obj-$(CONFIG_SERIAL_ZS) += zs.o
60obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o 59obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
diff --git a/drivers/tty/serial/serial_lh7a40x.c b/drivers/tty/serial/serial_lh7a40x.c
deleted file mode 100644
index ea744707c4d..00000000000
--- a/drivers/tty/serial/serial_lh7a40x.c
+++ /dev/null
@@ -1,682 +0,0 @@
1/* drivers/serial/serial_lh7a40x.c
2 *
3 * Copyright (C) 2004 Coastal Environmental Systems
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * version 2 as published by the Free Software Foundation.
8 *
9 */
10
11/* Driver for Sharp LH7A40X embedded serial ports
12 *
13 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
14 * Based on drivers/serial/amba.c, by Deep Blue Solutions Ltd.
15 *
16 * ---
17 *
18 * This driver supports the embedded UARTs of the Sharp LH7A40X series
19 * CPUs. While similar to the 16550 and other UART chips, there is
20 * nothing close to register compatibility. Moreover, some of the
21 * modem control lines are not available, either in the chip or they
22 * are lacking in the board-level implementation.
23 *
24 * - Use of SIRDIS
25 * For simplicity, we disable the IR functions of any UART whenever
26 * we enable it.
27 *
28 */
29
30
31#if defined(CONFIG_SERIAL_LH7A40X_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32#define SUPPORT_SYSRQ
33#endif
34
35#include <linux/module.h>
36#include <linux/ioport.h>
37#include <linux/init.h>
38#include <linux/console.h>
39#include <linux/sysrq.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/serial.h>
44#include <linux/io.h>
45
46#include <asm/irq.h>
47#include <mach/hardware.h>
48
49#define DEV_MAJOR 204
50#define DEV_MINOR 16
51#define DEV_NR 3
52
53#define ISR_LOOP_LIMIT 256
54
55#define UR(p,o) _UR ((p)->membase, o)
56#define _UR(b,o) (*((volatile unsigned int*)(((unsigned char*) b) + (o))))
57#define BIT_CLR(p,o,m) UR(p,o) = UR(p,o) & (~(unsigned int)m)
58#define BIT_SET(p,o,m) UR(p,o) = UR(p,o) | ( (unsigned int)m)
59
60#define UART_REG_SIZE 32
61
62#define UART_R_DATA (0x00)
63#define UART_R_FCON (0x04)
64#define UART_R_BRCON (0x08)
65#define UART_R_CON (0x0c)
66#define UART_R_STATUS (0x10)
67#define UART_R_RAWISR (0x14)
68#define UART_R_INTEN (0x18)
69#define UART_R_ISR (0x1c)
70
71#define UARTEN (0x01) /* UART enable */
72#define SIRDIS (0x02) /* Serial IR disable (UART1 only) */
73
74#define RxEmpty (0x10)
75#define TxEmpty (0x80)
76#define TxFull (0x20)
77#define nRxRdy RxEmpty
78#define nTxRdy TxFull
79#define TxBusy (0x08)
80
81#define RxBreak (0x0800)
82#define RxOverrunError (0x0400)
83#define RxParityError (0x0200)
84#define RxFramingError (0x0100)
85#define RxError (RxBreak | RxOverrunError | RxParityError | RxFramingError)
86
87#define DCD (0x04)
88#define DSR (0x02)
89#define CTS (0x01)
90
91#define RxInt (0x01)
92#define TxInt (0x02)
93#define ModemInt (0x04)
94#define RxTimeoutInt (0x08)
95
96#define MSEOI (0x10)
97
98#define WLEN_8 (0x60)
99#define WLEN_7 (0x40)
100#define WLEN_6 (0x20)
101#define WLEN_5 (0x00)
102#define WLEN (0x60) /* Mask for all word-length bits */
103#define STP2 (0x08)
104#define PEN (0x02) /* Parity Enable */
105#define EPS (0x04) /* Even Parity Set */
106#define FEN (0x10) /* FIFO Enable */
107#define BRK (0x01) /* Send Break */
108
109
110struct uart_port_lh7a40x {
111 struct uart_port port;
112 unsigned int statusPrev; /* Most recently read modem status */
113};
114
115static void lh7a40xuart_stop_tx (struct uart_port* port)
116{
117 BIT_CLR (port, UART_R_INTEN, TxInt);
118}
119
120static void lh7a40xuart_start_tx (struct uart_port* port)
121{
122 BIT_SET (port, UART_R_INTEN, TxInt);
123
124 /* *** FIXME: do I need to check for startup of the
125 transmitter? The old driver did, but AMBA
126 doesn't . */
127}
128
129static void lh7a40xuart_stop_rx (struct uart_port* port)
130{
131 BIT_SET (port, UART_R_INTEN, RxTimeoutInt | RxInt);
132}
133
134static void lh7a40xuart_enable_ms (struct uart_port* port)
135{
136 BIT_SET (port, UART_R_INTEN, ModemInt);
137}
138
139static void lh7a40xuart_rx_chars (struct uart_port* port)
140{
141 struct tty_struct* tty = port->state->port.tty;
142 int cbRxMax = 256; /* (Gross) limit on receive */
143 unsigned int data; /* Received data and status */
144 unsigned int flag;
145
146 while (!(UR (port, UART_R_STATUS) & nRxRdy) && --cbRxMax) {
147 data = UR (port, UART_R_DATA);
148 flag = TTY_NORMAL;
149 ++port->icount.rx;
150
151 if (unlikely(data & RxError)) {
152 if (data & RxBreak) {
153 data &= ~(RxFramingError | RxParityError);
154 ++port->icount.brk;
155 if (uart_handle_break (port))
156 continue;
157 }
158 else if (data & RxParityError)
159 ++port->icount.parity;
160 else if (data & RxFramingError)
161 ++port->icount.frame;
162 if (data & RxOverrunError)
163 ++port->icount.overrun;
164
165 /* Mask by termios, leave Rx'd byte */
166 data &= port->read_status_mask | 0xff;
167
168 if (data & RxBreak)
169 flag = TTY_BREAK;
170 else if (data & RxParityError)
171 flag = TTY_PARITY;
172 else if (data & RxFramingError)
173 flag = TTY_FRAME;
174 }
175
176 if (uart_handle_sysrq_char (port, (unsigned char) data))
177 continue;
178
179 uart_insert_char(port, data, RxOverrunError, data, flag);
180 }
181 tty_flip_buffer_push (tty);
182 return;
183}
184
185static void lh7a40xuart_tx_chars (struct uart_port* port)
186{
187 struct circ_buf* xmit = &port->state->xmit;
188 int cbTxMax = port->fifosize;
189
190 if (port->x_char) {
191 UR (port, UART_R_DATA) = port->x_char;
192 ++port->icount.tx;
193 port->x_char = 0;
194 return;
195 }
196 if (uart_circ_empty (xmit) || uart_tx_stopped (port)) {
197 lh7a40xuart_stop_tx (port);
198 return;
199 }
200
201 /* Unlike the AMBA UART, the lh7a40x UART does not guarantee
202 that at least half of the FIFO is empty. Instead, we check
203 status for every character. Using the AMBA method causes
204 the transmitter to drop characters. */
205
206 do {
207 UR (port, UART_R_DATA) = xmit->buf[xmit->tail];
208 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
209 ++port->icount.tx;
210 if (uart_circ_empty(xmit))
211 break;
212 } while (!(UR (port, UART_R_STATUS) & nTxRdy)
213 && cbTxMax--);
214
215 if (uart_circ_chars_pending (xmit) < WAKEUP_CHARS)
216 uart_write_wakeup (port);
217
218 if (uart_circ_empty (xmit))
219 lh7a40xuart_stop_tx (port);
220}
221
222static void lh7a40xuart_modem_status (struct uart_port* port)
223{
224 unsigned int status = UR (port, UART_R_STATUS);
225 unsigned int delta
226 = status ^ ((struct uart_port_lh7a40x*) port)->statusPrev;
227
228 BIT_SET (port, UART_R_RAWISR, MSEOI); /* Clear modem status intr */
229
230 if (!delta) /* Only happens if we missed 2 transitions */
231 return;
232
233 ((struct uart_port_lh7a40x*) port)->statusPrev = status;
234
235 if (delta & DCD)
236 uart_handle_dcd_change (port, status & DCD);
237
238 if (delta & DSR)
239 ++port->icount.dsr;
240
241 if (delta & CTS)
242 uart_handle_cts_change (port, status & CTS);
243
244 wake_up_interruptible (&port->state->port.delta_msr_wait);
245}
246
247static irqreturn_t lh7a40xuart_int (int irq, void* dev_id)
248{
249 struct uart_port* port = dev_id;
250 unsigned int cLoopLimit = ISR_LOOP_LIMIT;
251 unsigned int isr = UR (port, UART_R_ISR);
252
253
254 do {
255 if (isr & (RxInt | RxTimeoutInt))
256 lh7a40xuart_rx_chars(port);
257 if (isr & ModemInt)
258 lh7a40xuart_modem_status (port);
259 if (isr & TxInt)
260 lh7a40xuart_tx_chars (port);
261
262 if (--cLoopLimit == 0)
263 break;
264
265 isr = UR (port, UART_R_ISR);
266 } while (isr & (RxInt | TxInt | RxTimeoutInt));
267
268 return IRQ_HANDLED;
269}
270
271static unsigned int lh7a40xuart_tx_empty (struct uart_port* port)
272{
273 return (UR (port, UART_R_STATUS) & TxEmpty) ? TIOCSER_TEMT : 0;
274}
275
276static unsigned int lh7a40xuart_get_mctrl (struct uart_port* port)
277{
278 unsigned int result = 0;
279 unsigned int status = UR (port, UART_R_STATUS);
280
281 if (status & DCD)
282 result |= TIOCM_CAR;
283 if (status & DSR)
284 result |= TIOCM_DSR;
285 if (status & CTS)
286 result |= TIOCM_CTS;
287
288 return result;
289}
290
291static void lh7a40xuart_set_mctrl (struct uart_port* port, unsigned int mctrl)
292{
293 /* None of the ports supports DTR. UART1 supports RTS through GPIO. */
294 /* Note, kernel appears to be setting DTR and RTS on console. */
295
296 /* *** FIXME: this deserves more work. There's some work in
297 tracing all of the IO pins. */
298#if 0
299 if( port->mapbase == UART1_PHYS) {
300 gpioRegs_t *gpio = (gpioRegs_t *)IO_ADDRESS(GPIO_PHYS);
301
302 if (mctrl & TIOCM_RTS)
303 gpio->pbdr &= ~GPIOB_UART1_RTS;
304 else
305 gpio->pbdr |= GPIOB_UART1_RTS;
306 }
307#endif
308}
309
310static void lh7a40xuart_break_ctl (struct uart_port* port, int break_state)
311{
312 unsigned long flags;
313
314 spin_lock_irqsave(&port->lock, flags);
315 if (break_state == -1)
316 BIT_SET (port, UART_R_FCON, BRK); /* Assert break */
317 else
318 BIT_CLR (port, UART_R_FCON, BRK); /* Deassert break */
319 spin_unlock_irqrestore(&port->lock, flags);
320}
321
322static int lh7a40xuart_startup (struct uart_port* port)
323{
324 int retval;
325
326 retval = request_irq (port->irq, lh7a40xuart_int, 0,
327 "serial_lh7a40x", port);
328 if (retval)
329 return retval;
330
331 /* Initial modem control-line settings */
332 ((struct uart_port_lh7a40x*) port)->statusPrev
333 = UR (port, UART_R_STATUS);
334
335 /* There is presently no configuration option to enable IR.
336 Thus, we always disable it. */
337
338 BIT_SET (port, UART_R_CON, UARTEN | SIRDIS);
339 BIT_SET (port, UART_R_INTEN, RxTimeoutInt | RxInt);
340
341 return 0;
342}
343
344static void lh7a40xuart_shutdown (struct uart_port* port)
345{
346 free_irq (port->irq, port);
347 BIT_CLR (port, UART_R_FCON, BRK | FEN);
348 BIT_CLR (port, UART_R_CON, UARTEN);
349}
350
351static void lh7a40xuart_set_termios (struct uart_port* port,
352 struct ktermios* termios,
353 struct ktermios* old)
354{
355 unsigned int con;
356 unsigned int inten;
357 unsigned int fcon;
358 unsigned long flags;
359 unsigned int baud;
360 unsigned int quot;
361
362 baud = uart_get_baud_rate (port, termios, old, 8, port->uartclk/16);
363 quot = uart_get_divisor (port, baud); /* -1 performed elsewhere */
364
365 switch (termios->c_cflag & CSIZE) {
366 case CS5:
367 fcon = WLEN_5;
368 break;
369 case CS6:
370 fcon = WLEN_6;
371 break;
372 case CS7:
373 fcon = WLEN_7;
374 break;
375 case CS8:
376 default:
377 fcon = WLEN_8;
378 break;
379 }
380 if (termios->c_cflag & CSTOPB)
381 fcon |= STP2;
382 if (termios->c_cflag & PARENB) {
383 fcon |= PEN;
384 if (!(termios->c_cflag & PARODD))
385 fcon |= EPS;
386 }
387 if (port->fifosize > 1)
388 fcon |= FEN;
389
390 spin_lock_irqsave (&port->lock, flags);
391
392 uart_update_timeout (port, termios->c_cflag, baud);
393
394 port->read_status_mask = RxOverrunError;
395 if (termios->c_iflag & INPCK)
396 port->read_status_mask |= RxFramingError | RxParityError;
397 if (termios->c_iflag & (BRKINT | PARMRK))
398 port->read_status_mask |= RxBreak;
399
400 /* Figure mask for status we ignore */
401 port->ignore_status_mask = 0;
402 if (termios->c_iflag & IGNPAR)
403 port->ignore_status_mask |= RxFramingError | RxParityError;
404 if (termios->c_iflag & IGNBRK) {
405 port->ignore_status_mask |= RxBreak;
406 /* Ignore overrun when ignorning parity */
407 /* *** FIXME: is this in the right place? */
408 if (termios->c_iflag & IGNPAR)
409 port->ignore_status_mask |= RxOverrunError;
410 }
411
412 /* Ignore all receive errors when receive disabled */
413 if ((termios->c_cflag & CREAD) == 0)
414 port->ignore_status_mask |= RxError;
415
416 con = UR (port, UART_R_CON);
417 inten = (UR (port, UART_R_INTEN) & ~ModemInt);
418
419 if (UART_ENABLE_MS (port, termios->c_cflag))
420 inten |= ModemInt;
421
422 BIT_CLR (port, UART_R_CON, UARTEN); /* Disable UART */
423 UR (port, UART_R_INTEN) = 0; /* Disable interrupts */
424 UR (port, UART_R_BRCON) = quot - 1; /* Set baud rate divisor */
425 UR (port, UART_R_FCON) = fcon; /* Set FIFO and frame ctrl */
426 UR (port, UART_R_INTEN) = inten; /* Enable interrupts */
427 UR (port, UART_R_CON) = con; /* Restore UART mode */
428
429 spin_unlock_irqrestore(&port->lock, flags);
430}
431
432static const char* lh7a40xuart_type (struct uart_port* port)
433{
434 return port->type == PORT_LH7A40X ? "LH7A40X" : NULL;
435}
436
437static void lh7a40xuart_release_port (struct uart_port* port)
438{
439 release_mem_region (port->mapbase, UART_REG_SIZE);
440}
441
442static int lh7a40xuart_request_port (struct uart_port* port)
443{
444 return request_mem_region (port->mapbase, UART_REG_SIZE,
445 "serial_lh7a40x") != NULL
446 ? 0 : -EBUSY;
447}
448
449static void lh7a40xuart_config_port (struct uart_port* port, int flags)
450{
451 if (flags & UART_CONFIG_TYPE) {
452 port->type = PORT_LH7A40X;
453 lh7a40xuart_request_port (port);
454 }
455}
456
457static int lh7a40xuart_verify_port (struct uart_port* port,
458 struct serial_struct* ser)
459{
460 int ret = 0;
461
462 if (ser->type != PORT_UNKNOWN && ser->type != PORT_LH7A40X)
463 ret = -EINVAL;
464 if (ser->irq < 0 || ser->irq >= nr_irqs)
465 ret = -EINVAL;
466 if (ser->baud_base < 9600) /* *** FIXME: is this true? */
467 ret = -EINVAL;
468 return ret;
469}
470
471static struct uart_ops lh7a40x_uart_ops = {
472 .tx_empty = lh7a40xuart_tx_empty,
473 .set_mctrl = lh7a40xuart_set_mctrl,
474 .get_mctrl = lh7a40xuart_get_mctrl,
475 .stop_tx = lh7a40xuart_stop_tx,
476 .start_tx = lh7a40xuart_start_tx,
477 .stop_rx = lh7a40xuart_stop_rx,
478 .enable_ms = lh7a40xuart_enable_ms,
479 .break_ctl = lh7a40xuart_break_ctl,
480 .startup = lh7a40xuart_startup,
481 .shutdown = lh7a40xuart_shutdown,
482 .set_termios = lh7a40xuart_set_termios,
483 .type = lh7a40xuart_type,
484 .release_port = lh7a40xuart_release_port,
485 .request_port = lh7a40xuart_request_port,
486 .config_port = lh7a40xuart_config_port,
487 .verify_port = lh7a40xuart_verify_port,
488};
489
490static struct uart_port_lh7a40x lh7a40x_ports[DEV_NR] = {
491 {
492 .port = {
493 .membase = (void*) io_p2v (UART1_PHYS),
494 .mapbase = UART1_PHYS,
495 .iotype = UPIO_MEM,
496 .irq = IRQ_UART1INTR,
497 .uartclk = 14745600/2,
498 .fifosize = 16,
499 .ops = &lh7a40x_uart_ops,
500 .flags = UPF_BOOT_AUTOCONF,
501 .line = 0,
502 },
503 },
504 {
505 .port = {
506 .membase = (void*) io_p2v (UART2_PHYS),
507 .mapbase = UART2_PHYS,
508 .iotype = UPIO_MEM,
509 .irq = IRQ_UART2INTR,
510 .uartclk = 14745600/2,
511 .fifosize = 16,
512 .ops = &lh7a40x_uart_ops,
513 .flags = UPF_BOOT_AUTOCONF,
514 .line = 1,
515 },
516 },
517 {
518 .port = {
519 .membase = (void*) io_p2v (UART3_PHYS),
520 .mapbase = UART3_PHYS,
521 .iotype = UPIO_MEM,
522 .irq = IRQ_UART3INTR,
523 .uartclk = 14745600/2,
524 .fifosize = 16,
525 .ops = &lh7a40x_uart_ops,
526 .flags = UPF_BOOT_AUTOCONF,
527 .line = 2,
528 },
529 },
530};
531
532#ifndef CONFIG_SERIAL_LH7A40X_CONSOLE
533# define LH7A40X_CONSOLE NULL
534#else
535# define LH7A40X_CONSOLE &lh7a40x_console
536
537static void lh7a40xuart_console_putchar(struct uart_port *port, int ch)
538{
539 while (UR(port, UART_R_STATUS) & nTxRdy)
540 ;
541 UR(port, UART_R_DATA) = ch;
542}
543
544static void lh7a40xuart_console_write (struct console* co,
545 const char* s,
546 unsigned int count)
547{
548 struct uart_port* port = &lh7a40x_ports[co->index].port;
549 unsigned int con = UR (port, UART_R_CON);
550 unsigned int inten = UR (port, UART_R_INTEN);
551
552
553 UR (port, UART_R_INTEN) = 0; /* Disable all interrupts */
554 BIT_SET (port, UART_R_CON, UARTEN | SIRDIS); /* Enable UART */
555
556 uart_console_write(port, s, count, lh7a40xuart_console_putchar);
557
558 /* Wait until all characters are sent */
559 while (UR (port, UART_R_STATUS) & TxBusy)
560 ;
561
562 /* Restore control and interrupt mask */
563 UR (port, UART_R_CON) = con;
564 UR (port, UART_R_INTEN) = inten;
565}
566
567static void __init lh7a40xuart_console_get_options (struct uart_port* port,
568 int* baud,
569 int* parity,
570 int* bits)
571{
572 if (UR (port, UART_R_CON) & UARTEN) {
573 unsigned int fcon = UR (port, UART_R_FCON);
574 unsigned int quot = UR (port, UART_R_BRCON) + 1;
575
576 switch (fcon & (PEN | EPS)) {
577 default: *parity = 'n'; break;
578 case PEN: *parity = 'o'; break;
579 case PEN | EPS: *parity = 'e'; break;
580 }
581
582 switch (fcon & WLEN) {
583 default:
584 case WLEN_8: *bits = 8; break;
585 case WLEN_7: *bits = 7; break;
586 case WLEN_6: *bits = 6; break;
587 case WLEN_5: *bits = 5; break;
588 }
589
590 *baud = port->uartclk/(16*quot);
591 }
592}
593
594static int __init lh7a40xuart_console_setup (struct console* co, char* options)
595{
596 struct uart_port* port;
597 int baud = 38400;
598 int bits = 8;
599 int parity = 'n';
600 int flow = 'n';
601
602 if (co->index >= DEV_NR) /* Bounds check on device number */
603 co->index = 0;
604 port = &lh7a40x_ports[co->index].port;
605
606 if (options)
607 uart_parse_options (options, &baud, &parity, &bits, &flow);
608 else
609 lh7a40xuart_console_get_options (port, &baud, &parity, &bits);
610
611 return uart_set_options (port, co, baud, parity, bits, flow);
612}
613
614static struct uart_driver lh7a40x_reg;
615static struct console lh7a40x_console = {
616 .name = "ttyAM",
617 .write = lh7a40xuart_console_write,
618 .device = uart_console_device,
619 .setup = lh7a40xuart_console_setup,
620 .flags = CON_PRINTBUFFER,
621 .index = -1,
622 .data = &lh7a40x_reg,
623};
624
625static int __init lh7a40xuart_console_init(void)
626{
627 register_console (&lh7a40x_console);
628 return 0;
629}
630
631console_initcall (lh7a40xuart_console_init);
632
633#endif
634
635static struct uart_driver lh7a40x_reg = {
636 .owner = THIS_MODULE,
637 .driver_name = "ttyAM",
638 .dev_name = "ttyAM",
639 .major = DEV_MAJOR,
640 .minor = DEV_MINOR,
641 .nr = DEV_NR,
642 .cons = LH7A40X_CONSOLE,
643};
644
645static int __init lh7a40xuart_init(void)
646{
647 int ret;
648
649 printk (KERN_INFO "serial: LH7A40X serial driver\n");
650
651 ret = uart_register_driver (&lh7a40x_reg);
652
653 if (ret == 0) {
654 int i;
655
656 for (i = 0; i < DEV_NR; i++) {
657 /* UART3, when used, requires GPIO pin reallocation */
658 if (lh7a40x_ports[i].port.mapbase == UART3_PHYS)
659 GPIO_PINMUX |= 1<<3;
660 uart_add_one_port (&lh7a40x_reg,
661 &lh7a40x_ports[i].port);
662 }
663 }
664 return ret;
665}
666
667static void __exit lh7a40xuart_exit(void)
668{
669 int i;
670
671 for (i = 0; i < DEV_NR; i++)
672 uart_remove_one_port (&lh7a40x_reg, &lh7a40x_ports[i].port);
673
674 uart_unregister_driver (&lh7a40x_reg);
675}
676
677module_init (lh7a40xuart_init);
678module_exit (lh7a40xuart_exit);
679
680MODULE_AUTHOR ("Marc Singer");
681MODULE_DESCRIPTION ("Sharp LH7A40X serial port driver");
682MODULE_LICENSE ("GPL");
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index fceea5e4e02..41b6e51188e 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -31,7 +31,6 @@ config USB_ARCH_HAS_OHCI
31 # ARM: 31 # ARM:
32 default y if SA1111 32 default y if SA1111
33 default y if ARCH_OMAP 33 default y if ARCH_OMAP
34 default y if ARCH_LH7A404
35 default y if ARCH_S3C2410 34 default y if ARCH_S3C2410
36 default y if PXA27x 35 default y if PXA27x
37 default y if PXA3xx 36 default y if PXA3xx
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index bfde50e20b3..bc5123cf41c 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -188,18 +188,6 @@ config USB_FUSB300
188 default USB_GADGET 188 default USB_GADGET
189 select USB_GADGET_SELECTED 189 select USB_GADGET_SELECTED
190 190
191config USB_GADGET_LH7A40X
192 boolean "LH7A40X"
193 depends on ARCH_LH7A40X
194 help
195 This driver provides USB Device Controller driver for LH7A40x
196
197config USB_LH7A40X
198 tristate
199 depends on USB_GADGET_LH7A40X
200 default USB_GADGET
201 select USB_GADGET_SELECTED
202
203config USB_GADGET_OMAP 191config USB_GADGET_OMAP
204 boolean "OMAP USB Device Controller" 192 boolean "OMAP USB Device Controller"
205 depends on ARCH_OMAP 193 depends on ARCH_OMAP
diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile
index 305286e181d..1ea15ee74fd 100644
--- a/drivers/usb/gadget/Makefile
+++ b/drivers/usb/gadget/Makefile
@@ -11,7 +11,6 @@ obj-$(CONFIG_USB_PXA27X) += pxa27x_udc.o
11obj-$(CONFIG_USB_IMX) += imx_udc.o 11obj-$(CONFIG_USB_IMX) += imx_udc.o
12obj-$(CONFIG_USB_GOKU) += goku_udc.o 12obj-$(CONFIG_USB_GOKU) += goku_udc.o
13obj-$(CONFIG_USB_OMAP) += omap_udc.o 13obj-$(CONFIG_USB_OMAP) += omap_udc.o
14obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o
15obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o 14obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o
16obj-$(CONFIG_USB_AT91) += at91_udc.o 15obj-$(CONFIG_USB_AT91) += at91_udc.o
17obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o 16obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o
diff --git a/drivers/usb/gadget/gadget_chips.h b/drivers/usb/gadget/gadget_chips.h
index 5c2720d64ff..e896f6359df 100644
--- a/drivers/usb/gadget/gadget_chips.h
+++ b/drivers/usb/gadget/gadget_chips.h
@@ -45,12 +45,6 @@
45#define gadget_is_goku(g) 0 45#define gadget_is_goku(g) 0
46#endif 46#endif
47 47
48#ifdef CONFIG_USB_GADGET_LH7A40X
49#define gadget_is_lh7a40x(g) !strcmp("lh7a40x_udc", (g)->name)
50#else
51#define gadget_is_lh7a40x(g) 0
52#endif
53
54#ifdef CONFIG_USB_GADGET_OMAP 48#ifdef CONFIG_USB_GADGET_OMAP
55#define gadget_is_omap(g) !strcmp("omap_udc", (g)->name) 49#define gadget_is_omap(g) !strcmp("omap_udc", (g)->name)
56#else 50#else
@@ -181,8 +175,6 @@ static inline int usb_gadget_controller_number(struct usb_gadget *gadget)
181 return 0x06; 175 return 0x06;
182 else if (gadget_is_omap(gadget)) 176 else if (gadget_is_omap(gadget))
183 return 0x08; 177 return 0x08;
184 else if (gadget_is_lh7a40x(gadget))
185 return 0x09;
186 else if (gadget_is_pxa27x(gadget)) 178 else if (gadget_is_pxa27x(gadget))
187 return 0x11; 179 return 0x11;
188 else if (gadget_is_s3c2410(gadget)) 180 else if (gadget_is_s3c2410(gadget))
diff --git a/drivers/usb/gadget/lh7a40x_udc.c b/drivers/usb/gadget/lh7a40x_udc.c
deleted file mode 100644
index 6b58bd8ce62..00000000000
--- a/drivers/usb/gadget/lh7a40x_udc.c
+++ /dev/null
@@ -1,2152 +0,0 @@
1/*
2 * linux/drivers/usb/gadget/lh7a40x_udc.c
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#include <linux/platform_device.h>
25#include <linux/slab.h>
26
27#include "lh7a40x_udc.h"
28
29//#define DEBUG printk
30//#define DEBUG_EP0 printk
31//#define DEBUG_SETUP printk
32
33#ifndef DEBUG_EP0
34# define DEBUG_EP0(fmt,args...)
35#endif
36#ifndef DEBUG_SETUP
37# define DEBUG_SETUP(fmt,args...)
38#endif
39#ifndef DEBUG
40# define NO_STATES
41# define DEBUG(fmt,args...)
42#endif
43
44#define DRIVER_DESC "LH7A40x USB Device Controller"
45#define DRIVER_VERSION __DATE__
46
47#ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */
48#define _BIT(x) (1<<(x))
49#endif
50
51struct lh7a40x_udc *the_controller;
52
53static const char driver_name[] = "lh7a40x_udc";
54static const char driver_desc[] = DRIVER_DESC;
55static const char ep0name[] = "ep0-control";
56
57/*
58 Local definintions.
59*/
60
61#ifndef NO_STATES
62static char *state_names[] = {
63 "WAIT_FOR_SETUP",
64 "DATA_STATE_XMIT",
65 "DATA_STATE_NEED_ZLP",
66 "WAIT_FOR_OUT_STATUS",
67 "DATA_STATE_RECV"
68};
69#endif
70
71/*
72 Local declarations.
73*/
74static int lh7a40x_ep_enable(struct usb_ep *ep,
75 const struct usb_endpoint_descriptor *);
76static int lh7a40x_ep_disable(struct usb_ep *ep);
77static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t);
78static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *);
79static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t);
80static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *);
81static int lh7a40x_set_halt(struct usb_ep *ep, int);
82static int lh7a40x_fifo_status(struct usb_ep *ep);
83static void lh7a40x_fifo_flush(struct usb_ep *ep);
84static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep);
85static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr);
86
87static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req,
88 int status);
89static void pio_irq_enable(int bEndpointAddress);
90static void pio_irq_disable(int bEndpointAddress);
91static void stop_activity(struct lh7a40x_udc *dev,
92 struct usb_gadget_driver *driver);
93static void flush(struct lh7a40x_ep *ep);
94static void udc_enable(struct lh7a40x_udc *dev);
95static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address);
96
97static struct usb_ep_ops lh7a40x_ep_ops = {
98 .enable = lh7a40x_ep_enable,
99 .disable = lh7a40x_ep_disable,
100
101 .alloc_request = lh7a40x_alloc_request,
102 .free_request = lh7a40x_free_request,
103
104 .queue = lh7a40x_queue,
105 .dequeue = lh7a40x_dequeue,
106
107 .set_halt = lh7a40x_set_halt,
108 .fifo_status = lh7a40x_fifo_status,
109 .fifo_flush = lh7a40x_fifo_flush,
110};
111
112/* Inline code */
113
114static __inline__ int write_packet(struct lh7a40x_ep *ep,
115 struct lh7a40x_request *req, int max)
116{
117 u8 *buf;
118 int length, count;
119 volatile u32 *fifo = (volatile u32 *)ep->fifo;
120
121 buf = req->req.buf + req->req.actual;
122 prefetch(buf);
123
124 length = req->req.length - req->req.actual;
125 length = min(length, max);
126 req->req.actual += length;
127
128 DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo);
129
130 count = length;
131 while (count--) {
132 *fifo = *buf++;
133 }
134
135 return length;
136}
137
138static __inline__ void usb_set_index(u32 ep)
139{
140 *(volatile u32 *)io_p2v(USB_INDEX) = ep;
141}
142
143static __inline__ u32 usb_read(u32 port)
144{
145 return *(volatile u32 *)io_p2v(port);
146}
147
148static __inline__ void usb_write(u32 val, u32 port)
149{
150 *(volatile u32 *)io_p2v(port) = val;
151}
152
153static __inline__ void usb_set(u32 val, u32 port)
154{
155 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
156 u32 after = (*ioport) | val;
157 *ioport = after;
158}
159
160static __inline__ void usb_clear(u32 val, u32 port)
161{
162 volatile u32 *ioport = (volatile u32 *)io_p2v(port);
163 u32 after = (*ioport) & ~val;
164 *ioport = after;
165}
166
167/*-------------------------------------------------------------------------*/
168
169#define GPIO_PORTC_DR (0x80000E08)
170#define GPIO_PORTC_DDR (0x80000E18)
171#define GPIO_PORTC_PDR (0x80000E70)
172
173/* get port C pin data register */
174#define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0)
175/* get port C data direction register */
176#define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0)
177/* set port C data register */
178#define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR))
179/* set port C data direction register */
180#define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR))
181
182/*
183 * LPD7A404 GPIO's:
184 * Port C bit 1 = USB Port 1 Power Enable
185 * Port C bit 2 = USB Port 1 Data Carrier Detect
186 */
187#define is_usb_connected() get_portc_pdr(2)
188
189#ifdef CONFIG_USB_GADGET_DEBUG_FILES
190
191static const char proc_node_name[] = "driver/udc";
192
193static int
194udc_proc_read(char *page, char **start, off_t off, int count,
195 int *eof, void *_dev)
196{
197 char *buf = page;
198 struct lh7a40x_udc *dev = _dev;
199 char *next = buf;
200 unsigned size = count;
201 unsigned long flags;
202 int t;
203
204 if (off != 0)
205 return 0;
206
207 local_irq_save(flags);
208
209 /* basic device status */
210 t = scnprintf(next, size,
211 DRIVER_DESC "\n"
212 "%s version: %s\n"
213 "Gadget driver: %s\n"
214 "Host: %s\n\n",
215 driver_name, DRIVER_VERSION,
216 dev->driver ? dev->driver->driver.name : "(none)",
217 is_usb_connected()? "full speed" : "disconnected");
218 size -= t;
219 next += t;
220
221 t = scnprintf(next, size,
222 "GPIO:\n"
223 " Port C bit 1: %d, dir %d\n"
224 " Port C bit 2: %d, dir %d\n\n",
225 get_portc_pdr(1), get_portc_ddr(1),
226 get_portc_pdr(2), get_portc_ddr(2)
227 );
228 size -= t;
229 next += t;
230
231 t = scnprintf(next, size,
232 "DCP pullup: %d\n\n",
233 (usb_read(USB_PM) & PM_USB_DCP) != 0);
234 size -= t;
235 next += t;
236
237 local_irq_restore(flags);
238 *eof = 1;
239 return count - size;
240}
241
242#define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev)
243#define remove_proc_files() remove_proc_entry(proc_node_name, NULL)
244
245#else /* !CONFIG_USB_GADGET_DEBUG_FILES */
246
247#define create_proc_files() do {} while (0)
248#define remove_proc_files() do {} while (0)
249
250#endif /* CONFIG_USB_GADGET_DEBUG_FILES */
251
252/*
253 * udc_disable - disable USB device controller
254 */
255static void udc_disable(struct lh7a40x_udc *dev)
256{
257 DEBUG("%s, %p\n", __func__, dev);
258
259 udc_set_address(dev, 0);
260
261 /* Disable interrupts */
262 usb_write(0, USB_IN_INT_EN);
263 usb_write(0, USB_OUT_INT_EN);
264 usb_write(0, USB_INT_EN);
265
266 /* Disable the USB */
267 usb_write(0, USB_PM);
268
269#ifdef CONFIG_ARCH_LH7A404
270 /* Disable USB power */
271 set_portc_dr(1, 0);
272#endif
273
274 /* if hardware supports it, disconnect from usb */
275 /* make_usb_disappear(); */
276
277 dev->ep0state = WAIT_FOR_SETUP;
278 dev->gadget.speed = USB_SPEED_UNKNOWN;
279 dev->usb_address = 0;
280}
281
282/*
283 * udc_reinit - initialize software state
284 */
285static void udc_reinit(struct lh7a40x_udc *dev)
286{
287 u32 i;
288
289 DEBUG("%s, %p\n", __func__, dev);
290
291 /* device/ep0 records init */
292 INIT_LIST_HEAD(&dev->gadget.ep_list);
293 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
294 dev->ep0state = WAIT_FOR_SETUP;
295
296 /* basic endpoint records init */
297 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
298 struct lh7a40x_ep *ep = &dev->ep[i];
299
300 if (i != 0)
301 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
302
303 ep->desc = 0;
304 ep->stopped = 0;
305 INIT_LIST_HEAD(&ep->queue);
306 ep->pio_irqs = 0;
307 }
308
309 /* the rest was statically initialized, and is read-only */
310}
311
312#define BYTES2MAXP(x) (x / 8)
313#define MAXP2BYTES(x) (x * 8)
314
315/* until it's enabled, this UDC should be completely invisible
316 * to any USB host.
317 */
318static void udc_enable(struct lh7a40x_udc *dev)
319{
320 int ep;
321
322 DEBUG("%s, %p\n", __func__, dev);
323
324 dev->gadget.speed = USB_SPEED_UNKNOWN;
325
326#ifdef CONFIG_ARCH_LH7A404
327 /* Set Port C bit 1 & 2 as output */
328 set_portc_ddr(1, 1);
329 set_portc_ddr(2, 1);
330
331 /* Enable USB power */
332 set_portc_dr(1, 0);
333#endif
334
335 /*
336 * C.f Chapter 18.1.3.1 Initializing the USB
337 */
338
339 /* Disable the USB */
340 usb_clear(PM_USB_ENABLE, USB_PM);
341
342 /* Reset APB & I/O sides of the USB */
343 usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET);
344 mdelay(5);
345 usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET);
346
347 /* Set MAXP values for each */
348 for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) {
349 struct lh7a40x_ep *ep_reg = &dev->ep[ep];
350 u32 csr;
351
352 usb_set_index(ep);
353
354 switch (ep_reg->ep_type) {
355 case ep_bulk_in:
356 case ep_interrupt:
357 usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET,
358 ep_reg->csr2);
359 /* Fall through */
360 case ep_control:
361 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
362 USB_IN_MAXP);
363 break;
364 case ep_bulk_out:
365 usb_clear(USB_OUT_CSR2_USB_DMA_EN |
366 USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2);
367 usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)),
368 USB_OUT_MAXP);
369 break;
370 }
371
372 /* Read & Write CSR1, just in case */
373 csr = usb_read(ep_reg->csr1);
374 usb_write(csr, ep_reg->csr1);
375
376 flush(ep_reg);
377 }
378
379 /* Disable interrupts */
380 usb_write(0, USB_IN_INT_EN);
381 usb_write(0, USB_OUT_INT_EN);
382 usb_write(0, USB_INT_EN);
383
384 /* Enable interrupts */
385 usb_set(USB_IN_INT_EP0, USB_IN_INT_EN);
386 usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN);
387 /* Dont enable rest of the interrupts */
388 /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN);
389 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */
390
391 /* Enable SUSPEND */
392 usb_set(PM_ENABLE_SUSPEND, USB_PM);
393
394 /* Enable the USB */
395 usb_set(PM_USB_ENABLE, USB_PM);
396
397#ifdef CONFIG_ARCH_LH7A404
398 /* NOTE: DOES NOT WORK! */
399 /* Let host detect UDC:
400 * Software must write a 0 to the PMR:DCP_CTRL bit to turn this
401 * transistor on and pull the USBDP pin HIGH.
402 */
403 /* usb_clear(PM_USB_DCP, USB_PM);
404 usb_set(PM_USB_DCP, USB_PM); */
405#endif
406}
407
408/*
409 Register entry point for the peripheral controller driver.
410*/
411int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
412 int (*bind)(struct usb_gadget *))
413{
414 struct lh7a40x_udc *dev = the_controller;
415 int retval;
416
417 DEBUG("%s: %s\n", __func__, driver->driver.name);
418
419 if (!driver
420 || driver->speed != USB_SPEED_FULL
421 || !bind
422 || !driver->disconnect
423 || !driver->setup)
424 return -EINVAL;
425 if (!dev)
426 return -ENODEV;
427 if (dev->driver)
428 return -EBUSY;
429
430 /* first hook up the driver ... */
431 dev->driver = driver;
432 dev->gadget.dev.driver = &driver->driver;
433
434 device_add(&dev->gadget.dev);
435 retval = bind(&dev->gadget);
436 if (retval) {
437 printk(KERN_WARNING "%s: bind to driver %s --> error %d\n",
438 dev->gadget.name, driver->driver.name, retval);
439 device_del(&dev->gadget.dev);
440
441 dev->driver = 0;
442 dev->gadget.dev.driver = 0;
443 return retval;
444 }
445
446 /* ... then enable host detection and ep0; and we're ready
447 * for set_configuration as well as eventual disconnect.
448 * NOTE: this shouldn't power up until later.
449 */
450 printk(KERN_WARNING "%s: registered gadget driver '%s'\n",
451 dev->gadget.name, driver->driver.name);
452
453 udc_enable(dev);
454
455 return 0;
456}
457EXPORT_SYMBOL(usb_gadget_probe_driver);
458
459/*
460 Unregister entry point for the peripheral controller driver.
461*/
462int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
463{
464 struct lh7a40x_udc *dev = the_controller;
465 unsigned long flags;
466
467 if (!dev)
468 return -ENODEV;
469 if (!driver || driver != dev->driver || !driver->unbind)
470 return -EINVAL;
471
472 spin_lock_irqsave(&dev->lock, flags);
473 dev->driver = 0;
474 stop_activity(dev, driver);
475 spin_unlock_irqrestore(&dev->lock, flags);
476
477 driver->unbind(&dev->gadget);
478 dev->gadget.dev.driver = NULL;
479 device_del(&dev->gadget.dev);
480
481 udc_disable(dev);
482
483 DEBUG("unregistered gadget driver '%s'\n", driver->driver.name);
484 return 0;
485}
486
487EXPORT_SYMBOL(usb_gadget_unregister_driver);
488
489/*-------------------------------------------------------------------------*/
490
491/** Write request to FIFO (max write == maxp size)
492 * Return: 0 = still running, 1 = completed, negative = errno
493 * NOTE: INDEX register must be set for EP
494 */
495static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
496{
497 u32 max;
498 u32 csr;
499
500 max = le16_to_cpu(ep->desc->wMaxPacketSize);
501
502 csr = usb_read(ep->csr1);
503 DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY);
504
505 if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) {
506 unsigned count;
507 int is_last, is_short;
508
509 count = write_packet(ep, req, max);
510 usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1);
511
512 /* last packet is usually short (or a zlp) */
513 if (unlikely(count != max))
514 is_last = is_short = 1;
515 else {
516 if (likely(req->req.length != req->req.actual)
517 || req->req.zero)
518 is_last = 0;
519 else
520 is_last = 1;
521 /* interrupt/iso maxpacket may not fill the fifo */
522 is_short = unlikely(max < ep_maxpacket(ep));
523 }
524
525 DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__,
526 ep->ep.name, count,
527 is_last ? "/L" : "", is_short ? "/S" : "",
528 req->req.length - req->req.actual, req);
529
530 /* requests complete when all IN data is in the FIFO */
531 if (is_last) {
532 done(ep, req, 0);
533 if (list_empty(&ep->queue)) {
534 pio_irq_disable(ep_index(ep));
535 }
536 return 1;
537 }
538 } else {
539 DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep));
540 }
541
542 return 0;
543}
544
545/** Read to request from FIFO (max read == bytes in fifo)
546 * Return: 0 = still running, 1 = completed, negative = errno
547 * NOTE: INDEX register must be set for EP
548 */
549static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
550{
551 u32 csr;
552 u8 *buf;
553 unsigned bufferspace, count, is_short;
554 volatile u32 *fifo = (volatile u32 *)ep->fifo;
555
556 /* make sure there's a packet in the FIFO. */
557 csr = usb_read(ep->csr1);
558 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) {
559 DEBUG("%s: Packet NOT ready!\n", __func__);
560 return -EINVAL;
561 }
562
563 buf = req->req.buf + req->req.actual;
564 prefetchw(buf);
565 bufferspace = req->req.length - req->req.actual;
566
567 /* read all bytes from this packet */
568 count = usb_read(USB_OUT_FIFO_WC1);
569 req->req.actual += min(count, bufferspace);
570
571 is_short = (count < ep->ep.maxpacket);
572 DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n",
573 ep->ep.name, csr, count,
574 is_short ? "/S" : "", req, req->req.actual, req->req.length);
575
576 while (likely(count-- != 0)) {
577 u8 byte = (u8) (*fifo & 0xff);
578
579 if (unlikely(bufferspace == 0)) {
580 /* this happens when the driver's buffer
581 * is smaller than what the host sent.
582 * discard the extra data.
583 */
584 if (req->req.status != -EOVERFLOW)
585 printk(KERN_WARNING "%s overflow %d\n",
586 ep->ep.name, count);
587 req->req.status = -EOVERFLOW;
588 } else {
589 *buf++ = byte;
590 bufferspace--;
591 }
592 }
593
594 usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1);
595
596 /* completion */
597 if (is_short || req->req.actual == req->req.length) {
598 done(ep, req, 0);
599 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
600
601 if (list_empty(&ep->queue))
602 pio_irq_disable(ep_index(ep));
603 return 1;
604 }
605
606 /* finished that packet. the next one may be waiting... */
607 return 0;
608}
609
610/*
611 * done - retire a request; caller blocked irqs
612 * INDEX register is preserved to keep same
613 */
614static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status)
615{
616 unsigned int stopped = ep->stopped;
617 u32 index;
618
619 DEBUG("%s, %p\n", __func__, ep);
620 list_del_init(&req->queue);
621
622 if (likely(req->req.status == -EINPROGRESS))
623 req->req.status = status;
624 else
625 status = req->req.status;
626
627 if (status && status != -ESHUTDOWN)
628 DEBUG("complete %s req %p stat %d len %u/%u\n",
629 ep->ep.name, &req->req, status,
630 req->req.actual, req->req.length);
631
632 /* don't modify queue heads during completion callback */
633 ep->stopped = 1;
634 /* Read current index (completion may modify it) */
635 index = usb_read(USB_INDEX);
636
637 spin_unlock(&ep->dev->lock);
638 req->req.complete(&ep->ep, &req->req);
639 spin_lock(&ep->dev->lock);
640
641 /* Restore index */
642 usb_set_index(index);
643 ep->stopped = stopped;
644}
645
646/** Enable EP interrupt */
647static void pio_irq_enable(int ep)
648{
649 DEBUG("%s: %d\n", __func__, ep);
650
651 switch (ep) {
652 case 1:
653 usb_set(USB_IN_INT_EP1, USB_IN_INT_EN);
654 break;
655 case 2:
656 usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN);
657 break;
658 case 3:
659 usb_set(USB_IN_INT_EP3, USB_IN_INT_EN);
660 break;
661 default:
662 DEBUG("Unknown endpoint: %d\n", ep);
663 break;
664 }
665}
666
667/** Disable EP interrupt */
668static void pio_irq_disable(int ep)
669{
670 DEBUG("%s: %d\n", __func__, ep);
671
672 switch (ep) {
673 case 1:
674 usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN);
675 break;
676 case 2:
677 usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN);
678 break;
679 case 3:
680 usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN);
681 break;
682 default:
683 DEBUG("Unknown endpoint: %d\n", ep);
684 break;
685 }
686}
687
688/*
689 * nuke - dequeue ALL requests
690 */
691void nuke(struct lh7a40x_ep *ep, int status)
692{
693 struct lh7a40x_request *req;
694
695 DEBUG("%s, %p\n", __func__, ep);
696
697 /* Flush FIFO */
698 flush(ep);
699
700 /* called with irqs blocked */
701 while (!list_empty(&ep->queue)) {
702 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
703 done(ep, req, status);
704 }
705
706 /* Disable IRQ if EP is enabled (has descriptor) */
707 if (ep->desc)
708 pio_irq_disable(ep_index(ep));
709}
710
711/*
712void nuke_all(struct lh7a40x_udc *dev)
713{
714 int n;
715 for(n=0; n<UDC_MAX_ENDPOINTS; n++) {
716 struct lh7a40x_ep *ep = &dev->ep[n];
717 usb_set_index(n);
718 nuke(ep, 0);
719 }
720}*/
721
722/*
723static void flush_all(struct lh7a40x_udc *dev)
724{
725 int n;
726 for (n = 0; n < UDC_MAX_ENDPOINTS; n++)
727 {
728 struct lh7a40x_ep *ep = &dev->ep[n];
729 flush(ep);
730 }
731}
732*/
733
734/** Flush EP
735 * NOTE: INDEX register must be set before this call
736 */
737static void flush(struct lh7a40x_ep *ep)
738{
739 DEBUG("%s, %p\n", __func__, ep);
740
741 switch (ep->ep_type) {
742 case ep_control:
743 /* check, by implication c.f. 15.1.2.11 */
744 break;
745
746 case ep_bulk_in:
747 case ep_interrupt:
748 /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */
749 usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1);
750 break;
751
752 case ep_bulk_out:
753 /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */
754 usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1);
755 break;
756 }
757}
758
759/**
760 * lh7a40x_in_epn - handle IN interrupt
761 */
762static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
763{
764 u32 csr;
765 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
766 struct lh7a40x_request *req;
767
768 usb_set_index(ep_idx);
769
770 csr = usb_read(ep->csr1);
771 DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr);
772
773 if (csr & USB_IN_CSR1_SENT_STALL) {
774 DEBUG("USB_IN_CSR1_SENT_STALL\n");
775 usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ ,
776 ep->csr1);
777 return;
778 }
779
780 if (!ep->desc) {
781 DEBUG("%s: NO EP DESC\n", __func__);
782 return;
783 }
784
785 if (list_empty(&ep->queue))
786 req = 0;
787 else
788 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
789
790 DEBUG("req: %p\n", req);
791
792 if (!req)
793 return;
794
795 write_fifo(ep, req);
796}
797
798/* ********************************************************************************************* */
799/* Bulk OUT (recv)
800 */
801
802static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr)
803{
804 struct lh7a40x_ep *ep = &dev->ep[ep_idx];
805 struct lh7a40x_request *req;
806
807 DEBUG("%s: %d\n", __func__, ep_idx);
808
809 usb_set_index(ep_idx);
810
811 if (ep->desc) {
812 u32 csr;
813 csr = usb_read(ep->csr1);
814
815 while ((csr =
816 usb_read(ep->
817 csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY |
818 USB_OUT_CSR1_SENT_STALL)) {
819 DEBUG("%s: %x\n", __func__, csr);
820
821 if (csr & USB_OUT_CSR1_SENT_STALL) {
822 DEBUG("%s: stall sent, flush fifo\n",
823 __func__);
824 /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */
825 flush(ep);
826 } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) {
827 if (list_empty(&ep->queue))
828 req = 0;
829 else
830 req =
831 list_entry(ep->queue.next,
832 struct lh7a40x_request,
833 queue);
834
835 if (!req) {
836 printk(KERN_WARNING
837 "%s: NULL REQ %d\n",
838 __func__, ep_idx);
839 flush(ep);
840 break;
841 } else {
842 read_fifo(ep, req);
843 }
844 }
845
846 }
847
848 } else {
849 /* Throw packet away.. */
850 printk(KERN_WARNING "%s: No descriptor?!?\n", __func__);
851 flush(ep);
852 }
853}
854
855static void stop_activity(struct lh7a40x_udc *dev,
856 struct usb_gadget_driver *driver)
857{
858 int i;
859
860 /* don't disconnect drivers more than once */
861 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
862 driver = 0;
863 dev->gadget.speed = USB_SPEED_UNKNOWN;
864
865 /* prevent new request submissions, kill any outstanding requests */
866 for (i = 0; i < UDC_MAX_ENDPOINTS; i++) {
867 struct lh7a40x_ep *ep = &dev->ep[i];
868 ep->stopped = 1;
869
870 usb_set_index(i);
871 nuke(ep, -ESHUTDOWN);
872 }
873
874 /* report disconnect; the driver is already quiesced */
875 if (driver) {
876 spin_unlock(&dev->lock);
877 driver->disconnect(&dev->gadget);
878 spin_lock(&dev->lock);
879 }
880
881 /* re-init driver-visible data structures */
882 udc_reinit(dev);
883}
884
885/** Handle USB RESET interrupt
886 */
887static void lh7a40x_reset_intr(struct lh7a40x_udc *dev)
888{
889#if 0 /* def CONFIG_ARCH_LH7A404 */
890 /* Does not work always... */
891
892 DEBUG("%s: %d\n", __func__, dev->usb_address);
893
894 if (!dev->usb_address) {
895 /*usb_set(USB_RESET_IO, USB_RESET);
896 mdelay(5);
897 usb_clear(USB_RESET_IO, USB_RESET); */
898 return;
899 }
900 /* Put the USB controller into reset. */
901 usb_set(USB_RESET_IO, USB_RESET);
902
903 /* Set Device ID to 0 */
904 udc_set_address(dev, 0);
905
906 /* Let PLL2 settle down */
907 mdelay(5);
908
909 /* Release the USB controller from reset */
910 usb_clear(USB_RESET_IO, USB_RESET);
911
912 /* Re-enable UDC */
913 udc_enable(dev);
914
915#endif
916 dev->gadget.speed = USB_SPEED_FULL;
917}
918
919/*
920 * lh7a40x usb client interrupt handler.
921 */
922static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev)
923{
924 struct lh7a40x_udc *dev = _dev;
925
926 DEBUG("\n\n");
927
928 spin_lock(&dev->lock);
929
930 for (;;) {
931 u32 intr_in = usb_read(USB_IN_INT);
932 u32 intr_out = usb_read(USB_OUT_INT);
933 u32 intr_int = usb_read(USB_INT);
934
935 /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */
936 u32 in_en = usb_read(USB_IN_INT_EN);
937 u32 out_en = usb_read(USB_OUT_INT_EN);
938
939 if (!intr_out && !intr_in && !intr_int)
940 break;
941
942 DEBUG("%s (on state %s)\n", __func__,
943 state_names[dev->ep0state]);
944 DEBUG("intr_out = %x\n", intr_out);
945 DEBUG("intr_in = %x\n", intr_in);
946 DEBUG("intr_int = %x\n", intr_int);
947
948 if (intr_in) {
949 usb_write(intr_in, USB_IN_INT);
950
951 if ((intr_in & USB_IN_INT_EP1)
952 && (in_en & USB_IN_INT_EP1)) {
953 DEBUG("USB_IN_INT_EP1\n");
954 lh7a40x_in_epn(dev, 1, intr_in);
955 }
956 if ((intr_in & USB_IN_INT_EP3)
957 && (in_en & USB_IN_INT_EP3)) {
958 DEBUG("USB_IN_INT_EP3\n");
959 lh7a40x_in_epn(dev, 3, intr_in);
960 }
961 if (intr_in & USB_IN_INT_EP0) {
962 DEBUG("USB_IN_INT_EP0 (control)\n");
963 lh7a40x_handle_ep0(dev, intr_in);
964 }
965 }
966
967 if (intr_out) {
968 usb_write(intr_out, USB_OUT_INT);
969
970 if ((intr_out & USB_OUT_INT_EP2)
971 && (out_en & USB_OUT_INT_EP2)) {
972 DEBUG("USB_OUT_INT_EP2\n");
973 lh7a40x_out_epn(dev, 2, intr_out);
974 }
975 }
976
977 if (intr_int) {
978 usb_write(intr_int, USB_INT);
979
980 if (intr_int & USB_INT_RESET_INT) {
981 lh7a40x_reset_intr(dev);
982 }
983
984 if (intr_int & USB_INT_RESUME_INT) {
985 DEBUG("USB resume\n");
986
987 if (dev->gadget.speed != USB_SPEED_UNKNOWN
988 && dev->driver
989 && dev->driver->resume
990 && is_usb_connected()) {
991 dev->driver->resume(&dev->gadget);
992 }
993 }
994
995 if (intr_int & USB_INT_SUSPEND_INT) {
996 DEBUG("USB suspend%s\n",
997 is_usb_connected()? "" : "+disconnect");
998 if (!is_usb_connected()) {
999 stop_activity(dev, dev->driver);
1000 } else if (dev->gadget.speed !=
1001 USB_SPEED_UNKNOWN && dev->driver
1002 && dev->driver->suspend) {
1003 dev->driver->suspend(&dev->gadget);
1004 }
1005 }
1006
1007 }
1008 }
1009
1010 spin_unlock(&dev->lock);
1011
1012 return IRQ_HANDLED;
1013}
1014
1015static int lh7a40x_ep_enable(struct usb_ep *_ep,
1016 const struct usb_endpoint_descriptor *desc)
1017{
1018 struct lh7a40x_ep *ep;
1019 struct lh7a40x_udc *dev;
1020 unsigned long flags;
1021
1022 DEBUG("%s, %p\n", __func__, _ep);
1023
1024 ep = container_of(_ep, struct lh7a40x_ep, ep);
1025 if (!_ep || !desc || ep->desc || _ep->name == ep0name
1026 || desc->bDescriptorType != USB_DT_ENDPOINT
1027 || ep->bEndpointAddress != desc->bEndpointAddress
1028 || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) {
1029 DEBUG("%s, bad ep or descriptor\n", __func__);
1030 return -EINVAL;
1031 }
1032
1033 /* xfer types must match, except that interrupt ~= bulk */
1034 if (ep->bmAttributes != desc->bmAttributes
1035 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
1036 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
1037 DEBUG("%s, %s type mismatch\n", __func__, _ep->name);
1038 return -EINVAL;
1039 }
1040
1041 /* hardware _could_ do smaller, but driver doesn't */
1042 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK
1043 && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep))
1044 || !desc->wMaxPacketSize) {
1045 DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name);
1046 return -ERANGE;
1047 }
1048
1049 dev = ep->dev;
1050 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
1051 DEBUG("%s, bogus device state\n", __func__);
1052 return -ESHUTDOWN;
1053 }
1054
1055 spin_lock_irqsave(&ep->dev->lock, flags);
1056
1057 ep->stopped = 0;
1058 ep->desc = desc;
1059 ep->pio_irqs = 0;
1060 ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize);
1061
1062 spin_unlock_irqrestore(&ep->dev->lock, flags);
1063
1064 /* Reset halt state (does flush) */
1065 lh7a40x_set_halt(_ep, 0);
1066
1067 DEBUG("%s: enabled %s\n", __func__, _ep->name);
1068 return 0;
1069}
1070
1071/** Disable EP
1072 * NOTE: Sets INDEX register
1073 */
1074static int lh7a40x_ep_disable(struct usb_ep *_ep)
1075{
1076 struct lh7a40x_ep *ep;
1077 unsigned long flags;
1078
1079 DEBUG("%s, %p\n", __func__, _ep);
1080
1081 ep = container_of(_ep, struct lh7a40x_ep, ep);
1082 if (!_ep || !ep->desc) {
1083 DEBUG("%s, %s not enabled\n", __func__,
1084 _ep ? ep->ep.name : NULL);
1085 return -EINVAL;
1086 }
1087
1088 spin_lock_irqsave(&ep->dev->lock, flags);
1089
1090 usb_set_index(ep_index(ep));
1091
1092 /* Nuke all pending requests (does flush) */
1093 nuke(ep, -ESHUTDOWN);
1094
1095 /* Disable ep IRQ */
1096 pio_irq_disable(ep_index(ep));
1097
1098 ep->desc = 0;
1099 ep->stopped = 1;
1100
1101 spin_unlock_irqrestore(&ep->dev->lock, flags);
1102
1103 DEBUG("%s: disabled %s\n", __func__, _ep->name);
1104 return 0;
1105}
1106
1107static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep,
1108 gfp_t gfp_flags)
1109{
1110 struct lh7a40x_request *req;
1111
1112 DEBUG("%s, %p\n", __func__, ep);
1113
1114 req = kzalloc(sizeof(*req), gfp_flags);
1115 if (!req)
1116 return 0;
1117
1118 INIT_LIST_HEAD(&req->queue);
1119
1120 return &req->req;
1121}
1122
1123static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req)
1124{
1125 struct lh7a40x_request *req;
1126
1127 DEBUG("%s, %p\n", __func__, ep);
1128
1129 req = container_of(_req, struct lh7a40x_request, req);
1130 WARN_ON(!list_empty(&req->queue));
1131 kfree(req);
1132}
1133
1134/** Queue one request
1135 * Kickstart transfer if needed
1136 * NOTE: Sets INDEX register
1137 */
1138static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req,
1139 gfp_t gfp_flags)
1140{
1141 struct lh7a40x_request *req;
1142 struct lh7a40x_ep *ep;
1143 struct lh7a40x_udc *dev;
1144 unsigned long flags;
1145
1146 DEBUG("\n\n\n%s, %p\n", __func__, _ep);
1147
1148 req = container_of(_req, struct lh7a40x_request, req);
1149 if (unlikely
1150 (!_req || !_req->complete || !_req->buf
1151 || !list_empty(&req->queue))) {
1152 DEBUG("%s, bad params\n", __func__);
1153 return -EINVAL;
1154 }
1155
1156 ep = container_of(_ep, struct lh7a40x_ep, ep);
1157 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1158 DEBUG("%s, bad ep\n", __func__);
1159 return -EINVAL;
1160 }
1161
1162 dev = ep->dev;
1163 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) {
1164 DEBUG("%s, bogus device state %p\n", __func__, dev->driver);
1165 return -ESHUTDOWN;
1166 }
1167
1168 DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length,
1169 _req->buf);
1170
1171 spin_lock_irqsave(&dev->lock, flags);
1172
1173 _req->status = -EINPROGRESS;
1174 _req->actual = 0;
1175
1176 /* kickstart this i/o queue? */
1177 DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue),
1178 ep->stopped);
1179 if (list_empty(&ep->queue) && likely(!ep->stopped)) {
1180 u32 csr;
1181
1182 if (unlikely(ep_index(ep) == 0)) {
1183 /* EP0 */
1184 list_add_tail(&req->queue, &ep->queue);
1185 lh7a40x_ep0_kick(dev, ep);
1186 req = 0;
1187 } else if (ep_is_in(ep)) {
1188 /* EP1 & EP3 */
1189 usb_set_index(ep_index(ep));
1190 csr = usb_read(ep->csr1);
1191 pio_irq_enable(ep_index(ep));
1192 if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) {
1193 if (write_fifo(ep, req) == 1)
1194 req = 0;
1195 }
1196 } else {
1197 /* EP2 */
1198 usb_set_index(ep_index(ep));
1199 csr = usb_read(ep->csr1);
1200 pio_irq_enable(ep_index(ep));
1201 if (!(csr & USB_OUT_CSR1_FIFO_FULL)) {
1202 if (read_fifo(ep, req) == 1)
1203 req = 0;
1204 }
1205 }
1206 }
1207
1208 /* pio or dma irq handler advances the queue. */
1209 if (likely(req != 0))
1210 list_add_tail(&req->queue, &ep->queue);
1211
1212 spin_unlock_irqrestore(&dev->lock, flags);
1213
1214 return 0;
1215}
1216
1217/* dequeue JUST ONE request */
1218static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req)
1219{
1220 struct lh7a40x_ep *ep;
1221 struct lh7a40x_request *req;
1222 unsigned long flags;
1223
1224 DEBUG("%s, %p\n", __func__, _ep);
1225
1226 ep = container_of(_ep, struct lh7a40x_ep, ep);
1227 if (!_ep || ep->ep.name == ep0name)
1228 return -EINVAL;
1229
1230 spin_lock_irqsave(&ep->dev->lock, flags);
1231
1232 /* make sure it's actually queued on this endpoint */
1233 list_for_each_entry(req, &ep->queue, queue) {
1234 if (&req->req == _req)
1235 break;
1236 }
1237 if (&req->req != _req) {
1238 spin_unlock_irqrestore(&ep->dev->lock, flags);
1239 return -EINVAL;
1240 }
1241
1242 done(ep, req, -ECONNRESET);
1243
1244 spin_unlock_irqrestore(&ep->dev->lock, flags);
1245 return 0;
1246}
1247
1248/** Halt specific EP
1249 * Return 0 if success
1250 * NOTE: Sets INDEX register to EP !
1251 */
1252static int lh7a40x_set_halt(struct usb_ep *_ep, int value)
1253{
1254 struct lh7a40x_ep *ep;
1255 unsigned long flags;
1256
1257 ep = container_of(_ep, struct lh7a40x_ep, ep);
1258 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1259 DEBUG("%s, bad ep\n", __func__);
1260 return -EINVAL;
1261 }
1262
1263 usb_set_index(ep_index(ep));
1264
1265 DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value);
1266
1267 spin_lock_irqsave(&ep->dev->lock, flags);
1268
1269 if (ep_index(ep) == 0) {
1270 /* EP0 */
1271 usb_set(EP0_SEND_STALL, ep->csr1);
1272 } else if (ep_is_in(ep)) {
1273 u32 csr = usb_read(ep->csr1);
1274 if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY)
1275 || !list_empty(&ep->queue))) {
1276 /*
1277 * Attempts to halt IN endpoints will fail (returning -EAGAIN)
1278 * if any transfer requests are still queued, or if the controller
1279 * FIFO still holds bytes that the host hasn't collected.
1280 */
1281 spin_unlock_irqrestore(&ep->dev->lock, flags);
1282 DEBUG
1283 ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n",
1284 (csr & USB_IN_CSR1_FIFO_NOT_EMPTY),
1285 !list_empty(&ep->queue));
1286 return -EAGAIN;
1287 }
1288 flush(ep);
1289 if (value)
1290 usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1);
1291 else {
1292 usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1);
1293 usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1);
1294 }
1295
1296 } else {
1297
1298 flush(ep);
1299 if (value)
1300 usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1301 else {
1302 usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1);
1303 usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1);
1304 }
1305 }
1306
1307 if (value) {
1308 ep->stopped = 1;
1309 } else {
1310 ep->stopped = 0;
1311 }
1312
1313 spin_unlock_irqrestore(&ep->dev->lock, flags);
1314
1315 DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS");
1316
1317 return 0;
1318}
1319
1320/** Return bytes in EP FIFO
1321 * NOTE: Sets INDEX register to EP
1322 */
1323static int lh7a40x_fifo_status(struct usb_ep *_ep)
1324{
1325 u32 csr;
1326 int count = 0;
1327 struct lh7a40x_ep *ep;
1328
1329 ep = container_of(_ep, struct lh7a40x_ep, ep);
1330 if (!_ep) {
1331 DEBUG("%s, bad ep\n", __func__);
1332 return -ENODEV;
1333 }
1334
1335 DEBUG("%s, %d\n", __func__, ep_index(ep));
1336
1337 /* LPD can't report unclaimed bytes from IN fifos */
1338 if (ep_is_in(ep))
1339 return -EOPNOTSUPP;
1340
1341 usb_set_index(ep_index(ep));
1342
1343 csr = usb_read(ep->csr1);
1344 if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN ||
1345 csr & USB_OUT_CSR1_OUT_PKT_RDY) {
1346 count = usb_read(USB_OUT_FIFO_WC1);
1347 }
1348
1349 return count;
1350}
1351
1352/** Flush EP FIFO
1353 * NOTE: Sets INDEX register to EP
1354 */
1355static void lh7a40x_fifo_flush(struct usb_ep *_ep)
1356{
1357 struct lh7a40x_ep *ep;
1358
1359 ep = container_of(_ep, struct lh7a40x_ep, ep);
1360 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
1361 DEBUG("%s, bad ep\n", __func__);
1362 return;
1363 }
1364
1365 usb_set_index(ep_index(ep));
1366 flush(ep);
1367}
1368
1369/****************************************************************/
1370/* End Point 0 related functions */
1371/****************************************************************/
1372
1373/* return: 0 = still running, 1 = completed, negative = errno */
1374static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1375{
1376 u32 max;
1377 unsigned count;
1378 int is_last;
1379
1380 max = ep_maxpacket(ep);
1381
1382 DEBUG_EP0("%s\n", __func__);
1383
1384 count = write_packet(ep, req, max);
1385
1386 /* last packet is usually short (or a zlp) */
1387 if (unlikely(count != max))
1388 is_last = 1;
1389 else {
1390 if (likely(req->req.length != req->req.actual) || req->req.zero)
1391 is_last = 0;
1392 else
1393 is_last = 1;
1394 }
1395
1396 DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__,
1397 ep->ep.name, count,
1398 is_last ? "/L" : "", req->req.length - req->req.actual, req);
1399
1400 /* requests complete when all IN data is in the FIFO */
1401 if (is_last) {
1402 done(ep, req, 0);
1403 return 1;
1404 }
1405
1406 return 0;
1407}
1408
1409static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep,
1410 unsigned char *cp, int max)
1411{
1412 int bytes;
1413 int count = usb_read(USB_OUT_FIFO_WC1);
1414 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1415
1416 if (count > max)
1417 count = max;
1418 bytes = count;
1419 while (count--)
1420 *cp++ = *fifo & 0xFF;
1421 return bytes;
1422}
1423
1424static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep,
1425 unsigned char *cp, int count)
1426{
1427 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1428 DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count);
1429 while (count--)
1430 *fifo = *cp++;
1431}
1432
1433static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req)
1434{
1435 u32 csr;
1436 u8 *buf;
1437 unsigned bufferspace, count, is_short;
1438 volatile u32 *fifo = (volatile u32 *)ep->fifo;
1439
1440 DEBUG_EP0("%s\n", __func__);
1441
1442 csr = usb_read(USB_EP0_CSR);
1443 if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY))
1444 return 0;
1445
1446 buf = req->req.buf + req->req.actual;
1447 prefetchw(buf);
1448 bufferspace = req->req.length - req->req.actual;
1449
1450 /* read all bytes from this packet */
1451 if (likely(csr & EP0_OUT_PKT_RDY)) {
1452 count = usb_read(USB_OUT_FIFO_WC1);
1453 req->req.actual += min(count, bufferspace);
1454 } else /* zlp */
1455 count = 0;
1456
1457 is_short = (count < ep->ep.maxpacket);
1458 DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n",
1459 ep->ep.name, csr, count,
1460 is_short ? "/S" : "", req, req->req.actual, req->req.length);
1461
1462 while (likely(count-- != 0)) {
1463 u8 byte = (u8) (*fifo & 0xff);
1464
1465 if (unlikely(bufferspace == 0)) {
1466 /* this happens when the driver's buffer
1467 * is smaller than what the host sent.
1468 * discard the extra data.
1469 */
1470 if (req->req.status != -EOVERFLOW)
1471 DEBUG_EP0("%s overflow %d\n", ep->ep.name,
1472 count);
1473 req->req.status = -EOVERFLOW;
1474 } else {
1475 *buf++ = byte;
1476 bufferspace--;
1477 }
1478 }
1479
1480 /* completion */
1481 if (is_short || req->req.actual == req->req.length) {
1482 done(ep, req, 0);
1483 return 1;
1484 }
1485
1486 /* finished that packet. the next one may be waiting... */
1487 return 0;
1488}
1489
1490/**
1491 * udc_set_address - set the USB address for this device
1492 * @address:
1493 *
1494 * Called from control endpoint function after it decodes a set address setup packet.
1495 */
1496static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address)
1497{
1498 DEBUG_EP0("%s: %d\n", __func__, address);
1499 /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */
1500 dev->usb_address = address;
1501 usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA);
1502 usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA);
1503 /* usb_read(USB_FA); */
1504}
1505
1506/*
1507 * DATA_STATE_RECV (OUT_PKT_RDY)
1508 * - if error
1509 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1510 * - else
1511 * set EP0_CLR_OUT bit
1512 if last set EP0_DATA_END bit
1513 */
1514static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr)
1515{
1516 struct lh7a40x_request *req;
1517 struct lh7a40x_ep *ep = &dev->ep[0];
1518 int ret;
1519
1520 DEBUG_EP0("%s: %x\n", __func__, csr);
1521
1522 if (list_empty(&ep->queue))
1523 req = 0;
1524 else
1525 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1526
1527 if (req) {
1528
1529 if (req->req.length == 0) {
1530 DEBUG_EP0("ZERO LENGTH OUT!\n");
1531 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1532 dev->ep0state = WAIT_FOR_SETUP;
1533 return;
1534 }
1535 ret = read_fifo_ep0(ep, req);
1536 if (ret) {
1537 /* Done! */
1538 DEBUG_EP0("%s: finished, waiting for status\n",
1539 __func__);
1540
1541 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1542 dev->ep0state = WAIT_FOR_SETUP;
1543 } else {
1544 /* Not done yet.. */
1545 DEBUG_EP0("%s: not finished\n", __func__);
1546 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1547 }
1548 } else {
1549 DEBUG_EP0("NO REQ??!\n");
1550 }
1551}
1552
1553/*
1554 * DATA_STATE_XMIT
1555 */
1556static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr)
1557{
1558 struct lh7a40x_request *req;
1559 struct lh7a40x_ep *ep = &dev->ep[0];
1560 int ret, need_zlp = 0;
1561
1562 DEBUG_EP0("%s: %x\n", __func__, csr);
1563
1564 if (list_empty(&ep->queue))
1565 req = 0;
1566 else
1567 req = list_entry(ep->queue.next, struct lh7a40x_request, queue);
1568
1569 if (!req) {
1570 DEBUG_EP0("%s: NULL REQ\n", __func__);
1571 return 0;
1572 }
1573
1574 if (req->req.length == 0) {
1575
1576 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1577 dev->ep0state = WAIT_FOR_SETUP;
1578 return 1;
1579 }
1580
1581 if (req->req.length - req->req.actual == EP0_PACKETSIZE) {
1582 /* Next write will end with the packet size, */
1583 /* so we need Zero-length-packet */
1584 need_zlp = 1;
1585 }
1586
1587 ret = write_fifo_ep0(ep, req);
1588
1589 if (ret == 1 && !need_zlp) {
1590 /* Last packet */
1591 DEBUG_EP0("%s: finished, waiting for status\n", __func__);
1592
1593 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1594 dev->ep0state = WAIT_FOR_SETUP;
1595 } else {
1596 DEBUG_EP0("%s: not finished\n", __func__);
1597 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1598 }
1599
1600 if (need_zlp) {
1601 DEBUG_EP0("%s: Need ZLP!\n", __func__);
1602 usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR);
1603 dev->ep0state = DATA_STATE_NEED_ZLP;
1604 }
1605
1606 return 1;
1607}
1608
1609static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev,
1610 struct usb_ctrlrequest *ctrl)
1611{
1612 struct lh7a40x_ep *ep0 = &dev->ep[0];
1613 struct lh7a40x_ep *qep;
1614 int reqtype = (ctrl->bRequestType & USB_RECIP_MASK);
1615 u16 val = 0;
1616
1617 if (reqtype == USB_RECIP_INTERFACE) {
1618 /* This is not supported.
1619 * And according to the USB spec, this one does nothing..
1620 * Just return 0
1621 */
1622 DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n");
1623 } else if (reqtype == USB_RECIP_DEVICE) {
1624 DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n");
1625 val |= (1 << 0); /* Self powered */
1626 /*val |= (1<<1); *//* Remote wakeup */
1627 } else if (reqtype == USB_RECIP_ENDPOINT) {
1628 int ep_num = (ctrl->wIndex & ~USB_DIR_IN);
1629
1630 DEBUG_SETUP
1631 ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n",
1632 ep_num, ctrl->wLength);
1633
1634 if (ctrl->wLength > 2 || ep_num > 3)
1635 return -EOPNOTSUPP;
1636
1637 qep = &dev->ep[ep_num];
1638 if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0)
1639 && ep_index(qep) != 0) {
1640 return -EOPNOTSUPP;
1641 }
1642
1643 usb_set_index(ep_index(qep));
1644
1645 /* Return status on next IN token */
1646 switch (qep->ep_type) {
1647 case ep_control:
1648 val =
1649 (usb_read(qep->csr1) & EP0_SEND_STALL) ==
1650 EP0_SEND_STALL;
1651 break;
1652 case ep_bulk_in:
1653 case ep_interrupt:
1654 val =
1655 (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) ==
1656 USB_IN_CSR1_SEND_STALL;
1657 break;
1658 case ep_bulk_out:
1659 val =
1660 (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) ==
1661 USB_OUT_CSR1_SEND_STALL;
1662 break;
1663 }
1664
1665 /* Back to EP0 index */
1666 usb_set_index(0);
1667
1668 DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num,
1669 ctrl->wIndex, val);
1670 } else {
1671 DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype);
1672 return -EOPNOTSUPP;
1673 }
1674
1675 /* Clear "out packet ready" */
1676 usb_set((EP0_CLR_OUT), USB_EP0_CSR);
1677 /* Put status to FIFO */
1678 lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val));
1679 /* Issue "In packet ready" */
1680 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1681
1682 return 0;
1683}
1684
1685/*
1686 * WAIT_FOR_SETUP (OUT_PKT_RDY)
1687 * - read data packet from EP0 FIFO
1688 * - decode command
1689 * - if error
1690 * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits
1691 * - else
1692 * set EP0_CLR_OUT | EP0_DATA_END bits
1693 */
1694static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr)
1695{
1696 struct lh7a40x_ep *ep = &dev->ep[0];
1697 struct usb_ctrlrequest ctrl;
1698 int i, bytes, is_in;
1699
1700 DEBUG_SETUP("%s: %x\n", __func__, csr);
1701
1702 /* Nuke all previous transfers */
1703 nuke(ep, -EPROTO);
1704
1705 /* read control req from fifo (8 bytes) */
1706 bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8);
1707
1708 DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes);
1709 DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType,
1710 ctrl.bRequestType == USB_DIR_IN);
1711 DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest);
1712 DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength);
1713 DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8);
1714 DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex);
1715
1716 /* Set direction of EP0 */
1717 if (likely(ctrl.bRequestType & USB_DIR_IN)) {
1718 ep->bEndpointAddress |= USB_DIR_IN;
1719 is_in = 1;
1720 } else {
1721 ep->bEndpointAddress &= ~USB_DIR_IN;
1722 is_in = 0;
1723 }
1724
1725 dev->req_pending = 1;
1726
1727 /* Handle some SETUP packets ourselves */
1728 switch (ctrl.bRequest) {
1729 case USB_REQ_SET_ADDRESS:
1730 if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE))
1731 break;
1732
1733 DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue);
1734 udc_set_address(dev, ctrl.wValue);
1735 usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR);
1736 return;
1737
1738 case USB_REQ_GET_STATUS:{
1739 if (lh7a40x_handle_get_status(dev, &ctrl) == 0)
1740 return;
1741
1742 case USB_REQ_CLEAR_FEATURE:
1743 case USB_REQ_SET_FEATURE:
1744 if (ctrl.bRequestType == USB_RECIP_ENDPOINT) {
1745 struct lh7a40x_ep *qep;
1746 int ep_num = (ctrl.wIndex & 0x0f);
1747
1748 /* Support only HALT feature */
1749 if (ctrl.wValue != 0 || ctrl.wLength != 0
1750 || ep_num > 3 || ep_num < 1)
1751 break;
1752
1753 qep = &dev->ep[ep_num];
1754 spin_unlock(&dev->lock);
1755 if (ctrl.bRequest == USB_REQ_SET_FEATURE) {
1756 DEBUG_SETUP("SET_FEATURE (%d)\n",
1757 ep_num);
1758 lh7a40x_set_halt(&qep->ep, 1);
1759 } else {
1760 DEBUG_SETUP("CLR_FEATURE (%d)\n",
1761 ep_num);
1762 lh7a40x_set_halt(&qep->ep, 0);
1763 }
1764 spin_lock(&dev->lock);
1765 usb_set_index(0);
1766
1767 /* Reply with a ZLP on next IN token */
1768 usb_set((EP0_CLR_OUT | EP0_DATA_END),
1769 USB_EP0_CSR);
1770 return;
1771 }
1772 break;
1773 }
1774
1775 default:
1776 break;
1777 }
1778
1779 if (likely(dev->driver)) {
1780 /* device-2-host (IN) or no data setup command, process immediately */
1781 spin_unlock(&dev->lock);
1782 i = dev->driver->setup(&dev->gadget, &ctrl);
1783 spin_lock(&dev->lock);
1784
1785 if (i < 0) {
1786 /* setup processing failed, force stall */
1787 DEBUG_SETUP
1788 (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n",
1789 i);
1790 usb_set_index(0);
1791 usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL),
1792 USB_EP0_CSR);
1793
1794 /* ep->stopped = 1; */
1795 dev->ep0state = WAIT_FOR_SETUP;
1796 }
1797 }
1798}
1799
1800/*
1801 * DATA_STATE_NEED_ZLP
1802 */
1803static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr)
1804{
1805 DEBUG_EP0("%s: %x\n", __func__, csr);
1806
1807 /* c.f. Table 15-14 */
1808 usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR);
1809 dev->ep0state = WAIT_FOR_SETUP;
1810}
1811
1812/*
1813 * handle ep0 interrupt
1814 */
1815static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr)
1816{
1817 struct lh7a40x_ep *ep = &dev->ep[0];
1818 u32 csr;
1819
1820 /* Set index 0 */
1821 usb_set_index(0);
1822 csr = usb_read(USB_EP0_CSR);
1823
1824 DEBUG_EP0("%s: csr = %x\n", __func__, csr);
1825
1826 /*
1827 * For overview of what we should be doing see c.f. Chapter 18.1.2.4
1828 * We will follow that outline here modified by our own global state
1829 * indication which provides hints as to what we think should be
1830 * happening..
1831 */
1832
1833 /*
1834 * if SENT_STALL is set
1835 * - clear the SENT_STALL bit
1836 */
1837 if (csr & EP0_SENT_STALL) {
1838 DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr);
1839 usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR);
1840 nuke(ep, -ECONNABORTED);
1841 dev->ep0state = WAIT_FOR_SETUP;
1842 return;
1843 }
1844
1845 /*
1846 * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear
1847 * - fill EP0 FIFO
1848 * - if last packet
1849 * - set IN_PKT_RDY | DATA_END
1850 * - else
1851 * set IN_PKT_RDY
1852 */
1853 if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) {
1854 DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n",
1855 __func__);
1856
1857 switch (dev->ep0state) {
1858 case DATA_STATE_XMIT:
1859 DEBUG_EP0("continue with DATA_STATE_XMIT\n");
1860 lh7a40x_ep0_in(dev, csr);
1861 return;
1862 case DATA_STATE_NEED_ZLP:
1863 DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n");
1864 lh7a40x_ep0_in_zlp(dev, csr);
1865 return;
1866 default:
1867 /* Stall? */
1868 DEBUG_EP0("Odd state!! state = %s\n",
1869 state_names[dev->ep0state]);
1870 dev->ep0state = WAIT_FOR_SETUP;
1871 /* nuke(ep, 0); */
1872 /* usb_set(EP0_SEND_STALL, ep->csr1); */
1873 break;
1874 }
1875 }
1876
1877 /*
1878 * if SETUP_END is set
1879 * - abort the last transfer
1880 * - set SERVICED_SETUP_END_BIT
1881 */
1882 if (csr & EP0_SETUP_END) {
1883 DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr);
1884
1885 usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR);
1886
1887 nuke(ep, 0);
1888 dev->ep0state = WAIT_FOR_SETUP;
1889 }
1890
1891 /*
1892 * if EP0_OUT_PKT_RDY is set
1893 * - read data packet from EP0 FIFO
1894 * - decode command
1895 * - if error
1896 * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL
1897 * - else
1898 * set SERVICED_OUT_PKT_RDY | DATA_END bits
1899 */
1900 if (csr & EP0_OUT_PKT_RDY) {
1901
1902 DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__,
1903 csr);
1904
1905 switch (dev->ep0state) {
1906 case WAIT_FOR_SETUP:
1907 DEBUG_EP0("WAIT_FOR_SETUP\n");
1908 lh7a40x_ep0_setup(dev, csr);
1909 break;
1910
1911 case DATA_STATE_RECV:
1912 DEBUG_EP0("DATA_STATE_RECV\n");
1913 lh7a40x_ep0_out(dev, csr);
1914 break;
1915
1916 default:
1917 /* send stall? */
1918 DEBUG_EP0("strange state!! 2. send stall? state = %d\n",
1919 dev->ep0state);
1920 break;
1921 }
1922 }
1923}
1924
1925static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep)
1926{
1927 u32 csr;
1928
1929 usb_set_index(0);
1930 csr = usb_read(USB_EP0_CSR);
1931
1932 DEBUG_EP0("%s: %x\n", __func__, csr);
1933
1934 /* Clear "out packet ready" */
1935 usb_set(EP0_CLR_OUT, USB_EP0_CSR);
1936
1937 if (ep_is_in(ep)) {
1938 dev->ep0state = DATA_STATE_XMIT;
1939 lh7a40x_ep0_in(dev, csr);
1940 } else {
1941 dev->ep0state = DATA_STATE_RECV;
1942 lh7a40x_ep0_out(dev, csr);
1943 }
1944}
1945
1946/* ---------------------------------------------------------------------------
1947 * device-scoped parts of the api to the usb controller hardware
1948 * ---------------------------------------------------------------------------
1949 */
1950
1951static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget)
1952{
1953 u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */
1954 u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */
1955 DEBUG("%s, %p\n", __func__, _gadget);
1956 return ((frame2 & 0x07) << 8) | (frame1 & 0xff);
1957}
1958
1959static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget)
1960{
1961 /* host may not have enabled remote wakeup */
1962 /*if ((UDCCS0 & UDCCS0_DRWF) == 0)
1963 return -EHOSTUNREACH;
1964 udc_set_mask_UDCCR(UDCCR_RSM); */
1965 return -ENOTSUPP;
1966}
1967
1968static const struct usb_gadget_ops lh7a40x_udc_ops = {
1969 .get_frame = lh7a40x_udc_get_frame,
1970 .wakeup = lh7a40x_udc_wakeup,
1971 /* current versions must always be self-powered */
1972};
1973
1974static void nop_release(struct device *dev)
1975{
1976 DEBUG("%s %s\n", __func__, dev_name(dev));
1977}
1978
1979static struct lh7a40x_udc memory = {
1980 .usb_address = 0,
1981
1982 .gadget = {
1983 .ops = &lh7a40x_udc_ops,
1984 .ep0 = &memory.ep[0].ep,
1985 .name = driver_name,
1986 .dev = {
1987 .init_name = "gadget",
1988 .release = nop_release,
1989 },
1990 },
1991
1992 /* control endpoint */
1993 .ep[0] = {
1994 .ep = {
1995 .name = ep0name,
1996 .ops = &lh7a40x_ep_ops,
1997 .maxpacket = EP0_PACKETSIZE,
1998 },
1999 .dev = &memory,
2000
2001 .bEndpointAddress = 0,
2002 .bmAttributes = 0,
2003
2004 .ep_type = ep_control,
2005 .fifo = io_p2v(USB_EP0_FIFO),
2006 .csr1 = USB_EP0_CSR,
2007 .csr2 = USB_EP0_CSR,
2008 },
2009
2010 /* first group of endpoints */
2011 .ep[1] = {
2012 .ep = {
2013 .name = "ep1in-bulk",
2014 .ops = &lh7a40x_ep_ops,
2015 .maxpacket = 64,
2016 },
2017 .dev = &memory,
2018
2019 .bEndpointAddress = USB_DIR_IN | 1,
2020 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2021
2022 .ep_type = ep_bulk_in,
2023 .fifo = io_p2v(USB_EP1_FIFO),
2024 .csr1 = USB_IN_CSR1,
2025 .csr2 = USB_IN_CSR2,
2026 },
2027
2028 .ep[2] = {
2029 .ep = {
2030 .name = "ep2out-bulk",
2031 .ops = &lh7a40x_ep_ops,
2032 .maxpacket = 64,
2033 },
2034 .dev = &memory,
2035
2036 .bEndpointAddress = 2,
2037 .bmAttributes = USB_ENDPOINT_XFER_BULK,
2038
2039 .ep_type = ep_bulk_out,
2040 .fifo = io_p2v(USB_EP2_FIFO),
2041 .csr1 = USB_OUT_CSR1,
2042 .csr2 = USB_OUT_CSR2,
2043 },
2044
2045 .ep[3] = {
2046 .ep = {
2047 .name = "ep3in-int",
2048 .ops = &lh7a40x_ep_ops,
2049 .maxpacket = 64,
2050 },
2051 .dev = &memory,
2052
2053 .bEndpointAddress = USB_DIR_IN | 3,
2054 .bmAttributes = USB_ENDPOINT_XFER_INT,
2055
2056 .ep_type = ep_interrupt,
2057 .fifo = io_p2v(USB_EP3_FIFO),
2058 .csr1 = USB_IN_CSR1,
2059 .csr2 = USB_IN_CSR2,
2060 },
2061};
2062
2063/*
2064 * probe - binds to the platform device
2065 */
2066static int lh7a40x_udc_probe(struct platform_device *pdev)
2067{
2068 struct lh7a40x_udc *dev = &memory;
2069 int retval;
2070
2071 DEBUG("%s: %p\n", __func__, pdev);
2072
2073 spin_lock_init(&dev->lock);
2074 dev->dev = &pdev->dev;
2075
2076 device_initialize(&dev->gadget.dev);
2077 dev->gadget.dev.parent = &pdev->dev;
2078
2079 the_controller = dev;
2080 platform_set_drvdata(pdev, dev);
2081
2082 udc_disable(dev);
2083 udc_reinit(dev);
2084
2085 /* irq setup after old hardware state is cleaned up */
2086 retval =
2087 request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name,
2088 dev);
2089 if (retval != 0) {
2090 DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name,
2091 IRQ_USBINTR, retval);
2092 return -EBUSY;
2093 }
2094
2095 create_proc_files();
2096
2097 return retval;
2098}
2099
2100static int lh7a40x_udc_remove(struct platform_device *pdev)
2101{
2102 struct lh7a40x_udc *dev = platform_get_drvdata(pdev);
2103
2104 DEBUG("%s: %p\n", __func__, pdev);
2105
2106 if (dev->driver)
2107 return -EBUSY;
2108
2109 udc_disable(dev);
2110 remove_proc_files();
2111
2112 free_irq(IRQ_USBINTR, dev);
2113
2114 platform_set_drvdata(pdev, 0);
2115
2116 the_controller = 0;
2117
2118 return 0;
2119}
2120
2121/*-------------------------------------------------------------------------*/
2122
2123static struct platform_driver udc_driver = {
2124 .probe = lh7a40x_udc_probe,
2125 .remove = lh7a40x_udc_remove,
2126 /* FIXME power management support */
2127 /* .suspend = ... disable UDC */
2128 /* .resume = ... re-enable UDC */
2129 .driver = {
2130 .name = (char *)driver_name,
2131 .owner = THIS_MODULE,
2132 },
2133};
2134
2135static int __init udc_init(void)
2136{
2137 DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION);
2138 return platform_driver_register(&udc_driver);
2139}
2140
2141static void __exit udc_exit(void)
2142{
2143 platform_driver_unregister(&udc_driver);
2144}
2145
2146module_init(udc_init);
2147module_exit(udc_exit);
2148
2149MODULE_DESCRIPTION(DRIVER_DESC);
2150MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen");
2151MODULE_LICENSE("GPL");
2152MODULE_ALIAS("platform:lh7a40x_udc");
diff --git a/drivers/usb/gadget/lh7a40x_udc.h b/drivers/usb/gadget/lh7a40x_udc.h
deleted file mode 100644
index ca861203a30..00000000000
--- a/drivers/usb/gadget/lh7a40x_udc.h
+++ /dev/null
@@ -1,259 +0,0 @@
1/*
2 * linux/drivers/usb/gadget/lh7a40x_udc.h
3 * Sharp LH7A40x on-chip full speed USB device controllers
4 *
5 * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID
6 * Copyright (C) 2004 Bo Henriksen, Nordic ID
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 *
22 */
23
24#ifndef __LH7A40X_H_
25#define __LH7A40X_H_
26
27#include <linux/module.h>
28#include <linux/kernel.h>
29#include <linux/ioport.h>
30#include <linux/types.h>
31#include <linux/errno.h>
32#include <linux/delay.h>
33#include <linux/sched.h>
34#include <linux/slab.h>
35#include <linux/init.h>
36#include <linux/timer.h>
37#include <linux/list.h>
38#include <linux/interrupt.h>
39#include <linux/proc_fs.h>
40#include <linux/mm.h>
41#include <linux/device.h>
42#include <linux/dma-mapping.h>
43
44#include <asm/byteorder.h>
45#include <asm/dma.h>
46#include <asm/io.h>
47#include <asm/irq.h>
48#include <asm/system.h>
49#include <asm/unaligned.h>
50#include <mach/hardware.h>
51
52#include <linux/usb/ch9.h>
53#include <linux/usb/gadget.h>
54
55/*
56 * Memory map
57 */
58
59#define USB_FA 0x80000200 // function address register
60#define USB_PM 0x80000204 // power management register
61
62#define USB_IN_INT 0x80000208 // IN interrupt register bank (EP0-EP3)
63#define USB_OUT_INT 0x80000210 // OUT interrupt register bank (EP2)
64#define USB_INT 0x80000218 // interrupt register bank
65
66#define USB_IN_INT_EN 0x8000021C // IN interrupt enable register bank
67#define USB_OUT_INT_EN 0x80000224 // OUT interrupt enable register bank
68#define USB_INT_EN 0x8000022C // USB interrupt enable register bank
69
70#define USB_FRM_NUM1 0x80000230 // Frame number1 register
71#define USB_FRM_NUM2 0x80000234 // Frame number2 register
72#define USB_INDEX 0x80000238 // index register
73
74#define USB_IN_MAXP 0x80000240 // IN MAXP register
75#define USB_IN_CSR1 0x80000244 // IN CSR1 register/EP0 CSR register
76#define USB_EP0_CSR 0x80000244 // IN CSR1 register/EP0 CSR register
77#define USB_IN_CSR2 0x80000248 // IN CSR2 register
78#define USB_OUT_MAXP 0x8000024C // OUT MAXP register
79
80#define USB_OUT_CSR1 0x80000250 // OUT CSR1 register
81#define USB_OUT_CSR2 0x80000254 // OUT CSR2 register
82#define USB_OUT_FIFO_WC1 0x80000258 // OUT FIFO write count1 register
83#define USB_OUT_FIFO_WC2 0x8000025C // OUT FIFO write count2 register
84
85#define USB_RESET 0x8000044C // USB reset register
86
87#define USB_EP0_FIFO 0x80000280
88#define USB_EP1_FIFO 0x80000284
89#define USB_EP2_FIFO 0x80000288
90#define USB_EP3_FIFO 0x8000028c
91
92/*
93 * USB reset register
94 */
95#define USB_RESET_APB (1<<1) //resets USB APB control side WRITE
96#define USB_RESET_IO (1<<0) //resets USB IO side WRITE
97
98/*
99 * USB function address register
100 */
101#define USB_FA_ADDR_UPDATE (1<<7)
102#define USB_FA_FUNCTION_ADDR (0x7F)
103
104/*
105 * Power Management register
106 */
107#define PM_USB_DCP (1<<5)
108#define PM_USB_ENABLE (1<<4)
109#define PM_USB_RESET (1<<3)
110#define PM_UC_RESUME (1<<2)
111#define PM_SUSPEND_MODE (1<<1)
112#define PM_ENABLE_SUSPEND (1<<0)
113
114/*
115 * IN interrupt register
116 */
117#define USB_IN_INT_EP3 (1<<3)
118#define USB_IN_INT_EP1 (1<<1)
119#define USB_IN_INT_EP0 (1<<0)
120
121/*
122 * OUT interrupt register
123 */
124#define USB_OUT_INT_EP2 (1<<2)
125
126/*
127 * USB interrupt register
128 */
129#define USB_INT_RESET_INT (1<<2)
130#define USB_INT_RESUME_INT (1<<1)
131#define USB_INT_SUSPEND_INT (1<<0)
132
133/*
134 * USB interrupt enable register
135 */
136#define USB_INT_EN_USB_RESET_INTER (1<<2)
137#define USB_INT_EN_RESUME_INTER (1<<1)
138#define USB_INT_EN_SUSPEND_INTER (1<<0)
139
140/*
141 * INCSR1 register
142 */
143#define USB_IN_CSR1_CLR_DATA_TOGGLE (1<<6)
144#define USB_IN_CSR1_SENT_STALL (1<<5)
145#define USB_IN_CSR1_SEND_STALL (1<<4)
146#define USB_IN_CSR1_FIFO_FLUSH (1<<3)
147#define USB_IN_CSR1_FIFO_NOT_EMPTY (1<<1)
148#define USB_IN_CSR1_IN_PKT_RDY (1<<0)
149
150/*
151 * INCSR2 register
152 */
153#define USB_IN_CSR2_AUTO_SET (1<<7)
154#define USB_IN_CSR2_USB_DMA_EN (1<<4)
155
156/*
157 * OUT CSR1 register
158 */
159#define USB_OUT_CSR1_CLR_DATA_REG (1<<7)
160#define USB_OUT_CSR1_SENT_STALL (1<<6)
161#define USB_OUT_CSR1_SEND_STALL (1<<5)
162#define USB_OUT_CSR1_FIFO_FLUSH (1<<4)
163#define USB_OUT_CSR1_FIFO_FULL (1<<1)
164#define USB_OUT_CSR1_OUT_PKT_RDY (1<<0)
165
166/*
167 * OUT CSR2 register
168 */
169#define USB_OUT_CSR2_AUTO_CLR (1<<7)
170#define USB_OUT_CSR2_USB_DMA_EN (1<<4)
171
172/*
173 * EP0 CSR
174 */
175#define EP0_CLR_SETUP_END (1<<7) /* Clear "Setup Ends" Bit (w) */
176#define EP0_CLR_OUT (1<<6) /* Clear "Out packet ready" Bit (w) */
177#define EP0_SEND_STALL (1<<5) /* Send STALL Handshake (rw) */
178#define EP0_SETUP_END (1<<4) /* Setup Ends (r) */
179
180#define EP0_DATA_END (1<<3) /* Data end (rw) */
181#define EP0_SENT_STALL (1<<2) /* Sent Stall Handshake (r) */
182#define EP0_IN_PKT_RDY (1<<1) /* In packet ready (rw) */
183#define EP0_OUT_PKT_RDY (1<<0) /* Out packet ready (r) */
184
185/* general CSR */
186#define OUT_PKT_RDY (1<<0)
187#define IN_PKT_RDY (1<<0)
188
189/*
190 * IN/OUT MAXP register
191 */
192#define USB_OUT_MAXP_MAXP (0xF)
193#define USB_IN_MAXP_MAXP (0xF)
194
195// Max packet size
196//#define EP0_PACKETSIZE 0x10
197#define EP0_PACKETSIZE 0x8
198#define EP0_MAXPACKETSIZE 0x10
199
200#define UDC_MAX_ENDPOINTS 4
201
202#define WAIT_FOR_SETUP 0
203#define DATA_STATE_XMIT 1
204#define DATA_STATE_NEED_ZLP 2
205#define WAIT_FOR_OUT_STATUS 3
206#define DATA_STATE_RECV 4
207
208/* ********************************************************************************************* */
209/* IO
210 */
211
212typedef enum ep_type {
213 ep_control, ep_bulk_in, ep_bulk_out, ep_interrupt
214} ep_type_t;
215
216struct lh7a40x_ep {
217 struct usb_ep ep;
218 struct lh7a40x_udc *dev;
219
220 const struct usb_endpoint_descriptor *desc;
221 struct list_head queue;
222 unsigned long pio_irqs;
223
224 u8 stopped;
225 u8 bEndpointAddress;
226 u8 bmAttributes;
227
228 ep_type_t ep_type;
229 u32 fifo;
230 u32 csr1;
231 u32 csr2;
232};
233
234struct lh7a40x_request {
235 struct usb_request req;
236 struct list_head queue;
237};
238
239struct lh7a40x_udc {
240 struct usb_gadget gadget;
241 struct usb_gadget_driver *driver;
242 struct device *dev;
243 spinlock_t lock;
244
245 int ep0state;
246 struct lh7a40x_ep ep[UDC_MAX_ENDPOINTS];
247
248 unsigned char usb_address;
249
250 unsigned req_pending:1, req_std:1, req_config:1;
251};
252
253extern struct lh7a40x_udc *the_controller;
254
255#define ep_is_in(EP) (((EP)->bEndpointAddress&USB_DIR_IN)==USB_DIR_IN)
256#define ep_index(EP) ((EP)->bEndpointAddress&0xF)
257#define ep_maxpacket(EP) ((EP)->ep.maxpacket)
258
259#endif
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index f4062bba9d0..e7288639edb 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1014,11 +1014,6 @@ MODULE_LICENSE ("GPL");
1014#define OMAP3_PLATFORM_DRIVER ohci_hcd_omap3_driver 1014#define OMAP3_PLATFORM_DRIVER ohci_hcd_omap3_driver
1015#endif 1015#endif
1016 1016
1017#ifdef CONFIG_ARCH_LH7A404
1018#include "ohci-lh7a404.c"
1019#define PLATFORM_DRIVER ohci_hcd_lh7a404_driver
1020#endif
1021
1022#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx) 1017#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
1023#include "ohci-pxa27x.c" 1018#include "ohci-pxa27x.c"
1024#define PLATFORM_DRIVER ohci_hcd_pxa27x_driver 1019#define PLATFORM_DRIVER ohci_hcd_pxa27x_driver
diff --git a/drivers/usb/host/ohci-lh7a404.c b/drivers/usb/host/ohci-lh7a404.c
deleted file mode 100644
index 18d39f0463e..00000000000
--- a/drivers/usb/host/ohci-lh7a404.c
+++ /dev/null
@@ -1,252 +0,0 @@
1/*
2 * OHCI HCD (Host Controller Driver) for USB.
3 *
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
6 * (C) Copyright 2002 Hewlett-Packard Company
7 *
8 * Bus Glue for Sharp LH7A404
9 *
10 * Written by Christopher Hoover <ch@hpl.hp.com>
11 * Based on fragments of previous driver by Russell King et al.
12 *
13 * Modified for LH7A404 from ohci-sa1111.c
14 * by Durgesh Pattamatta <pattamattad@sharpsec.com>
15 *
16 * This file is licenced under the GPL.
17 */
18
19#include <linux/platform_device.h>
20#include <linux/signal.h>
21
22#include <mach/hardware.h>
23
24
25extern int usb_disabled(void);
26
27/*-------------------------------------------------------------------------*/
28
29static void lh7a404_start_hc(struct platform_device *dev)
30{
31 printk(KERN_DEBUG "%s: starting LH7A404 OHCI USB Controller\n",
32 __FILE__);
33
34 /*
35 * Now, carefully enable the USB clock, and take
36 * the USB host controller out of reset.
37 */
38 CSC_PWRCNT |= CSC_PWRCNT_USBH_EN; /* Enable clock */
39 udelay(1000);
40 USBH_CMDSTATUS = OHCI_HCR;
41
42 printk(KERN_DEBUG "%s: Clock to USB host has been enabled \n", __FILE__);
43}
44
45static void lh7a404_stop_hc(struct platform_device *dev)
46{
47 printk(KERN_DEBUG "%s: stopping LH7A404 OHCI USB Controller\n",
48 __FILE__);
49
50 CSC_PWRCNT &= ~CSC_PWRCNT_USBH_EN; /* Disable clock */
51}
52
53
54/*-------------------------------------------------------------------------*/
55
56/* configure so an HC device and id are always provided */
57/* always called with process context; sleeping is OK */
58
59
60/**
61 * usb_hcd_lh7a404_probe - initialize LH7A404-based HCDs
62 * Context: !in_interrupt()
63 *
64 * Allocates basic resources for this USB host controller, and
65 * then invokes the start() method for the HCD associated with it
66 * through the hotplug entry's driver_data.
67 *
68 */
69int usb_hcd_lh7a404_probe (const struct hc_driver *driver,
70 struct platform_device *dev)
71{
72 int retval;
73 struct usb_hcd *hcd;
74
75 if (dev->resource[1].flags != IORESOURCE_IRQ) {
76 pr_debug("resource[1] is not IORESOURCE_IRQ");
77 return -ENOMEM;
78 }
79
80 hcd = usb_create_hcd(driver, &dev->dev, "lh7a404");
81 if (!hcd)
82 return -ENOMEM;
83 hcd->rsrc_start = dev->resource[0].start;
84 hcd->rsrc_len = dev->resource[0].end - dev->resource[0].start + 1;
85
86 if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
87 pr_debug("request_mem_region failed");
88 retval = -EBUSY;
89 goto err1;
90 }
91
92 hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
93 if (!hcd->regs) {
94 pr_debug("ioremap failed");
95 retval = -ENOMEM;
96 goto err2;
97 }
98
99 lh7a404_start_hc(dev);
100 ohci_hcd_init(hcd_to_ohci(hcd));
101
102 retval = usb_add_hcd(hcd, dev->resource[1].start, IRQF_DISABLED);
103 if (retval == 0)
104 return retval;
105
106 lh7a404_stop_hc(dev);
107 iounmap(hcd->regs);
108 err2:
109 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
110 err1:
111 usb_put_hcd(hcd);
112 return retval;
113}
114
115
116/* may be called without controller electrically present */
117/* may be called with controller, bus, and devices active */
118
119/**
120 * usb_hcd_lh7a404_remove - shutdown processing for LH7A404-based HCDs
121 * @dev: USB Host Controller being removed
122 * Context: !in_interrupt()
123 *
124 * Reverses the effect of usb_hcd_lh7a404_probe(), first invoking
125 * the HCD's stop() method. It is always called from a thread
126 * context, normally "rmmod", "apmd", or something similar.
127 *
128 */
129void usb_hcd_lh7a404_remove (struct usb_hcd *hcd, struct platform_device *dev)
130{
131 usb_remove_hcd(hcd);
132 lh7a404_stop_hc(dev);
133 iounmap(hcd->regs);
134 release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
135 usb_put_hcd(hcd);
136}
137
138/*-------------------------------------------------------------------------*/
139
140static int __devinit
141ohci_lh7a404_start (struct usb_hcd *hcd)
142{
143 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
144 int ret;
145
146 ohci_dbg (ohci, "ohci_lh7a404_start, ohci:%p", ohci);
147 if ((ret = ohci_init(ohci)) < 0)
148 return ret;
149
150 if ((ret = ohci_run (ohci)) < 0) {
151 err ("can't start %s", hcd->self.bus_name);
152 ohci_stop (hcd);
153 return ret;
154 }
155 return 0;
156}
157
158/*-------------------------------------------------------------------------*/
159
160static const struct hc_driver ohci_lh7a404_hc_driver = {
161 .description = hcd_name,
162 .product_desc = "LH7A404 OHCI",
163 .hcd_priv_size = sizeof(struct ohci_hcd),
164
165 /*
166 * generic hardware linkage
167 */
168 .irq = ohci_irq,
169 .flags = HCD_USB11 | HCD_MEMORY,
170
171 /*
172 * basic lifecycle operations
173 */
174 .start = ohci_lh7a404_start,
175 .stop = ohci_stop,
176 .shutdown = ohci_shutdown,
177
178 /*
179 * managing i/o requests and associated device resources
180 */
181 .urb_enqueue = ohci_urb_enqueue,
182 .urb_dequeue = ohci_urb_dequeue,
183 .endpoint_disable = ohci_endpoint_disable,
184
185 /*
186 * scheduling support
187 */
188 .get_frame_number = ohci_get_frame,
189
190 /*
191 * root hub support
192 */
193 .hub_status_data = ohci_hub_status_data,
194 .hub_control = ohci_hub_control,
195#ifdef CONFIG_PM
196 .bus_suspend = ohci_bus_suspend,
197 .bus_resume = ohci_bus_resume,
198#endif
199 .start_port_reset = ohci_start_port_reset,
200};
201
202/*-------------------------------------------------------------------------*/
203
204static int ohci_hcd_lh7a404_drv_probe(struct platform_device *pdev)
205{
206 int ret;
207
208 pr_debug ("In ohci_hcd_lh7a404_drv_probe");
209
210 if (usb_disabled())
211 return -ENODEV;
212
213 ret = usb_hcd_lh7a404_probe(&ohci_lh7a404_hc_driver, pdev);
214 return ret;
215}
216
217static int ohci_hcd_lh7a404_drv_remove(struct platform_device *pdev)
218{
219 struct usb_hcd *hcd = platform_get_drvdata(pdev);
220
221 usb_hcd_lh7a404_remove(hcd, pdev);
222 return 0;
223}
224 /*TBD*/
225/*static int ohci_hcd_lh7a404_drv_suspend(struct platform_device *dev)
226{
227 struct usb_hcd *hcd = platform_get_drvdata(dev);
228
229 return 0;
230}
231static int ohci_hcd_lh7a404_drv_resume(struct platform_device *dev)
232{
233 struct usb_hcd *hcd = platform_get_drvdata(dev);
234
235
236 return 0;
237}
238*/
239
240static struct platform_driver ohci_hcd_lh7a404_driver = {
241 .probe = ohci_hcd_lh7a404_drv_probe,
242 .remove = ohci_hcd_lh7a404_drv_remove,
243 .shutdown = usb_hcd_platform_shutdown,
244 /*.suspend = ohci_hcd_lh7a404_drv_suspend, */
245 /*.resume = ohci_hcd_lh7a404_drv_resume, */
246 .driver = {
247 .name = "lh7a404-ohci",
248 .owner = THIS_MODULE,
249 },
250};
251
252MODULE_ALIAS("platform:lh7a404-ohci");
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index bad11a72c20..35e5fd640ce 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -575,18 +575,8 @@ static inline void _ohci_writel (const struct ohci_hcd *ohci,
575#endif 575#endif
576} 576}
577 577
578#ifdef CONFIG_ARCH_LH7A404
579/* Marc Singer: at the time this code was written, the LH7A404
580 * had a problem reading the USB host registers. This
581 * implementation of the ohci_readl function performs the read
582 * twice as a work-around.
583 */
584#define ohci_readl(o,r) (_ohci_readl(o,r),_ohci_readl(o,r))
585#define ohci_writel(o,v,r) _ohci_writel(o,v,r)
586#else
587#define ohci_readl(o,r) _ohci_readl(o,r) 578#define ohci_readl(o,r) _ohci_readl(o,r)
588#define ohci_writel(o,v,r) _ohci_writel(o,v,r) 579#define ohci_writel(o,v,r) _ohci_writel(o,v,r)
589#endif
590 580
591 581
592/*-------------------------------------------------------------------------*/ 582/*-------------------------------------------------------------------------*/
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 6bafb51bb43..b57bc273b18 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -322,69 +322,6 @@ config FB_ARMCLCD
322 here and read <file:Documentation/kbuild/modules.txt>. The module 322 here and read <file:Documentation/kbuild/modules.txt>. The module
323 will be called amba-clcd. 323 will be called amba-clcd.
324 324
325choice
326
327 depends on FB_ARMCLCD && (ARCH_LH7A40X || ARCH_LH7952X)
328 prompt "LCD Panel"
329 default FB_ARMCLCD_SHARP_LQ035Q7DB02
330
331config FB_ARMCLCD_SHARP_LQ035Q7DB02_HRTFT
332 bool "LogicPD LCD 3.5\" QVGA w/HRTFT IC"
333 help
334 This is an implementation of the Sharp LQ035Q7DB02, a 3.5"
335 color QVGA, HRTFT panel. The LogicPD device includes
336 an integrated HRTFT controller IC.
337 The native resolution is 240x320.
338
339config FB_ARMCLCD_SHARP_LQ057Q3DC02
340 bool "LogicPD LCD 5.7\" QVGA"
341 help
342 This is an implementation of the Sharp LQ057Q3DC02, a 5.7"
343 color QVGA, TFT panel. The LogicPD device includes an
344 The native resolution is 320x240.
345
346config FB_ARMCLCD_SHARP_LQ64D343
347 bool "LogicPD LCD 6.4\" VGA"
348 help
349 This is an implementation of the Sharp LQ64D343, a 6.4"
350 color VGA, TFT panel. The LogicPD device includes an
351 The native resolution is 640x480.
352
353config FB_ARMCLCD_SHARP_LQ10D368
354 bool "LogicPD LCD 10.4\" VGA"
355 help
356 This is an implementation of the Sharp LQ10D368, a 10.4"
357 color VGA, TFT panel. The LogicPD device includes an
358 The native resolution is 640x480.
359
360
361config FB_ARMCLCD_SHARP_LQ121S1DG41
362 bool "LogicPD LCD 12.1\" SVGA"
363 help
364 This is an implementation of the Sharp LQ121S1DG41, a 12.1"
365 color SVGA, TFT panel. The LogicPD device includes an
366 The native resolution is 800x600.
367
368 This panel requires a clock rate may be an integer fraction
369 of the base LCDCLK frequency. The driver will select the
370 highest frequency available that is lower than the maximum
371 allowed. The panel may flicker if the clock rate is
372 slower than the recommended minimum.
373
374config FB_ARMCLCD_AUO_A070VW01_WIDE
375 bool "AU Optronics A070VW01 LCD 7.0\" WIDE"
376 help
377 This is an implementation of the AU Optronics, a 7.0"
378 WIDE Color. The native resolution is 234x480.
379
380config FB_ARMCLCD_HITACHI
381 bool "Hitachi Wide Screen 800x480"
382 help
383 This is an implementation of the Hitachi 800x480.
384
385endchoice
386
387
388config FB_ACORN 325config FB_ACORN
389 bool "Acorn VIDC support" 326 bool "Acorn VIDC support"
390 depends on (FB = y) && ARM && ARCH_ACORN 327 depends on (FB = y) && ARM && ARCH_ACORN
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-02 22:40:00 -0500