aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/video/via/viamode.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/video/via/viamode.c')
-rw-r--r--drivers/video/via/viamode.c322
1 files changed, 121 insertions, 201 deletions
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index 81274890fc2..8c5bc41ff6a 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -21,72 +21,6 @@
21 21
22#include <linux/via-core.h> 22#include <linux/via-core.h>
23#include "global.h" 23#include "global.h"
24struct res_map_refresh res_map_refresh_tbl[] = {
25/*hres, vres, vclock, vmode_refresh*/
26 {480, 640, RES_480X640_60HZ_PIXCLOCK, 60},
27 {640, 480, RES_640X480_60HZ_PIXCLOCK, 60},
28 {640, 480, RES_640X480_75HZ_PIXCLOCK, 75},
29 {640, 480, RES_640X480_85HZ_PIXCLOCK, 85},
30 {640, 480, RES_640X480_100HZ_PIXCLOCK, 100},
31 {640, 480, RES_640X480_120HZ_PIXCLOCK, 120},
32 {720, 480, RES_720X480_60HZ_PIXCLOCK, 60},
33 {720, 576, RES_720X576_60HZ_PIXCLOCK, 60},
34 {800, 480, RES_800X480_60HZ_PIXCLOCK, 60},
35 {800, 600, RES_800X600_60HZ_PIXCLOCK, 60},
36 {800, 600, RES_800X600_75HZ_PIXCLOCK, 75},
37 {800, 600, RES_800X600_85HZ_PIXCLOCK, 85},
38 {800, 600, RES_800X600_100HZ_PIXCLOCK, 100},
39 {800, 600, RES_800X600_120HZ_PIXCLOCK, 120},
40 {848, 480, RES_848X480_60HZ_PIXCLOCK, 60},
41 {856, 480, RES_856X480_60HZ_PIXCLOCK, 60},
42 {1024, 512, RES_1024X512_60HZ_PIXCLOCK, 60},
43 {1024, 600, RES_1024X600_60HZ_PIXCLOCK, 60},
44 {1024, 768, RES_1024X768_60HZ_PIXCLOCK, 60},
45 {1024, 768, RES_1024X768_75HZ_PIXCLOCK, 75},
46 {1024, 768, RES_1024X768_85HZ_PIXCLOCK, 85},
47 {1024, 768, RES_1024X768_100HZ_PIXCLOCK, 100},
48/* {1152,864, RES_1152X864_70HZ_PIXCLOCK, 70},*/
49 {1152, 864, RES_1152X864_75HZ_PIXCLOCK, 75},
50 {1280, 768, RES_1280X768_60HZ_PIXCLOCK, 60},
51 {1280, 800, RES_1280X800_60HZ_PIXCLOCK, 60},
52 {1280, 960, RES_1280X960_60HZ_PIXCLOCK, 60},
53 {1280, 1024, RES_1280X1024_60HZ_PIXCLOCK, 60},
54 {1280, 1024, RES_1280X1024_75HZ_PIXCLOCK, 75},
55 {1280, 1024, RES_1280X768_85HZ_PIXCLOCK, 85},
56 {1440, 1050, RES_1440X1050_60HZ_PIXCLOCK, 60},
57 {1600, 1200, RES_1600X1200_60HZ_PIXCLOCK, 60},
58 {1600, 1200, RES_1600X1200_75HZ_PIXCLOCK, 75},
59 {1280, 720, RES_1280X720_60HZ_PIXCLOCK, 60},
60 {1920, 1080, RES_1920X1080_60HZ_PIXCLOCK, 60},
61 {1400, 1050, RES_1400X1050_60HZ_PIXCLOCK, 60},
62 {1400, 1050, RES_1400X1050_75HZ_PIXCLOCK, 75},
63 {1368, 768, RES_1368X768_60HZ_PIXCLOCK, 60},
64 {960, 600, RES_960X600_60HZ_PIXCLOCK, 60},
65 {1000, 600, RES_1000X600_60HZ_PIXCLOCK, 60},
66 {1024, 576, RES_1024X576_60HZ_PIXCLOCK, 60},
67 {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
68 {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
69 {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
70 {1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60},
71 {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
72 {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
73 {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
74 {1360, 768, RES_1360X768_60HZ_PIXCLOCK, 60},
75 {1366, 768, RES_1366X768_50HZ_PIXCLOCK, 50},
76 {1366, 768, RES_1366X768_60HZ_PIXCLOCK, 60},
77 {1440, 900, RES_1440X900_60HZ_PIXCLOCK, 60},
78 {1440, 900, RES_1440X900_75HZ_PIXCLOCK, 75},
79 {1600, 900, RES_1600X900_60HZ_PIXCLOCK, 60},
80 {1600, 1024, RES_1600X1024_60HZ_PIXCLOCK, 60},
81 {1680, 1050, RES_1680X1050_60HZ_PIXCLOCK, 60},
82 {1680, 1050, RES_1680X1050_75HZ_PIXCLOCK, 75},
83 {1792, 1344, RES_1792X1344_60HZ_PIXCLOCK, 60},
84 {1856, 1392, RES_1856X1392_60HZ_PIXCLOCK, 60},
85 {1920, 1200, RES_1920X1200_60HZ_PIXCLOCK, 60},
86 {1920, 1440, RES_1920X1440_60HZ_PIXCLOCK, 60},
87 {1920, 1440, RES_1920X1440_75HZ_PIXCLOCK, 75},
88 {2048, 1536, RES_2048X1536_60HZ_PIXCLOCK, 60}
89};
90 24
91struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01}, 25struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
92{VIASR, SR15, 0x02, 0x02}, 26{VIASR, SR15, 0x02, 0x02},
@@ -359,327 +293,320 @@ struct VPITTable VPIT = {
359 293
360/* 480x640 */ 294/* 480x640 */
361static struct crt_mode_table CRTM480x640[] = { 295static struct crt_mode_table CRTM480x640[] = {
362 /* r_rate, vclk, hsp, vsp */ 296 /* r_rate, hsp, vsp */
363 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 297 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
364 {REFRESH_60, CLK_25_175M, M480X640_R60_HSP, M480X640_R60_VSP, 298 {REFRESH_60, M480X640_R60_HSP, M480X640_R60_VSP,
365 {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} } /* GTF*/ 299 {624, 480, 480, 144, 504, 48, 663, 640, 640, 23, 641, 3} } /* GTF*/
366}; 300};
367 301
368/* 640x480*/ 302/* 640x480*/
369static struct crt_mode_table CRTM640x480[] = { 303static struct crt_mode_table CRTM640x480[] = {
370 /*r_rate,vclk,hsp,vsp */ 304 /*r_rate,hsp,vsp */
371 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 305 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
372 {REFRESH_60, CLK_25_175M, M640X480_R60_HSP, M640X480_R60_VSP, 306 {REFRESH_60, M640X480_R60_HSP, M640X480_R60_VSP,
373 {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} }, 307 {800, 640, 648, 144, 656, 96, 525, 480, 480, 45, 490, 2} },
374 {REFRESH_75, CLK_31_500M, M640X480_R75_HSP, M640X480_R75_VSP, 308 {REFRESH_75, M640X480_R75_HSP, M640X480_R75_VSP,
375 {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} }, 309 {840, 640, 640, 200, 656, 64, 500, 480, 480, 20, 481, 3} },
376 {REFRESH_85, CLK_36_000M, M640X480_R85_HSP, M640X480_R85_VSP, 310 {REFRESH_85, M640X480_R85_HSP, M640X480_R85_VSP,
377 {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} }, 311 {832, 640, 640, 192, 696, 56, 509, 480, 480, 29, 481, 3} },
378 {REFRESH_100, CLK_43_163M, M640X480_R100_HSP, M640X480_R100_VSP, 312 {REFRESH_100, M640X480_R100_HSP, M640X480_R100_VSP,
379 {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/ 313 {848, 640, 640, 208, 680, 64, 509, 480, 480, 29, 481, 3} }, /*GTF*/
380 {REFRESH_120, CLK_52_406M, M640X480_R120_HSP, 314 {REFRESH_120, M640X480_R120_HSP, M640X480_R120_VSP,
381 M640X480_R120_VSP, 315 {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481, 3} } /*GTF*/
382 {848, 640, 640, 208, 680, 64, 515, 480, 480, 35, 481,
383 3} } /*GTF*/
384}; 316};
385 317
386/*720x480 (GTF)*/ 318/*720x480 (GTF)*/
387static struct crt_mode_table CRTM720x480[] = { 319static struct crt_mode_table CRTM720x480[] = {
388 /*r_rate,vclk,hsp,vsp */ 320 /*r_rate,hsp,vsp */
389 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 321 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
390 {REFRESH_60, CLK_26_880M, M720X480_R60_HSP, M720X480_R60_VSP, 322 {REFRESH_60, M720X480_R60_HSP, M720X480_R60_VSP,
391 {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} } 323 {896, 720, 720, 176, 736, 72, 497, 480, 480, 17, 481, 3} }
392 324
393}; 325};
394 326
395/*720x576 (GTF)*/ 327/*720x576 (GTF)*/
396static struct crt_mode_table CRTM720x576[] = { 328static struct crt_mode_table CRTM720x576[] = {
397 /*r_rate,vclk,hsp,vsp */ 329 /*r_rate,hsp,vsp */
398 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 330 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
399 {REFRESH_60, CLK_32_668M, M720X576_R60_HSP, M720X576_R60_VSP, 331 {REFRESH_60, M720X576_R60_HSP, M720X576_R60_VSP,
400 {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} } 332 {912, 720, 720, 192, 744, 72, 597, 576, 576, 21, 577, 3} }
401}; 333};
402 334
403/* 800x480 (CVT) */ 335/* 800x480 (CVT) */
404static struct crt_mode_table CRTM800x480[] = { 336static struct crt_mode_table CRTM800x480[] = {
405 /* r_rate, vclk, hsp, vsp */ 337 /* r_rate, hsp, vsp */
406 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 338 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
407 {REFRESH_60, CLK_29_581M, M800X480_R60_HSP, M800X480_R60_VSP, 339 {REFRESH_60, M800X480_R60_HSP, M800X480_R60_VSP,
408 {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} } 340 {992, 800, 800, 192, 824, 72, 500, 480, 480, 20, 483, 7} }
409}; 341};
410 342
411/* 800x600*/ 343/* 800x600*/
412static struct crt_mode_table CRTM800x600[] = { 344static struct crt_mode_table CRTM800x600[] = {
413 /*r_rate,vclk,hsp,vsp */ 345 /*r_rate,hsp,vsp */
414 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 346 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
415 {REFRESH_60, CLK_40_000M, M800X600_R60_HSP, M800X600_R60_VSP, 347 {REFRESH_60, M800X600_R60_HSP, M800X600_R60_VSP,
416 {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} }, 348 {1056, 800, 800, 256, 840, 128, 628, 600, 600, 28, 601, 4} },
417 {REFRESH_75, CLK_49_500M, M800X600_R75_HSP, M800X600_R75_VSP, 349 {REFRESH_75, M800X600_R75_HSP, M800X600_R75_VSP,
418 {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} }, 350 {1056, 800, 800, 256, 816, 80, 625, 600, 600, 25, 601, 3} },
419 {REFRESH_85, CLK_56_250M, M800X600_R85_HSP, M800X600_R85_VSP, 351 {REFRESH_85, M800X600_R85_HSP, M800X600_R85_VSP,
420 {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} }, 352 {1048, 800, 800, 248, 832, 64, 631, 600, 600, 31, 601, 3} },
421 {REFRESH_100, CLK_68_179M, M800X600_R100_HSP, M800X600_R100_VSP, 353 {REFRESH_100, M800X600_R100_HSP, M800X600_R100_VSP,
422 {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} }, 354 {1072, 800, 800, 272, 848, 88, 636, 600, 600, 36, 601, 3} },
423 {REFRESH_120, CLK_83_950M, M800X600_R120_HSP, 355 {REFRESH_120, M800X600_R120_HSP, M800X600_R120_VSP,
424 M800X600_R120_VSP, 356 {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601, 3} }
425 {1088, 800, 800, 288, 856, 88, 643, 600, 600, 43, 601,
426 3} }
427}; 357};
428 358
429/* 848x480 (CVT) */ 359/* 848x480 (CVT) */
430static struct crt_mode_table CRTM848x480[] = { 360static struct crt_mode_table CRTM848x480[] = {
431 /* r_rate, vclk, hsp, vsp */ 361 /* r_rate, hsp, vsp */
432 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 362 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
433 {REFRESH_60, CLK_31_500M, M848X480_R60_HSP, M848X480_R60_VSP, 363 {REFRESH_60, M848X480_R60_HSP, M848X480_R60_VSP,
434 {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} } 364 {1056, 848, 848, 208, 872, 80, 500, 480, 480, 20, 483, 5} }
435}; 365};
436 366
437/*856x480 (GTF) convert to 852x480*/ 367/*856x480 (GTF) convert to 852x480*/
438static struct crt_mode_table CRTM852x480[] = { 368static struct crt_mode_table CRTM852x480[] = {
439 /*r_rate,vclk,hsp,vsp */ 369 /*r_rate,hsp,vsp */
440 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 370 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
441 {REFRESH_60, CLK_31_728M, M852X480_R60_HSP, M852X480_R60_VSP, 371 {REFRESH_60, M852X480_R60_HSP, M852X480_R60_VSP,
442 {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} } 372 {1064, 856, 856, 208, 872, 88, 497, 480, 480, 17, 481, 3} }
443}; 373};
444 374
445/*1024x512 (GTF)*/ 375/*1024x512 (GTF)*/
446static struct crt_mode_table CRTM1024x512[] = { 376static struct crt_mode_table CRTM1024x512[] = {
447 /*r_rate,vclk,hsp,vsp */ 377 /*r_rate,hsp,vsp */
448 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 378 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
449 {REFRESH_60, CLK_41_291M, M1024X512_R60_HSP, M1024X512_R60_VSP, 379 {REFRESH_60, M1024X512_R60_HSP, M1024X512_R60_VSP,
450 {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} } 380 {1296, 1024, 1024, 272, 1056, 104, 531, 512, 512, 19, 513, 3} }
451 381
452}; 382};
453 383
454/* 1024x600*/ 384/* 1024x600*/
455static struct crt_mode_table CRTM1024x600[] = { 385static struct crt_mode_table CRTM1024x600[] = {
456 /*r_rate,vclk,hsp,vsp */ 386 /*r_rate,hsp,vsp */
457 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 387 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
458 {REFRESH_60, CLK_48_875M, M1024X600_R60_HSP, M1024X600_R60_VSP, 388 {REFRESH_60, M1024X600_R60_HSP, M1024X600_R60_VSP,
459 {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} }, 389 {1312, 1024, 1024, 288, 1064, 104, 622, 600, 600, 22, 601, 3} },
460}; 390};
461 391
462/* 1024x768*/ 392/* 1024x768*/
463static struct crt_mode_table CRTM1024x768[] = { 393static struct crt_mode_table CRTM1024x768[] = {
464 /*r_rate,vclk,hsp,vsp */ 394 /*r_rate,hsp,vsp */
465 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 395 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
466 {REFRESH_60, CLK_65_000M, M1024X768_R60_HSP, M1024X768_R60_VSP, 396 {REFRESH_60, M1024X768_R60_HSP, M1024X768_R60_VSP,
467 {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} }, 397 {1344, 1024, 1024, 320, 1048, 136, 806, 768, 768, 38, 771, 6} },
468 {REFRESH_75, CLK_78_750M, M1024X768_R75_HSP, M1024X768_R75_VSP, 398 {REFRESH_75, M1024X768_R75_HSP, M1024X768_R75_VSP,
469 {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} }, 399 {1312, 1024, 1024, 288, 1040, 96, 800, 768, 768, 32, 769, 3} },
470 {REFRESH_85, CLK_94_500M, M1024X768_R85_HSP, M1024X768_R85_VSP, 400 {REFRESH_85, M1024X768_R85_HSP, M1024X768_R85_VSP,
471 {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} }, 401 {1376, 1024, 1024, 352, 1072, 96, 808, 768, 768, 40, 769, 3} },
472 {REFRESH_100, CLK_113_309M, M1024X768_R100_HSP, M1024X768_R100_VSP, 402 {REFRESH_100, M1024X768_R100_HSP, M1024X768_R100_VSP,
473 {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} } 403 {1392, 1024, 1024, 368, 1096, 112, 814, 768, 768, 46, 769, 3} }
474}; 404};
475 405
476/* 1152x864*/ 406/* 1152x864*/
477static struct crt_mode_table CRTM1152x864[] = { 407static struct crt_mode_table CRTM1152x864[] = {
478 /*r_rate,vclk,hsp,vsp */ 408 /*r_rate,hsp,vsp */
479 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 409 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
480 {REFRESH_75, CLK_108_000M, M1152X864_R75_HSP, M1152X864_R75_VSP, 410 {REFRESH_75, M1152X864_R75_HSP, M1152X864_R75_VSP,
481 {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} } 411 {1600, 1152, 1152, 448, 1216, 128, 900, 864, 864, 36, 865, 3} }
482 412
483}; 413};
484 414
485/* 1280x720 (HDMI 720P)*/ 415/* 1280x720 (HDMI 720P)*/
486static struct crt_mode_table CRTM1280x720[] = { 416static struct crt_mode_table CRTM1280x720[] = {
487 /*r_rate,vclk,hsp,vsp */ 417 /*r_rate,hsp,vsp */
488 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 418 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
489 {REFRESH_60, CLK_74_481M, M1280X720_R60_HSP, M1280X720_R60_VSP, 419 {REFRESH_60, M1280X720_R60_HSP, M1280X720_R60_VSP,
490 {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} }, 420 {1648, 1280, 1280, 368, 1392, 40, 750, 720, 720, 30, 725, 5} },
491 {REFRESH_50, CLK_60_466M, M1280X720_R50_HSP, M1280X720_R50_VSP, 421 {REFRESH_50, M1280X720_R50_HSP, M1280X720_R50_VSP,
492 {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} } 422 {1632, 1280, 1280, 352, 1328, 128, 741, 720, 720, 21, 721, 3} }
493}; 423};
494 424
495/*1280x768 (GTF)*/ 425/*1280x768 (GTF)*/
496static struct crt_mode_table CRTM1280x768[] = { 426static struct crt_mode_table CRTM1280x768[] = {
497 /*r_rate,vclk,hsp,vsp */ 427 /*r_rate,hsp,vsp */
498 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 428 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
499 {REFRESH_60, CLK_80_136M, M1280X768_R60_HSP, M1280X768_R60_VSP, 429 {REFRESH_60, M1280X768_R60_HSP, M1280X768_R60_VSP,
500 {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} }, 430 {1680, 1280, 1280, 400, 1344, 136, 795, 768, 768, 27, 769, 3} },
501 {REFRESH_50, CLK_65_178M, M1280X768_R50_HSP, M1280X768_R50_VSP, 431 {REFRESH_50, M1280X768_R50_HSP, M1280X768_R50_VSP,
502 {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} } 432 {1648, 1280, 1280, 368, 1336, 128, 791, 768, 768, 23, 769, 3} }
503}; 433};
504 434
505/* 1280x800 (CVT) */ 435/* 1280x800 (CVT) */
506static struct crt_mode_table CRTM1280x800[] = { 436static struct crt_mode_table CRTM1280x800[] = {
507 /* r_rate, vclk, hsp, vsp */ 437 /* r_rate, hsp, vsp */
508 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 438 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
509 {REFRESH_60, CLK_83_375M, M1280X800_R60_HSP, M1280X800_R60_VSP, 439 {REFRESH_60, M1280X800_R60_HSP, M1280X800_R60_VSP,
510 {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} } 440 {1680, 1280, 1280, 400, 1352, 128, 831, 800, 800, 31, 803, 6} }
511}; 441};
512 442
513/*1280x960*/ 443/*1280x960*/
514static struct crt_mode_table CRTM1280x960[] = { 444static struct crt_mode_table CRTM1280x960[] = {
515 /*r_rate,vclk,hsp,vsp */ 445 /*r_rate,hsp,vsp */
516 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 446 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
517 {REFRESH_60, CLK_108_000M, M1280X960_R60_HSP, M1280X960_R60_VSP, 447 {REFRESH_60, M1280X960_R60_HSP, M1280X960_R60_VSP,
518 {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} } 448 {1800, 1280, 1280, 520, 1376, 112, 1000, 960, 960, 40, 961, 3} }
519}; 449};
520 450
521/* 1280x1024*/ 451/* 1280x1024*/
522static struct crt_mode_table CRTM1280x1024[] = { 452static struct crt_mode_table CRTM1280x1024[] = {
523 /*r_rate,vclk,,hsp,vsp */ 453 /*r_rate,hsp,vsp */
524 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 454 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
525 {REFRESH_60, CLK_108_000M, M1280X1024_R60_HSP, M1280X1024_R60_VSP, 455 {REFRESH_60, M1280X1024_R60_HSP, M1280X1024_R60_VSP,
526 {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025, 456 {1688, 1280, 1280, 408, 1328, 112, 1066, 1024, 1024, 42, 1025,
527 3} }, 457 3} },
528 {REFRESH_75, CLK_135_000M, M1280X1024_R75_HSP, M1280X1024_R75_VSP, 458 {REFRESH_75, M1280X1024_R75_HSP, M1280X1024_R75_VSP,
529 {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025, 459 {1688, 1280, 1280, 408, 1296, 144, 1066, 1024, 1024, 42, 1025,
530 3} }, 460 3} },
531 {REFRESH_85, CLK_157_500M, M1280X1024_R85_HSP, M1280X1024_R85_VSP, 461 {REFRESH_85, M1280X1024_R85_HSP, M1280X1024_R85_VSP,
532 {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} } 462 {1728, 1280, 1280, 448, 1344, 160, 1072, 1024, 1024, 48, 1025, 3} }
533}; 463};
534 464
535/* 1368x768 (GTF) */ 465/* 1368x768 (GTF) */
536static struct crt_mode_table CRTM1368x768[] = { 466static struct crt_mode_table CRTM1368x768[] = {
537 /* r_rate, vclk, hsp, vsp */ 467 /* r_rate, hsp, vsp */
538 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 468 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
539 {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, 469 {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP,
540 {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} } 470 {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }
541}; 471};
542 472
543/*1440x1050 (GTF)*/ 473/*1440x1050 (GTF)*/
544static struct crt_mode_table CRTM1440x1050[] = { 474static struct crt_mode_table CRTM1440x1050[] = {
545 /*r_rate,vclk,hsp,vsp */ 475 /*r_rate,hsp,vsp */
546 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 476 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
547 {REFRESH_60, CLK_125_104M, M1440X1050_R60_HSP, M1440X1050_R60_VSP, 477 {REFRESH_60, M1440X1050_R60_HSP, M1440X1050_R60_VSP,
548 {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} } 478 {1936, 1440, 1440, 496, 1536, 152, 1077, 1040, 1040, 37, 1041, 3} }
549}; 479};
550 480
551/* 1600x1200*/ 481/* 1600x1200*/
552static struct crt_mode_table CRTM1600x1200[] = { 482static struct crt_mode_table CRTM1600x1200[] = {
553 /*r_rate,vclk,hsp,vsp */ 483 /*r_rate,hsp,vsp */
554 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 484 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
555 {REFRESH_60, CLK_162_000M, M1600X1200_R60_HSP, M1600X1200_R60_VSP, 485 {REFRESH_60, M1600X1200_R60_HSP, M1600X1200_R60_VSP,
556 {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 486 {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201,
557 3} }, 487 3} },
558 {REFRESH_75, CLK_202_500M, M1600X1200_R75_HSP, M1600X1200_R75_VSP, 488 {REFRESH_75, M1600X1200_R75_HSP, M1600X1200_R75_VSP,
559 {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} } 489 {2160, 1600, 1600, 560, 1664, 192, 1250, 1200, 1200, 50, 1201, 3} }
560 490
561}; 491};
562 492
563/* 1680x1050 (CVT) */ 493/* 1680x1050 (CVT) */
564static struct crt_mode_table CRTM1680x1050[] = { 494static struct crt_mode_table CRTM1680x1050[] = {
565 /* r_rate, vclk, hsp, vsp */ 495 /* r_rate, hsp, vsp */
566 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 496 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
567 {REFRESH_60, CLK_146_760M, M1680x1050_R60_HSP, M1680x1050_R60_VSP, 497 {REFRESH_60, M1680x1050_R60_HSP, M1680x1050_R60_VSP,
568 {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053, 498 {2240, 1680, 1680, 560, 1784, 176, 1089, 1050, 1050, 39, 1053,
569 6} }, 499 6} },
570 {REFRESH_75, CLK_187_000M, M1680x1050_R75_HSP, M1680x1050_R75_VSP, 500 {REFRESH_75, M1680x1050_R75_HSP, M1680x1050_R75_VSP,
571 {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} } 501 {2272, 1680, 1680, 592, 1800, 176, 1099, 1050, 1050, 49, 1053, 6} }
572}; 502};
573 503
574/* 1680x1050 (CVT Reduce Blanking) */ 504/* 1680x1050 (CVT Reduce Blanking) */
575static struct crt_mode_table CRTM1680x1050_RB[] = { 505static struct crt_mode_table CRTM1680x1050_RB[] = {
576 /* r_rate, vclk, hsp, vsp */ 506 /* r_rate, hsp, vsp */
577 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 507 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
578 {REFRESH_60, CLK_119_000M, M1680x1050_RB_R60_HSP, 508 {REFRESH_60, M1680x1050_RB_R60_HSP, M1680x1050_RB_R60_VSP,
579 M1680x1050_RB_R60_VSP,
580 {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} } 509 {1840, 1680, 1680, 160, 1728, 32, 1080, 1050, 1050, 30, 1053, 6} }
581}; 510};
582 511
583/* 1920x1080 (CVT)*/ 512/* 1920x1080 (CVT)*/
584static struct crt_mode_table CRTM1920x1080[] = { 513static struct crt_mode_table CRTM1920x1080[] = {
585 /*r_rate,vclk,hsp,vsp */ 514 /*r_rate,hsp,vsp */
586 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 515 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
587 {REFRESH_60, CLK_172_798M, M1920X1080_R60_HSP, M1920X1080_R60_VSP, 516 {REFRESH_60, M1920X1080_R60_HSP, M1920X1080_R60_VSP,
588 {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} } 517 {2576, 1920, 1920, 656, 2048, 200, 1120, 1080, 1080, 40, 1083, 5} }
589}; 518};
590 519
591/* 1920x1080 (CVT with Reduce Blanking) */ 520/* 1920x1080 (CVT with Reduce Blanking) */
592static struct crt_mode_table CRTM1920x1080_RB[] = { 521static struct crt_mode_table CRTM1920x1080_RB[] = {
593 /* r_rate, vclk, hsp, vsp */ 522 /* r_rate, hsp, vsp */
594 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 523 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
595 {REFRESH_60, CLK_138_400M, M1920X1080_RB_R60_HSP, 524 {REFRESH_60, M1920X1080_RB_R60_HSP, M1920X1080_RB_R60_VSP,
596 M1920X1080_RB_R60_VSP,
597 {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} } 525 {2080, 1920, 1920, 160, 1968, 32, 1111, 1080, 1080, 31, 1083, 5} }
598}; 526};
599 527
600/* 1920x1440*/ 528/* 1920x1440*/
601static struct crt_mode_table CRTM1920x1440[] = { 529static struct crt_mode_table CRTM1920x1440[] = {
602 /*r_rate,vclk,hsp,vsp */ 530 /*r_rate,hsp,vsp */
603 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 531 /*HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
604 {REFRESH_60, CLK_234_000M, M1920X1440_R60_HSP, M1920X1440_R60_VSP, 532 {REFRESH_60, M1920X1440_R60_HSP, M1920X1440_R60_VSP,
605 {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441, 533 {2600, 1920, 1920, 680, 2048, 208, 1500, 1440, 1440, 60, 1441,
606 3} }, 534 3} },
607 {REFRESH_75, CLK_297_500M, M1920X1440_R75_HSP, M1920X1440_R75_VSP, 535 {REFRESH_75, M1920X1440_R75_HSP, M1920X1440_R75_VSP,
608 {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} } 536 {2640, 1920, 1920, 720, 2064, 224, 1500, 1440, 1440, 60, 1441, 3} }
609}; 537};
610 538
611/* 1400x1050 (CVT) */ 539/* 1400x1050 (CVT) */
612static struct crt_mode_table CRTM1400x1050[] = { 540static struct crt_mode_table CRTM1400x1050[] = {
613 /* r_rate, vclk, hsp, vsp */ 541 /* r_rate, hsp, vsp */
614 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 542 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
615 {REFRESH_60, CLK_121_750M, M1400X1050_R60_HSP, M1400X1050_R60_VSP, 543 {REFRESH_60, M1400X1050_R60_HSP, M1400X1050_R60_VSP,
616 {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053, 544 {1864, 1400, 1400, 464, 1488, 144, 1089, 1050, 1050, 39, 1053,
617 4} }, 545 4} },
618 {REFRESH_75, CLK_156_000M, M1400X1050_R75_HSP, M1400X1050_R75_VSP, 546 {REFRESH_75, M1400X1050_R75_HSP, M1400X1050_R75_VSP,
619 {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} } 547 {1896, 1400, 1400, 496, 1504, 144, 1099, 1050, 1050, 49, 1053, 4} }
620}; 548};
621 549
622/* 1400x1050 (CVT Reduce Blanking) */ 550/* 1400x1050 (CVT Reduce Blanking) */
623static struct crt_mode_table CRTM1400x1050_RB[] = { 551static struct crt_mode_table CRTM1400x1050_RB[] = {
624 /* r_rate, vclk, hsp, vsp */ 552 /* r_rate, hsp, vsp */
625 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 553 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
626 {REFRESH_60, CLK_101_000M, M1400X1050_RB_R60_HSP, 554 {REFRESH_60, M1400X1050_RB_R60_HSP, M1400X1050_RB_R60_VSP,
627 M1400X1050_RB_R60_VSP,
628 {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} } 555 {1560, 1400, 1400, 160, 1448, 32, 1080, 1050, 1050, 30, 1053, 4} }
629}; 556};
630 557
631/* 960x600 (CVT) */ 558/* 960x600 (CVT) */
632static struct crt_mode_table CRTM960x600[] = { 559static struct crt_mode_table CRTM960x600[] = {
633 /* r_rate, vclk, hsp, vsp */ 560 /* r_rate, hsp, vsp */
634 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 561 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
635 {REFRESH_60, CLK_45_250M, M960X600_R60_HSP, M960X600_R60_VSP, 562 {REFRESH_60, M960X600_R60_HSP, M960X600_R60_VSP,
636 {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} } 563 {1216, 960, 960, 256, 992, 96, 624, 600, 600, 24, 603, 6} }
637}; 564};
638 565
639/* 1000x600 (GTF) */ 566/* 1000x600 (GTF) */
640static struct crt_mode_table CRTM1000x600[] = { 567static struct crt_mode_table CRTM1000x600[] = {
641 /* r_rate, vclk, hsp, vsp */ 568 /* r_rate, hsp, vsp */
642 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 569 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
643 {REFRESH_60, CLK_48_000M, M1000X600_R60_HSP, M1000X600_R60_VSP, 570 {REFRESH_60, M1000X600_R60_HSP, M1000X600_R60_VSP,
644 {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} } 571 {1288, 1000, 1000, 288, 1040, 104, 622, 600, 600, 22, 601, 3} }
645}; 572};
646 573
647/* 1024x576 (GTF) */ 574/* 1024x576 (GTF) */
648static struct crt_mode_table CRTM1024x576[] = { 575static struct crt_mode_table CRTM1024x576[] = {
649 /* r_rate, vclk, hsp, vsp */ 576 /* r_rate, hsp, vsp */
650 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 577 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
651 {REFRESH_60, CLK_46_996M, M1024X576_R60_HSP, M1024X576_R60_VSP, 578 {REFRESH_60, M1024X576_R60_HSP, M1024X576_R60_VSP,
652 {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} } 579 {1312, 1024, 1024, 288, 1064, 104, 597, 576, 576, 21, 577, 3} }
653}; 580};
654 581
655/* 1088x612 (CVT) */ 582/* 1088x612 (CVT) */
656static struct crt_mode_table CRTM1088x612[] = { 583static struct crt_mode_table CRTM1088x612[] = {
657 /* r_rate, vclk, hsp, vsp */ 584 /* r_rate, hsp, vsp */
658 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 585 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
659 {REFRESH_60, CLK_52_977M, M1088X612_R60_HSP, M1088X612_R60_VSP, 586 {REFRESH_60, M1088X612_R60_HSP, M1088X612_R60_VSP,
660 {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} } 587 {1392, 1088, 1088, 304, 1136, 104, 636, 612, 612, 24, 615, 5} }
661}; 588};
662 589
663/* 1152x720 (CVT) */ 590/* 1152x720 (CVT) */
664static struct crt_mode_table CRTM1152x720[] = { 591static struct crt_mode_table CRTM1152x720[] = {
665 /* r_rate, vclk, hsp, vsp */ 592 /* r_rate, hsp, vsp */
666 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 593 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
667 {REFRESH_60, CLK_66_750M, M1152X720_R60_HSP, M1152X720_R60_VSP, 594 {REFRESH_60, M1152X720_R60_HSP, M1152X720_R60_VSP,
668 {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} } 595 {1488, 1152, 1152, 336, 1208, 112, 748, 720, 720, 28, 723, 6} }
669}; 596};
670 597
671/* 1200x720 (GTF) */ 598/* 1200x720 (GTF) */
672static struct crt_mode_table CRTM1200x720[] = { 599static struct crt_mode_table CRTM1200x720[] = {
673 /* r_rate, vclk, hsp, vsp */ 600 /* r_rate, hsp, vsp */
674 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 601 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
675 {REFRESH_60, CLK_70_159M, M1200X720_R60_HSP, M1200X720_R60_VSP, 602 {REFRESH_60, M1200X720_R60_HSP, M1200X720_R60_VSP,
676 {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } 603 {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} }
677}; 604};
678 605
679/* 1200x900 (DCON) */ 606/* 1200x900 (DCON) */
680static struct crt_mode_table DCON1200x900[] = { 607static struct crt_mode_table DCON1200x900[] = {
681 /* r_rate, vclk, hsp, vsp */ 608 /* r_rate, hsp, vsp */
682 {REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP, 609 {REFRESH_60, M1200X900_R60_HSP, M1200X900_R60_VSP,
683 /* The correct htotal is 1240, but this doesn't raster on VX855. */ 610 /* The correct htotal is 1240, but this doesn't raster on VX855. */
684 /* Via suggested changing to a multiple of 16, hence 1264. */ 611 /* Via suggested changing to a multiple of 16, hence 1264. */
685 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 612 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
@@ -688,121 +615,117 @@ static struct crt_mode_table DCON1200x900[] = {
688 615
689/* 1280x600 (GTF) */ 616/* 1280x600 (GTF) */
690static struct crt_mode_table CRTM1280x600[] = { 617static struct crt_mode_table CRTM1280x600[] = {
691 /* r_rate, vclk, hsp, vsp */ 618 /* r_rate, hsp, vsp */
692 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 619 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
693 {REFRESH_60, CLK_61_500M, M1280x600_R60_HSP, M1280x600_R60_VSP, 620 {REFRESH_60, M1280x600_R60_HSP, M1280x600_R60_VSP,
694 {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} } 621 {1648, 1280, 1280, 368, 1336, 128, 622, 600, 600, 22, 601, 3} }
695}; 622};
696 623
697/* 1360x768 (CVT) */ 624/* 1360x768 (CVT) */
698static struct crt_mode_table CRTM1360x768[] = { 625static struct crt_mode_table CRTM1360x768[] = {
699 /* r_rate, vclk, hsp, vsp */ 626 /* r_rate, hsp, vsp */
700 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 627 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
701 {REFRESH_60, CLK_84_750M, M1360X768_R60_HSP, M1360X768_R60_VSP, 628 {REFRESH_60, M1360X768_R60_HSP, M1360X768_R60_VSP,
702 {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} } 629 {1776, 1360, 1360, 416, 1432, 136, 798, 768, 768, 30, 771, 5} }
703}; 630};
704 631
705/* 1360x768 (CVT Reduce Blanking) */ 632/* 1360x768 (CVT Reduce Blanking) */
706static struct crt_mode_table CRTM1360x768_RB[] = { 633static struct crt_mode_table CRTM1360x768_RB[] = {
707 /* r_rate, vclk, hsp, vsp */ 634 /* r_rate, hsp, vsp */
708 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 635 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
709 {REFRESH_60, CLK_72_000M, M1360X768_RB_R60_HSP, 636 {REFRESH_60, M1360X768_RB_R60_HSP, M1360X768_RB_R60_VSP,
710 M1360X768_RB_R60_VSP,
711 {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} } 637 {1520, 1360, 1360, 160, 1408, 32, 790, 768, 768, 22, 771, 5} }
712}; 638};
713 639
714/* 1366x768 (GTF) */ 640/* 1366x768 (GTF) */
715static struct crt_mode_table CRTM1366x768[] = { 641static struct crt_mode_table CRTM1366x768[] = {
716 /* r_rate, vclk, hsp, vsp */ 642 /* r_rate, hsp, vsp */
717 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 643 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
718 {REFRESH_60, CLK_85_860M, M1368X768_R60_HSP, M1368X768_R60_VSP, 644 {REFRESH_60, M1368X768_R60_HSP, M1368X768_R60_VSP,
719 {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} }, 645 {1800, 1368, 1368, 432, 1440, 144, 795, 768, 768, 27, 769, 3} },
720 {REFRESH_50, CLK_69_924M, M1368X768_R50_HSP, M1368X768_R50_VSP, 646 {REFRESH_50, M1368X768_R50_HSP, M1368X768_R50_VSP,
721 {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} } 647 {1768, 1368, 1368, 400, 1424, 144, 791, 768, 768, 23, 769, 3} }
722}; 648};
723 649
724/* 1440x900 (CVT) */ 650/* 1440x900 (CVT) */
725static struct crt_mode_table CRTM1440x900[] = { 651static struct crt_mode_table CRTM1440x900[] = {
726 /* r_rate, vclk, hsp, vsp */ 652 /* r_rate, hsp, vsp */
727 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 653 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
728 {REFRESH_60, CLK_106_500M, M1440X900_R60_HSP, M1440X900_R60_VSP, 654 {REFRESH_60, M1440X900_R60_HSP, M1440X900_R60_VSP,
729 {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} }, 655 {1904, 1440, 1440, 464, 1520, 152, 934, 900, 900, 34, 903, 6} },
730 {REFRESH_75, CLK_136_700M, M1440X900_R75_HSP, M1440X900_R75_VSP, 656 {REFRESH_75, M1440X900_R75_HSP, M1440X900_R75_VSP,
731 {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} } 657 {1936, 1440, 1440, 496, 1536, 152, 942, 900, 900, 42, 903, 6} }
732}; 658};
733 659
734/* 1440x900 (CVT Reduce Blanking) */ 660/* 1440x900 (CVT Reduce Blanking) */
735static struct crt_mode_table CRTM1440x900_RB[] = { 661static struct crt_mode_table CRTM1440x900_RB[] = {
736 /* r_rate, vclk, hsp, vsp */ 662 /* r_rate, hsp, vsp */
737 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 663 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
738 {REFRESH_60, CLK_88_750M, M1440X900_RB_R60_HSP, 664 {REFRESH_60, M1440X900_RB_R60_HSP, M1440X900_RB_R60_VSP,
739 M1440X900_RB_R60_VSP,
740 {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} } 665 {1600, 1440, 1440, 160, 1488, 32, 926, 900, 900, 26, 903, 6} }
741}; 666};
742 667
743/* 1600x900 (CVT) */ 668/* 1600x900 (CVT) */
744static struct crt_mode_table CRTM1600x900[] = { 669static struct crt_mode_table CRTM1600x900[] = {
745 /* r_rate, vclk, hsp, vsp */ 670 /* r_rate, hsp, vsp */
746 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 671 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
747 {REFRESH_60, CLK_118_840M, M1600X900_R60_HSP, M1600X900_R60_VSP, 672 {REFRESH_60, M1600X900_R60_HSP, M1600X900_R60_VSP,
748 {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} } 673 {2112, 1600, 1600, 512, 1688, 168, 934, 900, 900, 34, 903, 5} }
749}; 674};
750 675
751/* 1600x900 (CVT Reduce Blanking) */ 676/* 1600x900 (CVT Reduce Blanking) */
752static struct crt_mode_table CRTM1600x900_RB[] = { 677static struct crt_mode_table CRTM1600x900_RB[] = {
753 /* r_rate, vclk, hsp, vsp */ 678 /* r_rate, hsp, vsp */
754 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 679 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
755 {REFRESH_60, CLK_97_750M, M1600X900_RB_R60_HSP, 680 {REFRESH_60, M1600X900_RB_R60_HSP, M1600X900_RB_R60_VSP,
756 M1600X900_RB_R60_VSP,
757 {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} } 681 {1760, 1600, 1600, 160, 1648, 32, 926, 900, 900, 26, 903, 5} }
758}; 682};
759 683
760/* 1600x1024 (GTF) */ 684/* 1600x1024 (GTF) */
761static struct crt_mode_table CRTM1600x1024[] = { 685static struct crt_mode_table CRTM1600x1024[] = {
762 /* r_rate, vclk, hsp, vsp */ 686 /* r_rate, hsp, vsp */
763 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 687 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
764 {REFRESH_60, CLK_136_700M, M1600X1024_R60_HSP, M1600X1024_R60_VSP, 688 {REFRESH_60, M1600X1024_R60_HSP, M1600X1024_R60_VSP,
765 {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} } 689 {2144, 1600, 1600, 544, 1704, 168, 1060, 1024, 1024, 36, 1025, 3} }
766}; 690};
767 691
768/* 1792x1344 (DMT) */ 692/* 1792x1344 (DMT) */
769static struct crt_mode_table CRTM1792x1344[] = { 693static struct crt_mode_table CRTM1792x1344[] = {
770 /* r_rate, vclk, hsp, vsp */ 694 /* r_rate, hsp, vsp */
771 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 695 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
772 {REFRESH_60, CLK_204_000M, M1792x1344_R60_HSP, M1792x1344_R60_VSP, 696 {REFRESH_60, M1792x1344_R60_HSP, M1792x1344_R60_VSP,
773 {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} } 697 {2448, 1792, 1792, 656, 1920, 200, 1394, 1344, 1344, 50, 1345, 3} }
774}; 698};
775 699
776/* 1856x1392 (DMT) */ 700/* 1856x1392 (DMT) */
777static struct crt_mode_table CRTM1856x1392[] = { 701static struct crt_mode_table CRTM1856x1392[] = {
778 /* r_rate, vclk, hsp, vsp */ 702 /* r_rate, hsp, vsp */
779 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 703 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
780 {REFRESH_60, CLK_218_500M, M1856x1392_R60_HSP, M1856x1392_R60_VSP, 704 {REFRESH_60, M1856x1392_R60_HSP, M1856x1392_R60_VSP,
781 {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} } 705 {2528, 1856, 1856, 672, 1952, 224, 1439, 1392, 1392, 47, 1393, 3} }
782}; 706};
783 707
784/* 1920x1200 (CVT) */ 708/* 1920x1200 (CVT) */
785static struct crt_mode_table CRTM1920x1200[] = { 709static struct crt_mode_table CRTM1920x1200[] = {
786 /* r_rate, vclk, hsp, vsp */ 710 /* r_rate, hsp, vsp */
787 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 711 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
788 {REFRESH_60, CLK_193_295M, M1920X1200_R60_HSP, M1920X1200_R60_VSP, 712 {REFRESH_60, M1920X1200_R60_HSP, M1920X1200_R60_VSP,
789 {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} } 713 {2592, 1920, 1920, 672, 2056, 200, 1245, 1200, 1200, 45, 1203, 6} }
790}; 714};
791 715
792/* 1920x1200 (CVT with Reduce Blanking) */ 716/* 1920x1200 (CVT with Reduce Blanking) */
793static struct crt_mode_table CRTM1920x1200_RB[] = { 717static struct crt_mode_table CRTM1920x1200_RB[] = {
794 /* r_rate, vclk, hsp, vsp */ 718 /* r_rate, hsp, vsp */
795 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 719 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
796 {REFRESH_60, CLK_153_920M, M1920X1200_RB_R60_HSP, 720 {REFRESH_60, M1920X1200_RB_R60_HSP, M1920X1200_RB_R60_VSP,
797 M1920X1200_RB_R60_VSP,
798 {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} } 721 {2080, 1920, 1920, 160, 1968, 32, 1235, 1200, 1200, 35, 1203, 6} }
799}; 722};
800 723
801/* 2048x1536 (CVT) */ 724/* 2048x1536 (CVT) */
802static struct crt_mode_table CRTM2048x1536[] = { 725static struct crt_mode_table CRTM2048x1536[] = {
803 /* r_rate, vclk, hsp, vsp */ 726 /* r_rate, hsp, vsp */
804 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 727 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
805 {REFRESH_60, CLK_267_250M, M2048x1536_R60_HSP, M2048x1536_R60_VSP, 728 {REFRESH_60, M2048x1536_R60_HSP, M2048x1536_R60_VSP,
806 {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} } 729 {2800, 2048, 2048, 752, 2200, 224, 1592, 1536, 1536, 56, 1539, 4} }
807}; 730};
808 731
@@ -955,14 +878,12 @@ static struct VideoModeTable viafb_rb_modes[] = {
955}; 878};
956 879
957struct crt_mode_table CEAM1280x720[] = { 880struct crt_mode_table CEAM1280x720[] = {
958 {REFRESH_60, CLK_74_270M, M1280X720_CEA_R60_HSP, 881 {REFRESH_60, M1280X720_CEA_R60_HSP, M1280X720_CEA_R60_VSP,
959 M1280X720_CEA_R60_VSP,
960 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 882 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
961 {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} } 883 {1650, 1280, 1280, 370, 1390, 40, 750, 720, 720, 30, 725, 5} }
962}; 884};
963struct crt_mode_table CEAM1920x1080[] = { 885struct crt_mode_table CEAM1920x1080[] = {
964 {REFRESH_60, CLK_148_500M, M1920X1080_CEA_R60_HSP, 886 {REFRESH_60, M1920X1080_CEA_R60_HSP, M1920X1080_CEA_R60_VSP,
965 M1920X1080_CEA_R60_VSP,
966 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 887 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
967 {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} } 888 {2200, 1920, 1920, 300, 2008, 44, 1125, 1080, 1080, 45, 1084, 5} }
968}; 889};
@@ -972,7 +893,6 @@ struct VideoModeTable CEA_HDMI_Modes[] = {
972 {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)} 893 {CEAM1920x1080, ARRAY_SIZE(CEAM1920x1080)}
973}; 894};
974 895
975int NUM_TOTAL_RES_MAP_REFRESH = ARRAY_SIZE(res_map_refresh_tbl);
976int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes); 896int NUM_TOTAL_CEA_MODES = ARRAY_SIZE(CEA_HDMI_Modes);
977int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs); 897int NUM_TOTAL_CN400_ModeXregs = ARRAY_SIZE(CN400_ModeXregs);
978int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs); 898int NUM_TOTAL_CN700_ModeXregs = ARRAY_SIZE(CN700_ModeXregs);
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-19 00:42:33 -0400