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-rw-r--r--drivers/video/tegra/dc/dc_priv.h220
1 files changed, 220 insertions, 0 deletions
diff --git a/drivers/video/tegra/dc/dc_priv.h b/drivers/video/tegra/dc/dc_priv.h
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1/*
2 * drivers/video/tegra/dc/dc_priv.h
3 *
4 * Copyright (C) 2010 Google, Inc.
5 * Author: Erik Gilling <konkers@android.com>
6 *
7 * This software is licensed under the terms of the GNU General Public
8 * License version 2, as published by the Free Software Foundation, and
9 * may be copied, distributed, and modified under those terms.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#ifndef __DRIVERS_VIDEO_TEGRA_DC_DC_PRIV_H
19#define __DRIVERS_VIDEO_TEGRA_DC_DC_PRIV_H
20
21#include <linux/io.h>
22#include <linux/mutex.h>
23#include <linux/wait.h>
24#include <linux/completion.h>
25#include <linux/switch.h>
26
27#include <mach/dc.h>
28
29#include "../host/dev.h"
30#include "../host/host1x/host1x_syncpt.h"
31
32#include <mach/tegra_dc_ext.h>
33
34#define WIN_IS_TILED(win) ((win)->flags & TEGRA_WIN_FLAG_TILED)
35#define WIN_IS_ENABLED(win) ((win)->flags & TEGRA_WIN_FLAG_ENABLED)
36
37#define NEED_UPDATE_EMC_ON_EVERY_FRAME (windows_idle_detection_time == 0)
38
39/* DDR: 8 bytes transfer per clock */
40#define DDR_BW_TO_FREQ(bw) ((bw) / 8)
41
42#if defined(CONFIG_TEGRA_EMC_TO_DDR_CLOCK)
43#define EMC_BW_TO_FREQ(bw) (DDR_BW_TO_FREQ(bw) * CONFIG_TEGRA_EMC_TO_DDR_CLOCK)
44#else
45#define EMC_BW_TO_FREQ(bw) (DDR_BW_TO_FREQ(bw) * 2)
46#endif
47
48struct tegra_dc;
49
50struct tegra_dc_blend {
51 unsigned z[DC_N_WINDOWS];
52 unsigned flags[DC_N_WINDOWS];
53};
54
55struct tegra_dc_out_ops {
56 /* initialize output. dc clocks are not on at this point */
57 int (*init)(struct tegra_dc *dc);
58 /* destroy output. dc clocks are not on at this point */
59 void (*destroy)(struct tegra_dc *dc);
60 /* detect connected display. can sleep.*/
61 bool (*detect)(struct tegra_dc *dc);
62 /* enable output. dc clocks are on at this point */
63 void (*enable)(struct tegra_dc *dc);
64 /* disable output. dc clocks are on at this point */
65 void (*disable)(struct tegra_dc *dc);
66
67 /* suspend output. dc clocks are on at this point */
68 void (*suspend)(struct tegra_dc *dc);
69 /* resume output. dc clocks are on at this point */
70 void (*resume)(struct tegra_dc *dc);
71};
72
73struct tegra_dc {
74 struct nvhost_device *ndev;
75 struct tegra_dc_platform_data *pdata;
76
77 struct resource *base_res;
78 void __iomem *base;
79 int irq;
80
81 struct clk *clk;
82 struct clk *emc_clk;
83 int emc_clk_rate;
84 int new_emc_clk_rate;
85 u32 shift_clk_div;
86
87 bool connected;
88 bool enabled;
89 bool suspended;
90
91 struct tegra_dc_out *out;
92 struct tegra_dc_out_ops *out_ops;
93 void *out_data;
94
95 struct tegra_dc_mode mode;
96
97 struct tegra_dc_win windows[DC_N_WINDOWS];
98 struct tegra_dc_blend blend;
99 int n_windows;
100
101 wait_queue_head_t wq;
102
103 struct mutex lock;
104 struct mutex one_shot_lock;
105
106 struct resource *fb_mem;
107 struct tegra_fb_info *fb;
108
109 struct {
110 u32 id;
111 u32 min;
112 u32 max;
113 } syncpt[DC_N_WINDOWS];
114 u32 vblank_syncpt;
115
116 unsigned long underflow_mask;
117 struct work_struct reset_work;
118
119#ifdef CONFIG_SWITCH
120 struct switch_dev modeset_switch;
121#endif
122
123 struct completion frame_end_complete;
124
125 struct work_struct vblank_work;
126
127 struct {
128 u64 underflows;
129 u64 underflows_a;
130 u64 underflows_b;
131 u64 underflows_c;
132 } stats;
133
134 struct tegra_dc_ext *ext;
135
136#ifdef CONFIG_DEBUG_FS
137 struct dentry *debugdir;
138#endif
139 struct tegra_dc_lut fb_lut;
140 struct delayed_work underflow_work;
141 u32 one_shot_delay_ms;
142 struct delayed_work one_shot_work;
143};
144
145static inline void tegra_dc_io_start(struct tegra_dc *dc)
146{
147 nvhost_module_busy(nvhost_get_host(dc->ndev)->dev);
148}
149
150static inline void tegra_dc_io_end(struct tegra_dc *dc)
151{
152 nvhost_module_idle(nvhost_get_host(dc->ndev)->dev);
153}
154
155static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
156 unsigned long reg)
157{
158 BUG_ON(!nvhost_module_powered(nvhost_get_host(dc->ndev)->dev));
159 return readl(dc->base + reg * 4);
160}
161
162static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long val,
163 unsigned long reg)
164{
165 BUG_ON(!nvhost_module_powered(nvhost_get_host(dc->ndev)->dev));
166 writel(val, dc->base + reg * 4);
167}
168
169static inline void _tegra_dc_write_table(struct tegra_dc *dc, const u32 *table,
170 unsigned len)
171{
172 int i;
173
174 for (i = 0; i < len; i++)
175 tegra_dc_writel(dc, table[i * 2 + 1], table[i * 2]);
176}
177
178#define tegra_dc_write_table(dc, table) \
179 _tegra_dc_write_table(dc, table, ARRAY_SIZE(table) / 2)
180
181static inline void tegra_dc_set_outdata(struct tegra_dc *dc, void *data)
182{
183 dc->out_data = data;
184}
185
186static inline void *tegra_dc_get_outdata(struct tegra_dc *dc)
187{
188 return dc->out_data;
189}
190
191static inline unsigned long tegra_dc_get_default_emc_clk_rate(
192 struct tegra_dc *dc)
193{
194 return dc->pdata->emc_clk_rate ? dc->pdata->emc_clk_rate : ULONG_MAX;
195}
196
197void tegra_dc_setup_clk(struct tegra_dc *dc, struct clk *clk);
198
199extern struct tegra_dc_out_ops tegra_dc_rgb_ops;
200extern struct tegra_dc_out_ops tegra_dc_hdmi_ops;
201extern struct tegra_dc_out_ops tegra_dc_dsi_ops;
202
203/* defined in dc_sysfs.c, used by dc.c */
204void __devexit tegra_dc_remove_sysfs(struct device *dev);
205void tegra_dc_create_sysfs(struct device *dev);
206
207/* defined in dc.c, used by dc_sysfs.c */
208void tegra_dc_stats_enable(struct tegra_dc *dc, bool enable);
209bool tegra_dc_stats_get(struct tegra_dc *dc);
210
211/* defined in dc.c, used by dc_sysfs.c */
212u32 tegra_dc_read_checksum_latched(struct tegra_dc *dc);
213void tegra_dc_enable_crc(struct tegra_dc *dc);
214void tegra_dc_disable_crc(struct tegra_dc *dc);
215
216void tegra_dc_set_out_pin_polars(struct tegra_dc *dc,
217 const struct tegra_dc_out_pin *pins,
218 const unsigned int n_pins);
219#endif
220
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-15 14:50:44 -0400