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path: root/drivers/usb/gadget/langwell_udc.c
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Diffstat (limited to 'drivers/usb/gadget/langwell_udc.c')
-rw-r--r--drivers/usb/gadget/langwell_udc.c3434
1 files changed, 0 insertions, 3434 deletions
diff --git a/drivers/usb/gadget/langwell_udc.c b/drivers/usb/gadget/langwell_udc.c
deleted file mode 100644
index f9cedd52cf2..00000000000
--- a/drivers/usb/gadget/langwell_udc.c
+++ /dev/null
@@ -1,3434 +0,0 @@
1/*
2 * Intel Langwell USB Device Controller driver
3 * Copyright (C) 2008-2009, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 */
9
10
11/* #undef DEBUG */
12/* #undef VERBOSE_DEBUG */
13
14#include <linux/module.h>
15#include <linux/pci.h>
16#include <linux/dma-mapping.h>
17#include <linux/kernel.h>
18#include <linux/delay.h>
19#include <linux/ioport.h>
20#include <linux/sched.h>
21#include <linux/slab.h>
22#include <linux/errno.h>
23#include <linux/init.h>
24#include <linux/timer.h>
25#include <linux/list.h>
26#include <linux/interrupt.h>
27#include <linux/moduleparam.h>
28#include <linux/device.h>
29#include <linux/usb/ch9.h>
30#include <linux/usb/gadget.h>
31#include <linux/usb/otg.h>
32#include <linux/pm.h>
33#include <linux/io.h>
34#include <linux/irq.h>
35#include <asm/unaligned.h>
36
37#include "langwell_udc.h"
38
39
40#define DRIVER_DESC "Intel Langwell USB Device Controller driver"
41#define DRIVER_VERSION "16 May 2009"
42
43static const char driver_name[] = "langwell_udc";
44static const char driver_desc[] = DRIVER_DESC;
45
46
47/* for endpoint 0 operations */
48static const struct usb_endpoint_descriptor
49langwell_ep0_desc = {
50 .bLength = USB_DT_ENDPOINT_SIZE,
51 .bDescriptorType = USB_DT_ENDPOINT,
52 .bEndpointAddress = 0,
53 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
54 .wMaxPacketSize = EP0_MAX_PKT_SIZE,
55};
56
57
58/*-------------------------------------------------------------------------*/
59/* debugging */
60
61#ifdef VERBOSE_DEBUG
62static inline void print_all_registers(struct langwell_udc *dev)
63{
64 int i;
65
66 /* Capability Registers */
67 dev_dbg(&dev->pdev->dev,
68 "Capability Registers (offset: 0x%04x, length: 0x%08x)\n",
69 CAP_REG_OFFSET, (u32)sizeof(struct langwell_cap_regs));
70 dev_dbg(&dev->pdev->dev, "caplength=0x%02x\n",
71 readb(&dev->cap_regs->caplength));
72 dev_dbg(&dev->pdev->dev, "hciversion=0x%04x\n",
73 readw(&dev->cap_regs->hciversion));
74 dev_dbg(&dev->pdev->dev, "hcsparams=0x%08x\n",
75 readl(&dev->cap_regs->hcsparams));
76 dev_dbg(&dev->pdev->dev, "hccparams=0x%08x\n",
77 readl(&dev->cap_regs->hccparams));
78 dev_dbg(&dev->pdev->dev, "dciversion=0x%04x\n",
79 readw(&dev->cap_regs->dciversion));
80 dev_dbg(&dev->pdev->dev, "dccparams=0x%08x\n",
81 readl(&dev->cap_regs->dccparams));
82
83 /* Operational Registers */
84 dev_dbg(&dev->pdev->dev,
85 "Operational Registers (offset: 0x%04x, length: 0x%08x)\n",
86 OP_REG_OFFSET, (u32)sizeof(struct langwell_op_regs));
87 dev_dbg(&dev->pdev->dev, "extsts=0x%08x\n",
88 readl(&dev->op_regs->extsts));
89 dev_dbg(&dev->pdev->dev, "extintr=0x%08x\n",
90 readl(&dev->op_regs->extintr));
91 dev_dbg(&dev->pdev->dev, "usbcmd=0x%08x\n",
92 readl(&dev->op_regs->usbcmd));
93 dev_dbg(&dev->pdev->dev, "usbsts=0x%08x\n",
94 readl(&dev->op_regs->usbsts));
95 dev_dbg(&dev->pdev->dev, "usbintr=0x%08x\n",
96 readl(&dev->op_regs->usbintr));
97 dev_dbg(&dev->pdev->dev, "frindex=0x%08x\n",
98 readl(&dev->op_regs->frindex));
99 dev_dbg(&dev->pdev->dev, "ctrldssegment=0x%08x\n",
100 readl(&dev->op_regs->ctrldssegment));
101 dev_dbg(&dev->pdev->dev, "deviceaddr=0x%08x\n",
102 readl(&dev->op_regs->deviceaddr));
103 dev_dbg(&dev->pdev->dev, "endpointlistaddr=0x%08x\n",
104 readl(&dev->op_regs->endpointlistaddr));
105 dev_dbg(&dev->pdev->dev, "ttctrl=0x%08x\n",
106 readl(&dev->op_regs->ttctrl));
107 dev_dbg(&dev->pdev->dev, "burstsize=0x%08x\n",
108 readl(&dev->op_regs->burstsize));
109 dev_dbg(&dev->pdev->dev, "txfilltuning=0x%08x\n",
110 readl(&dev->op_regs->txfilltuning));
111 dev_dbg(&dev->pdev->dev, "txttfilltuning=0x%08x\n",
112 readl(&dev->op_regs->txttfilltuning));
113 dev_dbg(&dev->pdev->dev, "ic_usb=0x%08x\n",
114 readl(&dev->op_regs->ic_usb));
115 dev_dbg(&dev->pdev->dev, "ulpi_viewport=0x%08x\n",
116 readl(&dev->op_regs->ulpi_viewport));
117 dev_dbg(&dev->pdev->dev, "configflag=0x%08x\n",
118 readl(&dev->op_regs->configflag));
119 dev_dbg(&dev->pdev->dev, "portsc1=0x%08x\n",
120 readl(&dev->op_regs->portsc1));
121 dev_dbg(&dev->pdev->dev, "devlc=0x%08x\n",
122 readl(&dev->op_regs->devlc));
123 dev_dbg(&dev->pdev->dev, "otgsc=0x%08x\n",
124 readl(&dev->op_regs->otgsc));
125 dev_dbg(&dev->pdev->dev, "usbmode=0x%08x\n",
126 readl(&dev->op_regs->usbmode));
127 dev_dbg(&dev->pdev->dev, "endptnak=0x%08x\n",
128 readl(&dev->op_regs->endptnak));
129 dev_dbg(&dev->pdev->dev, "endptnaken=0x%08x\n",
130 readl(&dev->op_regs->endptnaken));
131 dev_dbg(&dev->pdev->dev, "endptsetupstat=0x%08x\n",
132 readl(&dev->op_regs->endptsetupstat));
133 dev_dbg(&dev->pdev->dev, "endptprime=0x%08x\n",
134 readl(&dev->op_regs->endptprime));
135 dev_dbg(&dev->pdev->dev, "endptflush=0x%08x\n",
136 readl(&dev->op_regs->endptflush));
137 dev_dbg(&dev->pdev->dev, "endptstat=0x%08x\n",
138 readl(&dev->op_regs->endptstat));
139 dev_dbg(&dev->pdev->dev, "endptcomplete=0x%08x\n",
140 readl(&dev->op_regs->endptcomplete));
141
142 for (i = 0; i < dev->ep_max / 2; i++) {
143 dev_dbg(&dev->pdev->dev, "endptctrl[%d]=0x%08x\n",
144 i, readl(&dev->op_regs->endptctrl[i]));
145 }
146}
147#else
148
149#define print_all_registers(dev) do { } while (0)
150
151#endif /* VERBOSE_DEBUG */
152
153
154/*-------------------------------------------------------------------------*/
155
156#define is_in(ep) (((ep)->ep_num == 0) ? ((ep)->dev->ep0_dir == \
157 USB_DIR_IN) : (usb_endpoint_dir_in((ep)->desc)))
158
159#define DIR_STRING(ep) (is_in(ep) ? "in" : "out")
160
161
162static char *type_string(const struct usb_endpoint_descriptor *desc)
163{
164 switch (usb_endpoint_type(desc)) {
165 case USB_ENDPOINT_XFER_BULK:
166 return "bulk";
167 case USB_ENDPOINT_XFER_ISOC:
168 return "iso";
169 case USB_ENDPOINT_XFER_INT:
170 return "int";
171 };
172
173 return "control";
174}
175
176
177/* configure endpoint control registers */
178static void ep_reset(struct langwell_ep *ep, unsigned char ep_num,
179 unsigned char is_in, unsigned char ep_type)
180{
181 struct langwell_udc *dev;
182 u32 endptctrl;
183
184 dev = ep->dev;
185 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
186
187 endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
188 if (is_in) { /* TX */
189 if (ep_num)
190 endptctrl |= EPCTRL_TXR;
191 endptctrl |= EPCTRL_TXE;
192 endptctrl |= ep_type << EPCTRL_TXT_SHIFT;
193 } else { /* RX */
194 if (ep_num)
195 endptctrl |= EPCTRL_RXR;
196 endptctrl |= EPCTRL_RXE;
197 endptctrl |= ep_type << EPCTRL_RXT_SHIFT;
198 }
199
200 writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
201
202 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
203}
204
205
206/* reset ep0 dQH and endptctrl */
207static void ep0_reset(struct langwell_udc *dev)
208{
209 struct langwell_ep *ep;
210 int i;
211
212 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
213
214 /* ep0 in and out */
215 for (i = 0; i < 2; i++) {
216 ep = &dev->ep[i];
217 ep->dev = dev;
218
219 /* ep0 dQH */
220 ep->dqh = &dev->ep_dqh[i];
221
222 /* configure ep0 endpoint capabilities in dQH */
223 ep->dqh->dqh_ios = 1;
224 ep->dqh->dqh_mpl = EP0_MAX_PKT_SIZE;
225
226 /* enable ep0-in HW zero length termination select */
227 if (is_in(ep))
228 ep->dqh->dqh_zlt = 0;
229 ep->dqh->dqh_mult = 0;
230
231 ep->dqh->dtd_next = DTD_TERM;
232
233 /* configure ep0 control registers */
234 ep_reset(&dev->ep[0], 0, i, USB_ENDPOINT_XFER_CONTROL);
235 }
236
237 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
238}
239
240
241/*-------------------------------------------------------------------------*/
242
243/* endpoints operations */
244
245/* configure endpoint, making it usable */
246static int langwell_ep_enable(struct usb_ep *_ep,
247 const struct usb_endpoint_descriptor *desc)
248{
249 struct langwell_udc *dev;
250 struct langwell_ep *ep;
251 u16 max = 0;
252 unsigned long flags;
253 int i, retval = 0;
254 unsigned char zlt, ios = 0, mult = 0;
255
256 ep = container_of(_ep, struct langwell_ep, ep);
257 dev = ep->dev;
258 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
259
260 if (!_ep || !desc || ep->desc
261 || desc->bDescriptorType != USB_DT_ENDPOINT)
262 return -EINVAL;
263
264 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
265 return -ESHUTDOWN;
266
267 max = usb_endpoint_maxp(desc);
268
269 /*
270 * disable HW zero length termination select
271 * driver handles zero length packet through req->req.zero
272 */
273 zlt = 1;
274
275 /*
276 * sanity check type, direction, address, and then
277 * initialize the endpoint capabilities fields in dQH
278 */
279 switch (usb_endpoint_type(desc)) {
280 case USB_ENDPOINT_XFER_CONTROL:
281 ios = 1;
282 break;
283 case USB_ENDPOINT_XFER_BULK:
284 if ((dev->gadget.speed == USB_SPEED_HIGH
285 && max != 512)
286 || (dev->gadget.speed == USB_SPEED_FULL
287 && max > 64)) {
288 goto done;
289 }
290 break;
291 case USB_ENDPOINT_XFER_INT:
292 if (strstr(ep->ep.name, "-iso")) /* bulk is ok */
293 goto done;
294
295 switch (dev->gadget.speed) {
296 case USB_SPEED_HIGH:
297 if (max <= 1024)
298 break;
299 case USB_SPEED_FULL:
300 if (max <= 64)
301 break;
302 default:
303 if (max <= 8)
304 break;
305 goto done;
306 }
307 break;
308 case USB_ENDPOINT_XFER_ISOC:
309 if (strstr(ep->ep.name, "-bulk")
310 || strstr(ep->ep.name, "-int"))
311 goto done;
312
313 switch (dev->gadget.speed) {
314 case USB_SPEED_HIGH:
315 if (max <= 1024)
316 break;
317 case USB_SPEED_FULL:
318 if (max <= 1023)
319 break;
320 default:
321 goto done;
322 }
323 /*
324 * FIXME:
325 * calculate transactions needed for high bandwidth iso
326 */
327 mult = (unsigned char)(1 + ((max >> 11) & 0x03));
328 max = max & 0x8ff; /* bit 0~10 */
329 /* 3 transactions at most */
330 if (mult > 3)
331 goto done;
332 break;
333 default:
334 goto done;
335 }
336
337 spin_lock_irqsave(&dev->lock, flags);
338
339 ep->ep.maxpacket = max;
340 ep->desc = desc;
341 ep->stopped = 0;
342 ep->ep_num = usb_endpoint_num(desc);
343
344 /* ep_type */
345 ep->ep_type = usb_endpoint_type(desc);
346
347 /* configure endpoint control registers */
348 ep_reset(ep, ep->ep_num, is_in(ep), ep->ep_type);
349
350 /* configure endpoint capabilities in dQH */
351 i = ep->ep_num * 2 + is_in(ep);
352 ep->dqh = &dev->ep_dqh[i];
353 ep->dqh->dqh_ios = ios;
354 ep->dqh->dqh_mpl = cpu_to_le16(max);
355 ep->dqh->dqh_zlt = zlt;
356 ep->dqh->dqh_mult = mult;
357 ep->dqh->dtd_next = DTD_TERM;
358
359 dev_dbg(&dev->pdev->dev, "enabled %s (ep%d%s-%s), max %04x\n",
360 _ep->name,
361 ep->ep_num,
362 DIR_STRING(ep),
363 type_string(desc),
364 max);
365
366 spin_unlock_irqrestore(&dev->lock, flags);
367done:
368 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
369 return retval;
370}
371
372
373/*-------------------------------------------------------------------------*/
374
375/* retire a request */
376static void done(struct langwell_ep *ep, struct langwell_request *req,
377 int status)
378{
379 struct langwell_udc *dev = ep->dev;
380 unsigned stopped = ep->stopped;
381 struct langwell_dtd *curr_dtd, *next_dtd;
382 int i;
383
384 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
385
386 /* remove the req from ep->queue */
387 list_del_init(&req->queue);
388
389 if (req->req.status == -EINPROGRESS)
390 req->req.status = status;
391 else
392 status = req->req.status;
393
394 /* free dTD for the request */
395 next_dtd = req->head;
396 for (i = 0; i < req->dtd_count; i++) {
397 curr_dtd = next_dtd;
398 if (i != req->dtd_count - 1)
399 next_dtd = curr_dtd->next_dtd_virt;
400 dma_pool_free(dev->dtd_pool, curr_dtd, curr_dtd->dtd_dma);
401 }
402
403 usb_gadget_unmap_request(&dev->gadget, &req->req, is_in(ep));
404
405 if (status != -ESHUTDOWN)
406 dev_dbg(&dev->pdev->dev,
407 "complete %s, req %p, stat %d, len %u/%u\n",
408 ep->ep.name, &req->req, status,
409 req->req.actual, req->req.length);
410
411 /* don't modify queue heads during completion callback */
412 ep->stopped = 1;
413
414 spin_unlock(&dev->lock);
415 /* complete routine from gadget driver */
416 if (req->req.complete)
417 req->req.complete(&ep->ep, &req->req);
418
419 spin_lock(&dev->lock);
420 ep->stopped = stopped;
421
422 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
423}
424
425
426static void langwell_ep_fifo_flush(struct usb_ep *_ep);
427
428/* delete all endpoint requests, called with spinlock held */
429static void nuke(struct langwell_ep *ep, int status)
430{
431 /* called with spinlock held */
432 ep->stopped = 1;
433
434 /* endpoint fifo flush */
435 if (&ep->ep && ep->desc)
436 langwell_ep_fifo_flush(&ep->ep);
437
438 while (!list_empty(&ep->queue)) {
439 struct langwell_request *req = NULL;
440 req = list_entry(ep->queue.next, struct langwell_request,
441 queue);
442 done(ep, req, status);
443 }
444}
445
446
447/*-------------------------------------------------------------------------*/
448
449/* endpoint is no longer usable */
450static int langwell_ep_disable(struct usb_ep *_ep)
451{
452 struct langwell_ep *ep;
453 unsigned long flags;
454 struct langwell_udc *dev;
455 int ep_num;
456 u32 endptctrl;
457
458 ep = container_of(_ep, struct langwell_ep, ep);
459 dev = ep->dev;
460 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
461
462 if (!_ep || !ep->desc)
463 return -EINVAL;
464
465 spin_lock_irqsave(&dev->lock, flags);
466
467 /* disable endpoint control register */
468 ep_num = ep->ep_num;
469 endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
470 if (is_in(ep))
471 endptctrl &= ~EPCTRL_TXE;
472 else
473 endptctrl &= ~EPCTRL_RXE;
474 writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
475
476 /* nuke all pending requests (does flush) */
477 nuke(ep, -ESHUTDOWN);
478
479 ep->desc = NULL;
480 ep->ep.desc = NULL;
481 ep->stopped = 1;
482
483 spin_unlock_irqrestore(&dev->lock, flags);
484
485 dev_dbg(&dev->pdev->dev, "disabled %s\n", _ep->name);
486 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
487
488 return 0;
489}
490
491
492/* allocate a request object to use with this endpoint */
493static struct usb_request *langwell_alloc_request(struct usb_ep *_ep,
494 gfp_t gfp_flags)
495{
496 struct langwell_ep *ep;
497 struct langwell_udc *dev;
498 struct langwell_request *req = NULL;
499
500 if (!_ep)
501 return NULL;
502
503 ep = container_of(_ep, struct langwell_ep, ep);
504 dev = ep->dev;
505 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
506
507 req = kzalloc(sizeof(*req), gfp_flags);
508 if (!req)
509 return NULL;
510
511 req->req.dma = DMA_ADDR_INVALID;
512 INIT_LIST_HEAD(&req->queue);
513
514 dev_vdbg(&dev->pdev->dev, "alloc request for %s\n", _ep->name);
515 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
516 return &req->req;
517}
518
519
520/* free a request object */
521static void langwell_free_request(struct usb_ep *_ep,
522 struct usb_request *_req)
523{
524 struct langwell_ep *ep;
525 struct langwell_udc *dev;
526 struct langwell_request *req = NULL;
527
528 ep = container_of(_ep, struct langwell_ep, ep);
529 dev = ep->dev;
530 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
531
532 if (!_ep || !_req)
533 return;
534
535 req = container_of(_req, struct langwell_request, req);
536 WARN_ON(!list_empty(&req->queue));
537
538 if (_req)
539 kfree(req);
540
541 dev_vdbg(&dev->pdev->dev, "free request for %s\n", _ep->name);
542 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
543}
544
545
546/*-------------------------------------------------------------------------*/
547
548/* queue dTD and PRIME endpoint */
549static int queue_dtd(struct langwell_ep *ep, struct langwell_request *req)
550{
551 u32 bit_mask, usbcmd, endptstat, dtd_dma;
552 u8 dtd_status;
553 int i;
554 struct langwell_dqh *dqh;
555 struct langwell_udc *dev;
556
557 dev = ep->dev;
558 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
559
560 i = ep->ep_num * 2 + is_in(ep);
561 dqh = &dev->ep_dqh[i];
562
563 if (ep->ep_num)
564 dev_vdbg(&dev->pdev->dev, "%s\n", ep->name);
565 else
566 /* ep0 */
567 dev_vdbg(&dev->pdev->dev, "%s-%s\n", ep->name, DIR_STRING(ep));
568
569 dev_vdbg(&dev->pdev->dev, "ep_dqh[%d] addr: 0x%p\n",
570 i, &(dev->ep_dqh[i]));
571
572 bit_mask = is_in(ep) ?
573 (1 << (ep->ep_num + 16)) : (1 << (ep->ep_num));
574
575 dev_vdbg(&dev->pdev->dev, "bit_mask = 0x%08x\n", bit_mask);
576
577 /* check if the pipe is empty */
578 if (!(list_empty(&ep->queue))) {
579 /* add dTD to the end of linked list */
580 struct langwell_request *lastreq;
581 lastreq = list_entry(ep->queue.prev,
582 struct langwell_request, queue);
583
584 lastreq->tail->dtd_next =
585 cpu_to_le32(req->head->dtd_dma & DTD_NEXT_MASK);
586
587 /* read prime bit, if 1 goto out */
588 if (readl(&dev->op_regs->endptprime) & bit_mask)
589 goto out;
590
591 do {
592 /* set ATDTW bit in USBCMD */
593 usbcmd = readl(&dev->op_regs->usbcmd);
594 writel(usbcmd | CMD_ATDTW, &dev->op_regs->usbcmd);
595
596 /* read correct status bit */
597 endptstat = readl(&dev->op_regs->endptstat) & bit_mask;
598
599 } while (!(readl(&dev->op_regs->usbcmd) & CMD_ATDTW));
600
601 /* write ATDTW bit to 0 */
602 usbcmd = readl(&dev->op_regs->usbcmd);
603 writel(usbcmd & ~CMD_ATDTW, &dev->op_regs->usbcmd);
604
605 if (endptstat)
606 goto out;
607 }
608
609 /* write dQH next pointer and terminate bit to 0 */
610 dtd_dma = req->head->dtd_dma & DTD_NEXT_MASK;
611 dqh->dtd_next = cpu_to_le32(dtd_dma);
612
613 /* clear active and halt bit */
614 dtd_status = (u8) ~(DTD_STS_ACTIVE | DTD_STS_HALTED);
615 dqh->dtd_status &= dtd_status;
616 dev_vdbg(&dev->pdev->dev, "dqh->dtd_status = 0x%x\n", dqh->dtd_status);
617
618 /* ensure that updates to the dQH will occur before priming */
619 wmb();
620
621 /* write 1 to endptprime register to PRIME endpoint */
622 bit_mask = is_in(ep) ? (1 << (ep->ep_num + 16)) : (1 << ep->ep_num);
623 dev_vdbg(&dev->pdev->dev, "endprime bit_mask = 0x%08x\n", bit_mask);
624 writel(bit_mask, &dev->op_regs->endptprime);
625out:
626 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
627 return 0;
628}
629
630
631/* fill in the dTD structure to build a transfer descriptor */
632static struct langwell_dtd *build_dtd(struct langwell_request *req,
633 unsigned *length, dma_addr_t *dma, int *is_last)
634{
635 u32 buf_ptr;
636 struct langwell_dtd *dtd;
637 struct langwell_udc *dev;
638 int i;
639
640 dev = req->ep->dev;
641 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
642
643 /* the maximum transfer length, up to 16k bytes */
644 *length = min(req->req.length - req->req.actual,
645 (unsigned)DTD_MAX_TRANSFER_LENGTH);
646
647 /* create dTD dma_pool resource */
648 dtd = dma_pool_alloc(dev->dtd_pool, GFP_KERNEL, dma);
649 if (dtd == NULL)
650 return dtd;
651 dtd->dtd_dma = *dma;
652
653 /* initialize buffer page pointers */
654 buf_ptr = (u32)(req->req.dma + req->req.actual);
655 for (i = 0; i < 5; i++)
656 dtd->dtd_buf[i] = cpu_to_le32(buf_ptr + i * PAGE_SIZE);
657
658 req->req.actual += *length;
659
660 /* fill in total bytes with transfer size */
661 dtd->dtd_total = cpu_to_le16(*length);
662 dev_vdbg(&dev->pdev->dev, "dtd->dtd_total = %d\n", dtd->dtd_total);
663
664 /* set is_last flag if req->req.zero is set or not */
665 if (req->req.zero) {
666 if (*length == 0 || (*length % req->ep->ep.maxpacket) != 0)
667 *is_last = 1;
668 else
669 *is_last = 0;
670 } else if (req->req.length == req->req.actual) {
671 *is_last = 1;
672 } else
673 *is_last = 0;
674
675 if (*is_last == 0)
676 dev_vdbg(&dev->pdev->dev, "multi-dtd request!\n");
677
678 /* set interrupt on complete bit for the last dTD */
679 if (*is_last && !req->req.no_interrupt)
680 dtd->dtd_ioc = 1;
681
682 /* set multiplier override 0 for non-ISO and non-TX endpoint */
683 dtd->dtd_multo = 0;
684
685 /* set the active bit of status field to 1 */
686 dtd->dtd_status = DTD_STS_ACTIVE;
687 dev_vdbg(&dev->pdev->dev, "dtd->dtd_status = 0x%02x\n",
688 dtd->dtd_status);
689
690 dev_vdbg(&dev->pdev->dev, "length = %d, dma addr= 0x%08x\n",
691 *length, (int)*dma);
692 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
693 return dtd;
694}
695
696
697/* generate dTD linked list for a request */
698static int req_to_dtd(struct langwell_request *req)
699{
700 unsigned count;
701 int is_last, is_first = 1;
702 struct langwell_dtd *dtd, *last_dtd = NULL;
703 struct langwell_udc *dev;
704 dma_addr_t dma;
705
706 dev = req->ep->dev;
707 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
708 do {
709 dtd = build_dtd(req, &count, &dma, &is_last);
710 if (dtd == NULL)
711 return -ENOMEM;
712
713 if (is_first) {
714 is_first = 0;
715 req->head = dtd;
716 } else {
717 last_dtd->dtd_next = cpu_to_le32(dma);
718 last_dtd->next_dtd_virt = dtd;
719 }
720 last_dtd = dtd;
721 req->dtd_count++;
722 } while (!is_last);
723
724 /* set terminate bit to 1 for the last dTD */
725 dtd->dtd_next = DTD_TERM;
726
727 req->tail = dtd;
728
729 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
730 return 0;
731}
732
733/*-------------------------------------------------------------------------*/
734
735/* queue (submits) an I/O requests to an endpoint */
736static int langwell_ep_queue(struct usb_ep *_ep, struct usb_request *_req,
737 gfp_t gfp_flags)
738{
739 struct langwell_request *req;
740 struct langwell_ep *ep;
741 struct langwell_udc *dev;
742 unsigned long flags;
743 int is_iso = 0;
744 int ret;
745
746 /* always require a cpu-view buffer */
747 req = container_of(_req, struct langwell_request, req);
748 ep = container_of(_ep, struct langwell_ep, ep);
749
750 if (!_req || !_req->complete || !_req->buf
751 || !list_empty(&req->queue)) {
752 return -EINVAL;
753 }
754
755 if (unlikely(!_ep || !ep->desc))
756 return -EINVAL;
757
758 dev = ep->dev;
759 req->ep = ep;
760 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
761
762 if (usb_endpoint_xfer_isoc(ep->desc)) {
763 if (req->req.length > ep->ep.maxpacket)
764 return -EMSGSIZE;
765 is_iso = 1;
766 }
767
768 if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN))
769 return -ESHUTDOWN;
770
771 /* set up dma mapping */
772 ret = usb_gadget_map_request(&dev->gadget, &req->req, is_in(ep));
773 if (ret)
774 return ret;
775
776 dev_dbg(&dev->pdev->dev,
777 "%s queue req %p, len %u, buf %p, dma 0x%08x\n",
778 _ep->name,
779 _req, _req->length, _req->buf, (int)_req->dma);
780
781 _req->status = -EINPROGRESS;
782 _req->actual = 0;
783 req->dtd_count = 0;
784
785 spin_lock_irqsave(&dev->lock, flags);
786
787 /* build and put dTDs to endpoint queue */
788 if (!req_to_dtd(req)) {
789 queue_dtd(ep, req);
790 } else {
791 spin_unlock_irqrestore(&dev->lock, flags);
792 return -ENOMEM;
793 }
794
795 /* update ep0 state */
796 if (ep->ep_num == 0)
797 dev->ep0_state = DATA_STATE_XMIT;
798
799 if (likely(req != NULL)) {
800 list_add_tail(&req->queue, &ep->queue);
801 dev_vdbg(&dev->pdev->dev, "list_add_tail()\n");
802 }
803
804 spin_unlock_irqrestore(&dev->lock, flags);
805
806 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
807 return 0;
808}
809
810
811/* dequeue (cancels, unlinks) an I/O request from an endpoint */
812static int langwell_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
813{
814 struct langwell_ep *ep;
815 struct langwell_udc *dev;
816 struct langwell_request *req;
817 unsigned long flags;
818 int stopped, ep_num, retval = 0;
819 u32 endptctrl;
820
821 ep = container_of(_ep, struct langwell_ep, ep);
822 dev = ep->dev;
823 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
824
825 if (!_ep || !ep->desc || !_req)
826 return -EINVAL;
827
828 if (!dev->driver)
829 return -ESHUTDOWN;
830
831 spin_lock_irqsave(&dev->lock, flags);
832 stopped = ep->stopped;
833
834 /* quiesce dma while we patch the queue */
835 ep->stopped = 1;
836 ep_num = ep->ep_num;
837
838 /* disable endpoint control register */
839 endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
840 if (is_in(ep))
841 endptctrl &= ~EPCTRL_TXE;
842 else
843 endptctrl &= ~EPCTRL_RXE;
844 writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
845
846 /* make sure it's still queued on this endpoint */
847 list_for_each_entry(req, &ep->queue, queue) {
848 if (&req->req == _req)
849 break;
850 }
851
852 if (&req->req != _req) {
853 retval = -EINVAL;
854 goto done;
855 }
856
857 /* queue head may be partially complete. */
858 if (ep->queue.next == &req->queue) {
859 dev_dbg(&dev->pdev->dev, "unlink (%s) dma\n", _ep->name);
860 _req->status = -ECONNRESET;
861 langwell_ep_fifo_flush(&ep->ep);
862
863 /* not the last request in endpoint queue */
864 if (likely(ep->queue.next == &req->queue)) {
865 struct langwell_dqh *dqh;
866 struct langwell_request *next_req;
867
868 dqh = ep->dqh;
869 next_req = list_entry(req->queue.next,
870 struct langwell_request, queue);
871
872 /* point the dQH to the first dTD of next request */
873 writel((u32) next_req->head, &dqh->dqh_current);
874 }
875 } else {
876 struct langwell_request *prev_req;
877
878 prev_req = list_entry(req->queue.prev,
879 struct langwell_request, queue);
880 writel(readl(&req->tail->dtd_next),
881 &prev_req->tail->dtd_next);
882 }
883
884 done(ep, req, -ECONNRESET);
885
886done:
887 /* enable endpoint again */
888 endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
889 if (is_in(ep))
890 endptctrl |= EPCTRL_TXE;
891 else
892 endptctrl |= EPCTRL_RXE;
893 writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
894
895 ep->stopped = stopped;
896 spin_unlock_irqrestore(&dev->lock, flags);
897
898 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
899 return retval;
900}
901
902
903/*-------------------------------------------------------------------------*/
904
905/* endpoint set/clear halt */
906static void ep_set_halt(struct langwell_ep *ep, int value)
907{
908 u32 endptctrl = 0;
909 int ep_num;
910 struct langwell_udc *dev = ep->dev;
911 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
912
913 ep_num = ep->ep_num;
914 endptctrl = readl(&dev->op_regs->endptctrl[ep_num]);
915
916 /* value: 1 - set halt, 0 - clear halt */
917 if (value) {
918 /* set the stall bit */
919 if (is_in(ep))
920 endptctrl |= EPCTRL_TXS;
921 else
922 endptctrl |= EPCTRL_RXS;
923 } else {
924 /* clear the stall bit and reset data toggle */
925 if (is_in(ep)) {
926 endptctrl &= ~EPCTRL_TXS;
927 endptctrl |= EPCTRL_TXR;
928 } else {
929 endptctrl &= ~EPCTRL_RXS;
930 endptctrl |= EPCTRL_RXR;
931 }
932 }
933
934 writel(endptctrl, &dev->op_regs->endptctrl[ep_num]);
935
936 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
937}
938
939
940/* set the endpoint halt feature */
941static int langwell_ep_set_halt(struct usb_ep *_ep, int value)
942{
943 struct langwell_ep *ep;
944 struct langwell_udc *dev;
945 unsigned long flags;
946 int retval = 0;
947
948 ep = container_of(_ep, struct langwell_ep, ep);
949 dev = ep->dev;
950
951 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
952
953 if (!_ep || !ep->desc)
954 return -EINVAL;
955
956 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
957 return -ESHUTDOWN;
958
959 if (usb_endpoint_xfer_isoc(ep->desc))
960 return -EOPNOTSUPP;
961
962 spin_lock_irqsave(&dev->lock, flags);
963
964 /*
965 * attempt to halt IN ep will fail if any transfer requests
966 * are still queue
967 */
968 if (!list_empty(&ep->queue) && is_in(ep) && value) {
969 /* IN endpoint FIFO holds bytes */
970 dev_dbg(&dev->pdev->dev, "%s FIFO holds bytes\n", _ep->name);
971 retval = -EAGAIN;
972 goto done;
973 }
974
975 /* endpoint set/clear halt */
976 if (ep->ep_num) {
977 ep_set_halt(ep, value);
978 } else { /* endpoint 0 */
979 dev->ep0_state = WAIT_FOR_SETUP;
980 dev->ep0_dir = USB_DIR_OUT;
981 }
982done:
983 spin_unlock_irqrestore(&dev->lock, flags);
984 dev_dbg(&dev->pdev->dev, "%s %s halt\n",
985 _ep->name, value ? "set" : "clear");
986 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
987 return retval;
988}
989
990
991/* set the halt feature and ignores clear requests */
992static int langwell_ep_set_wedge(struct usb_ep *_ep)
993{
994 struct langwell_ep *ep;
995 struct langwell_udc *dev;
996
997 ep = container_of(_ep, struct langwell_ep, ep);
998 dev = ep->dev;
999
1000 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1001
1002 if (!_ep || !ep->desc)
1003 return -EINVAL;
1004
1005 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1006 return usb_ep_set_halt(_ep);
1007}
1008
1009
1010/* flush contents of a fifo */
1011static void langwell_ep_fifo_flush(struct usb_ep *_ep)
1012{
1013 struct langwell_ep *ep;
1014 struct langwell_udc *dev;
1015 u32 flush_bit;
1016 unsigned long timeout;
1017
1018 ep = container_of(_ep, struct langwell_ep, ep);
1019 dev = ep->dev;
1020
1021 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1022
1023 if (!_ep || !ep->desc) {
1024 dev_vdbg(&dev->pdev->dev, "ep or ep->desc is NULL\n");
1025 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1026 return;
1027 }
1028
1029 dev_vdbg(&dev->pdev->dev, "%s-%s fifo flush\n",
1030 _ep->name, DIR_STRING(ep));
1031
1032 /* flush endpoint buffer */
1033 if (ep->ep_num == 0)
1034 flush_bit = (1 << 16) | 1;
1035 else if (is_in(ep))
1036 flush_bit = 1 << (ep->ep_num + 16); /* TX */
1037 else
1038 flush_bit = 1 << ep->ep_num; /* RX */
1039
1040 /* wait until flush complete */
1041 timeout = jiffies + FLUSH_TIMEOUT;
1042 do {
1043 writel(flush_bit, &dev->op_regs->endptflush);
1044 while (readl(&dev->op_regs->endptflush)) {
1045 if (time_after(jiffies, timeout)) {
1046 dev_err(&dev->pdev->dev, "ep flush timeout\n");
1047 goto done;
1048 }
1049 cpu_relax();
1050 }
1051 } while (readl(&dev->op_regs->endptstat) & flush_bit);
1052done:
1053 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1054}
1055
1056
1057/* endpoints operations structure */
1058static const struct usb_ep_ops langwell_ep_ops = {
1059
1060 /* configure endpoint, making it usable */
1061 .enable = langwell_ep_enable,
1062
1063 /* endpoint is no longer usable */
1064 .disable = langwell_ep_disable,
1065
1066 /* allocate a request object to use with this endpoint */
1067 .alloc_request = langwell_alloc_request,
1068
1069 /* free a request object */
1070 .free_request = langwell_free_request,
1071
1072 /* queue (submits) an I/O requests to an endpoint */
1073 .queue = langwell_ep_queue,
1074
1075 /* dequeue (cancels, unlinks) an I/O request from an endpoint */
1076 .dequeue = langwell_ep_dequeue,
1077
1078 /* set the endpoint halt feature */
1079 .set_halt = langwell_ep_set_halt,
1080
1081 /* set the halt feature and ignores clear requests */
1082 .set_wedge = langwell_ep_set_wedge,
1083
1084 /* flush contents of a fifo */
1085 .fifo_flush = langwell_ep_fifo_flush,
1086};
1087
1088
1089/*-------------------------------------------------------------------------*/
1090
1091/* device controller usb_gadget_ops structure */
1092
1093/* returns the current frame number */
1094static int langwell_get_frame(struct usb_gadget *_gadget)
1095{
1096 struct langwell_udc *dev;
1097 u16 retval;
1098
1099 if (!_gadget)
1100 return -ENODEV;
1101
1102 dev = container_of(_gadget, struct langwell_udc, gadget);
1103 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1104
1105 retval = readl(&dev->op_regs->frindex) & FRINDEX_MASK;
1106
1107 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1108 return retval;
1109}
1110
1111
1112/* enter or exit PHY low power state */
1113static void langwell_phy_low_power(struct langwell_udc *dev, bool flag)
1114{
1115 u32 devlc;
1116 u8 devlc_byte2;
1117 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1118
1119 devlc = readl(&dev->op_regs->devlc);
1120 dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1121
1122 if (flag)
1123 devlc |= LPM_PHCD;
1124 else
1125 devlc &= ~LPM_PHCD;
1126
1127 /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1128 devlc_byte2 = (devlc >> 16) & 0xff;
1129 writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1130
1131 devlc = readl(&dev->op_regs->devlc);
1132 dev_vdbg(&dev->pdev->dev,
1133 "%s PHY low power suspend, devlc = 0x%08x\n",
1134 flag ? "enter" : "exit", devlc);
1135}
1136
1137
1138/* tries to wake up the host connected to this gadget */
1139static int langwell_wakeup(struct usb_gadget *_gadget)
1140{
1141 struct langwell_udc *dev;
1142 u32 portsc1;
1143 unsigned long flags;
1144
1145 if (!_gadget)
1146 return 0;
1147
1148 dev = container_of(_gadget, struct langwell_udc, gadget);
1149 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1150
1151 /* remote wakeup feature not enabled by host */
1152 if (!dev->remote_wakeup) {
1153 dev_info(&dev->pdev->dev, "remote wakeup is disabled\n");
1154 return -ENOTSUPP;
1155 }
1156
1157 spin_lock_irqsave(&dev->lock, flags);
1158
1159 portsc1 = readl(&dev->op_regs->portsc1);
1160 if (!(portsc1 & PORTS_SUSP)) {
1161 spin_unlock_irqrestore(&dev->lock, flags);
1162 return 0;
1163 }
1164
1165 /* LPM L1 to L0 or legacy remote wakeup */
1166 if (dev->lpm && dev->lpm_state == LPM_L1)
1167 dev_info(&dev->pdev->dev, "LPM L1 to L0 remote wakeup\n");
1168 else
1169 dev_info(&dev->pdev->dev, "device remote wakeup\n");
1170
1171 /* exit PHY low power suspend */
1172 if (dev->pdev->device != 0x0829)
1173 langwell_phy_low_power(dev, 0);
1174
1175 /* force port resume */
1176 portsc1 |= PORTS_FPR;
1177 writel(portsc1, &dev->op_regs->portsc1);
1178
1179 spin_unlock_irqrestore(&dev->lock, flags);
1180
1181 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1182 return 0;
1183}
1184
1185
1186/* notify controller that VBUS is powered or not */
1187static int langwell_vbus_session(struct usb_gadget *_gadget, int is_active)
1188{
1189 struct langwell_udc *dev;
1190 unsigned long flags;
1191 u32 usbcmd;
1192
1193 if (!_gadget)
1194 return -ENODEV;
1195
1196 dev = container_of(_gadget, struct langwell_udc, gadget);
1197 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1198
1199 spin_lock_irqsave(&dev->lock, flags);
1200 dev_vdbg(&dev->pdev->dev, "VBUS status: %s\n",
1201 is_active ? "on" : "off");
1202
1203 dev->vbus_active = (is_active != 0);
1204 if (dev->driver && dev->softconnected && dev->vbus_active) {
1205 usbcmd = readl(&dev->op_regs->usbcmd);
1206 usbcmd |= CMD_RUNSTOP;
1207 writel(usbcmd, &dev->op_regs->usbcmd);
1208 } else {
1209 usbcmd = readl(&dev->op_regs->usbcmd);
1210 usbcmd &= ~CMD_RUNSTOP;
1211 writel(usbcmd, &dev->op_regs->usbcmd);
1212 }
1213
1214 spin_unlock_irqrestore(&dev->lock, flags);
1215
1216 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1217 return 0;
1218}
1219
1220
1221/* constrain controller's VBUS power usage */
1222static int langwell_vbus_draw(struct usb_gadget *_gadget, unsigned mA)
1223{
1224 struct langwell_udc *dev;
1225
1226 if (!_gadget)
1227 return -ENODEV;
1228
1229 dev = container_of(_gadget, struct langwell_udc, gadget);
1230 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1231
1232 if (dev->transceiver) {
1233 dev_vdbg(&dev->pdev->dev, "usb_phy_set_power\n");
1234 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1235 return usb_phy_set_power(dev->transceiver, mA);
1236 }
1237
1238 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1239 return -ENOTSUPP;
1240}
1241
1242
1243/* D+ pullup, software-controlled connect/disconnect to USB host */
1244static int langwell_pullup(struct usb_gadget *_gadget, int is_on)
1245{
1246 struct langwell_udc *dev;
1247 u32 usbcmd;
1248 unsigned long flags;
1249
1250 if (!_gadget)
1251 return -ENODEV;
1252
1253 dev = container_of(_gadget, struct langwell_udc, gadget);
1254
1255 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1256
1257 spin_lock_irqsave(&dev->lock, flags);
1258 dev->softconnected = (is_on != 0);
1259
1260 if (dev->driver && dev->softconnected && dev->vbus_active) {
1261 usbcmd = readl(&dev->op_regs->usbcmd);
1262 usbcmd |= CMD_RUNSTOP;
1263 writel(usbcmd, &dev->op_regs->usbcmd);
1264 } else {
1265 usbcmd = readl(&dev->op_regs->usbcmd);
1266 usbcmd &= ~CMD_RUNSTOP;
1267 writel(usbcmd, &dev->op_regs->usbcmd);
1268 }
1269 spin_unlock_irqrestore(&dev->lock, flags);
1270
1271 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1272 return 0;
1273}
1274
1275static int langwell_start(struct usb_gadget *g,
1276 struct usb_gadget_driver *driver);
1277
1278static int langwell_stop(struct usb_gadget *g,
1279 struct usb_gadget_driver *driver);
1280
1281/* device controller usb_gadget_ops structure */
1282static const struct usb_gadget_ops langwell_ops = {
1283
1284 /* returns the current frame number */
1285 .get_frame = langwell_get_frame,
1286
1287 /* tries to wake up the host connected to this gadget */
1288 .wakeup = langwell_wakeup,
1289
1290 /* set the device selfpowered feature, always selfpowered */
1291 /* .set_selfpowered = langwell_set_selfpowered, */
1292
1293 /* notify controller that VBUS is powered or not */
1294 .vbus_session = langwell_vbus_session,
1295
1296 /* constrain controller's VBUS power usage */
1297 .vbus_draw = langwell_vbus_draw,
1298
1299 /* D+ pullup, software-controlled connect/disconnect to USB host */
1300 .pullup = langwell_pullup,
1301
1302 .udc_start = langwell_start,
1303 .udc_stop = langwell_stop,
1304};
1305
1306
1307/*-------------------------------------------------------------------------*/
1308
1309/* device controller operations */
1310
1311/* reset device controller */
1312static int langwell_udc_reset(struct langwell_udc *dev)
1313{
1314 u32 usbcmd, usbmode, devlc, endpointlistaddr;
1315 u8 devlc_byte0, devlc_byte2;
1316 unsigned long timeout;
1317
1318 if (!dev)
1319 return -EINVAL;
1320
1321 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1322
1323 /* set controller to stop state */
1324 usbcmd = readl(&dev->op_regs->usbcmd);
1325 usbcmd &= ~CMD_RUNSTOP;
1326 writel(usbcmd, &dev->op_regs->usbcmd);
1327
1328 /* reset device controller */
1329 usbcmd = readl(&dev->op_regs->usbcmd);
1330 usbcmd |= CMD_RST;
1331 writel(usbcmd, &dev->op_regs->usbcmd);
1332
1333 /* wait for reset to complete */
1334 timeout = jiffies + RESET_TIMEOUT;
1335 while (readl(&dev->op_regs->usbcmd) & CMD_RST) {
1336 if (time_after(jiffies, timeout)) {
1337 dev_err(&dev->pdev->dev, "device reset timeout\n");
1338 return -ETIMEDOUT;
1339 }
1340 cpu_relax();
1341 }
1342
1343 /* set controller to device mode */
1344 usbmode = readl(&dev->op_regs->usbmode);
1345 usbmode |= MODE_DEVICE;
1346
1347 /* turn setup lockout off, require setup tripwire in usbcmd */
1348 usbmode |= MODE_SLOM;
1349
1350 writel(usbmode, &dev->op_regs->usbmode);
1351 usbmode = readl(&dev->op_regs->usbmode);
1352 dev_vdbg(&dev->pdev->dev, "usbmode=0x%08x\n", usbmode);
1353
1354 /* Write-Clear setup status */
1355 writel(0, &dev->op_regs->usbsts);
1356
1357 /* if support USB LPM, ACK all LPM token */
1358 if (dev->lpm) {
1359 devlc = readl(&dev->op_regs->devlc);
1360 dev_vdbg(&dev->pdev->dev, "devlc = 0x%08x\n", devlc);
1361 /* FIXME: workaround for Langwell A1/A2/A3 sighting */
1362 devlc &= ~LPM_STL; /* don't STALL LPM token */
1363 devlc &= ~LPM_NYT_ACK; /* ACK LPM token */
1364 devlc_byte0 = devlc & 0xff;
1365 devlc_byte2 = (devlc >> 16) & 0xff;
1366 writeb(devlc_byte0, (u8 *)&dev->op_regs->devlc);
1367 writeb(devlc_byte2, (u8 *)&dev->op_regs->devlc + 2);
1368 devlc = readl(&dev->op_regs->devlc);
1369 dev_vdbg(&dev->pdev->dev,
1370 "ACK LPM token, devlc = 0x%08x\n", devlc);
1371 }
1372
1373 /* fill endpointlistaddr register */
1374 endpointlistaddr = dev->ep_dqh_dma;
1375 endpointlistaddr &= ENDPOINTLISTADDR_MASK;
1376 writel(endpointlistaddr, &dev->op_regs->endpointlistaddr);
1377
1378 dev_vdbg(&dev->pdev->dev,
1379 "dQH base (vir: %p, phy: 0x%08x), endpointlistaddr=0x%08x\n",
1380 dev->ep_dqh, endpointlistaddr,
1381 readl(&dev->op_regs->endpointlistaddr));
1382 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1383 return 0;
1384}
1385
1386
1387/* reinitialize device controller endpoints */
1388static int eps_reinit(struct langwell_udc *dev)
1389{
1390 struct langwell_ep *ep;
1391 char name[14];
1392 int i;
1393
1394 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1395
1396 /* initialize ep0 */
1397 ep = &dev->ep[0];
1398 ep->dev = dev;
1399 strncpy(ep->name, "ep0", sizeof(ep->name));
1400 ep->ep.name = ep->name;
1401 ep->ep.ops = &langwell_ep_ops;
1402 ep->stopped = 0;
1403 ep->ep.maxpacket = EP0_MAX_PKT_SIZE;
1404 ep->ep_num = 0;
1405 ep->desc = &langwell_ep0_desc;
1406 INIT_LIST_HEAD(&ep->queue);
1407
1408 ep->ep_type = USB_ENDPOINT_XFER_CONTROL;
1409
1410 /* initialize other endpoints */
1411 for (i = 2; i < dev->ep_max; i++) {
1412 ep = &dev->ep[i];
1413 if (i % 2)
1414 snprintf(name, sizeof(name), "ep%din", i / 2);
1415 else
1416 snprintf(name, sizeof(name), "ep%dout", i / 2);
1417 ep->dev = dev;
1418 strncpy(ep->name, name, sizeof(ep->name));
1419 ep->ep.name = ep->name;
1420
1421 ep->ep.ops = &langwell_ep_ops;
1422 ep->stopped = 0;
1423 ep->ep.maxpacket = (unsigned short) ~0;
1424 ep->ep_num = i / 2;
1425
1426 INIT_LIST_HEAD(&ep->queue);
1427 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
1428 }
1429
1430 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1431 return 0;
1432}
1433
1434
1435/* enable interrupt and set controller to run state */
1436static void langwell_udc_start(struct langwell_udc *dev)
1437{
1438 u32 usbintr, usbcmd;
1439 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1440
1441 /* enable interrupts */
1442 usbintr = INTR_ULPIE /* ULPI */
1443 | INTR_SLE /* suspend */
1444 /* | INTR_SRE SOF received */
1445 | INTR_URE /* USB reset */
1446 | INTR_AAE /* async advance */
1447 | INTR_SEE /* system error */
1448 | INTR_FRE /* frame list rollover */
1449 | INTR_PCE /* port change detect */
1450 | INTR_UEE /* USB error interrupt */
1451 | INTR_UE; /* USB interrupt */
1452 writel(usbintr, &dev->op_regs->usbintr);
1453
1454 /* clear stopped bit */
1455 dev->stopped = 0;
1456
1457 /* set controller to run */
1458 usbcmd = readl(&dev->op_regs->usbcmd);
1459 usbcmd |= CMD_RUNSTOP;
1460 writel(usbcmd, &dev->op_regs->usbcmd);
1461
1462 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1463}
1464
1465
1466/* disable interrupt and set controller to stop state */
1467static void langwell_udc_stop(struct langwell_udc *dev)
1468{
1469 u32 usbcmd;
1470
1471 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1472
1473 /* disable all interrupts */
1474 writel(0, &dev->op_regs->usbintr);
1475
1476 /* set stopped bit */
1477 dev->stopped = 1;
1478
1479 /* set controller to stop state */
1480 usbcmd = readl(&dev->op_regs->usbcmd);
1481 usbcmd &= ~CMD_RUNSTOP;
1482 writel(usbcmd, &dev->op_regs->usbcmd);
1483
1484 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1485}
1486
1487
1488/* stop all USB activities */
1489static void stop_activity(struct langwell_udc *dev)
1490{
1491 struct langwell_ep *ep;
1492 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1493
1494 nuke(&dev->ep[0], -ESHUTDOWN);
1495
1496 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1497 nuke(ep, -ESHUTDOWN);
1498 }
1499
1500 /* report disconnect; the driver is already quiesced */
1501 if (dev->driver) {
1502 spin_unlock(&dev->lock);
1503 dev->driver->disconnect(&dev->gadget);
1504 spin_lock(&dev->lock);
1505 }
1506
1507 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1508}
1509
1510
1511/*-------------------------------------------------------------------------*/
1512
1513/* device "function" sysfs attribute file */
1514static ssize_t show_function(struct device *_dev,
1515 struct device_attribute *attr, char *buf)
1516{
1517 struct langwell_udc *dev = dev_get_drvdata(_dev);
1518
1519 if (!dev->driver || !dev->driver->function
1520 || strlen(dev->driver->function) > PAGE_SIZE)
1521 return 0;
1522
1523 return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
1524}
1525static DEVICE_ATTR(function, S_IRUGO, show_function, NULL);
1526
1527
1528static inline enum usb_device_speed lpm_device_speed(u32 reg)
1529{
1530 switch (LPM_PSPD(reg)) {
1531 case LPM_SPEED_HIGH:
1532 return USB_SPEED_HIGH;
1533 case LPM_SPEED_FULL:
1534 return USB_SPEED_FULL;
1535 case LPM_SPEED_LOW:
1536 return USB_SPEED_LOW;
1537 default:
1538 return USB_SPEED_UNKNOWN;
1539 }
1540}
1541
1542/* device "langwell_udc" sysfs attribute file */
1543static ssize_t show_langwell_udc(struct device *_dev,
1544 struct device_attribute *attr, char *buf)
1545{
1546 struct langwell_udc *dev = dev_get_drvdata(_dev);
1547 struct langwell_request *req;
1548 struct langwell_ep *ep = NULL;
1549 char *next;
1550 unsigned size;
1551 unsigned t;
1552 unsigned i;
1553 unsigned long flags;
1554 u32 tmp_reg;
1555
1556 next = buf;
1557 size = PAGE_SIZE;
1558 spin_lock_irqsave(&dev->lock, flags);
1559
1560 /* driver basic information */
1561 t = scnprintf(next, size,
1562 DRIVER_DESC "\n"
1563 "%s version: %s\n"
1564 "Gadget driver: %s\n\n",
1565 driver_name, DRIVER_VERSION,
1566 dev->driver ? dev->driver->driver.name : "(none)");
1567 size -= t;
1568 next += t;
1569
1570 /* device registers */
1571 tmp_reg = readl(&dev->op_regs->usbcmd);
1572 t = scnprintf(next, size,
1573 "USBCMD reg:\n"
1574 "SetupTW: %d\n"
1575 "Run/Stop: %s\n\n",
1576 (tmp_reg & CMD_SUTW) ? 1 : 0,
1577 (tmp_reg & CMD_RUNSTOP) ? "Run" : "Stop");
1578 size -= t;
1579 next += t;
1580
1581 tmp_reg = readl(&dev->op_regs->usbsts);
1582 t = scnprintf(next, size,
1583 "USB Status Reg:\n"
1584 "Device Suspend: %d\n"
1585 "Reset Received: %d\n"
1586 "System Error: %s\n"
1587 "USB Error Interrupt: %s\n\n",
1588 (tmp_reg & STS_SLI) ? 1 : 0,
1589 (tmp_reg & STS_URI) ? 1 : 0,
1590 (tmp_reg & STS_SEI) ? "Error" : "No error",
1591 (tmp_reg & STS_UEI) ? "Error detected" : "No error");
1592 size -= t;
1593 next += t;
1594
1595 tmp_reg = readl(&dev->op_regs->usbintr);
1596 t = scnprintf(next, size,
1597 "USB Intrrupt Enable Reg:\n"
1598 "Sleep Enable: %d\n"
1599 "SOF Received Enable: %d\n"
1600 "Reset Enable: %d\n"
1601 "System Error Enable: %d\n"
1602 "Port Change Dectected Enable: %d\n"
1603 "USB Error Intr Enable: %d\n"
1604 "USB Intr Enable: %d\n\n",
1605 (tmp_reg & INTR_SLE) ? 1 : 0,
1606 (tmp_reg & INTR_SRE) ? 1 : 0,
1607 (tmp_reg & INTR_URE) ? 1 : 0,
1608 (tmp_reg & INTR_SEE) ? 1 : 0,
1609 (tmp_reg & INTR_PCE) ? 1 : 0,
1610 (tmp_reg & INTR_UEE) ? 1 : 0,
1611 (tmp_reg & INTR_UE) ? 1 : 0);
1612 size -= t;
1613 next += t;
1614
1615 tmp_reg = readl(&dev->op_regs->frindex);
1616 t = scnprintf(next, size,
1617 "USB Frame Index Reg:\n"
1618 "Frame Number is 0x%08x\n\n",
1619 (tmp_reg & FRINDEX_MASK));
1620 size -= t;
1621 next += t;
1622
1623 tmp_reg = readl(&dev->op_regs->deviceaddr);
1624 t = scnprintf(next, size,
1625 "USB Device Address Reg:\n"
1626 "Device Addr is 0x%x\n\n",
1627 USBADR(tmp_reg));
1628 size -= t;
1629 next += t;
1630
1631 tmp_reg = readl(&dev->op_regs->endpointlistaddr);
1632 t = scnprintf(next, size,
1633 "USB Endpoint List Address Reg:\n"
1634 "Endpoint List Pointer is 0x%x\n\n",
1635 EPBASE(tmp_reg));
1636 size -= t;
1637 next += t;
1638
1639 tmp_reg = readl(&dev->op_regs->portsc1);
1640 t = scnprintf(next, size,
1641 "USB Port Status & Control Reg:\n"
1642 "Port Reset: %s\n"
1643 "Port Suspend Mode: %s\n"
1644 "Over-current Change: %s\n"
1645 "Port Enable/Disable Change: %s\n"
1646 "Port Enabled/Disabled: %s\n"
1647 "Current Connect Status: %s\n"
1648 "LPM Suspend Status: %s\n\n",
1649 (tmp_reg & PORTS_PR) ? "Reset" : "Not Reset",
1650 (tmp_reg & PORTS_SUSP) ? "Suspend " : "Not Suspend",
1651 (tmp_reg & PORTS_OCC) ? "Detected" : "No",
1652 (tmp_reg & PORTS_PEC) ? "Changed" : "Not Changed",
1653 (tmp_reg & PORTS_PE) ? "Enable" : "Not Correct",
1654 (tmp_reg & PORTS_CCS) ? "Attached" : "Not Attached",
1655 (tmp_reg & PORTS_SLP) ? "LPM L1" : "LPM L0");
1656 size -= t;
1657 next += t;
1658
1659 tmp_reg = readl(&dev->op_regs->devlc);
1660 t = scnprintf(next, size,
1661 "Device LPM Control Reg:\n"
1662 "Parallel Transceiver : %d\n"
1663 "Serial Transceiver : %d\n"
1664 "Port Speed: %s\n"
1665 "Port Force Full Speed Connenct: %s\n"
1666 "PHY Low Power Suspend Clock: %s\n"
1667 "BmAttributes: %d\n\n",
1668 LPM_PTS(tmp_reg),
1669 (tmp_reg & LPM_STS) ? 1 : 0,
1670 usb_speed_string(lpm_device_speed(tmp_reg)),
1671 (tmp_reg & LPM_PFSC) ? "Force Full Speed" : "Not Force",
1672 (tmp_reg & LPM_PHCD) ? "Disabled" : "Enabled",
1673 LPM_BA(tmp_reg));
1674 size -= t;
1675 next += t;
1676
1677 tmp_reg = readl(&dev->op_regs->usbmode);
1678 t = scnprintf(next, size,
1679 "USB Mode Reg:\n"
1680 "Controller Mode is : %s\n\n", ({
1681 char *s;
1682 switch (MODE_CM(tmp_reg)) {
1683 case MODE_IDLE:
1684 s = "Idle"; break;
1685 case MODE_DEVICE:
1686 s = "Device Controller"; break;
1687 case MODE_HOST:
1688 s = "Host Controller"; break;
1689 default:
1690 s = "None"; break;
1691 }
1692 s;
1693 }));
1694 size -= t;
1695 next += t;
1696
1697 tmp_reg = readl(&dev->op_regs->endptsetupstat);
1698 t = scnprintf(next, size,
1699 "Endpoint Setup Status Reg:\n"
1700 "SETUP on ep 0x%04x\n\n",
1701 tmp_reg & SETUPSTAT_MASK);
1702 size -= t;
1703 next += t;
1704
1705 for (i = 0; i < dev->ep_max / 2; i++) {
1706 tmp_reg = readl(&dev->op_regs->endptctrl[i]);
1707 t = scnprintf(next, size, "EP Ctrl Reg [%d]: 0x%08x\n",
1708 i, tmp_reg);
1709 size -= t;
1710 next += t;
1711 }
1712 tmp_reg = readl(&dev->op_regs->endptprime);
1713 t = scnprintf(next, size, "EP Prime Reg: 0x%08x\n\n", tmp_reg);
1714 size -= t;
1715 next += t;
1716
1717 /* langwell_udc, langwell_ep, langwell_request structure information */
1718 ep = &dev->ep[0];
1719 t = scnprintf(next, size, "%s MaxPacketSize: 0x%x, ep_num: %d\n",
1720 ep->ep.name, ep->ep.maxpacket, ep->ep_num);
1721 size -= t;
1722 next += t;
1723
1724 if (list_empty(&ep->queue)) {
1725 t = scnprintf(next, size, "its req queue is empty\n\n");
1726 size -= t;
1727 next += t;
1728 } else {
1729 list_for_each_entry(req, &ep->queue, queue) {
1730 t = scnprintf(next, size,
1731 "req %p actual 0x%x length 0x%x buf %p\n",
1732 &req->req, req->req.actual,
1733 req->req.length, req->req.buf);
1734 size -= t;
1735 next += t;
1736 }
1737 }
1738 /* other gadget->eplist ep */
1739 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
1740 if (ep->desc) {
1741 t = scnprintf(next, size,
1742 "\n%s MaxPacketSize: 0x%x, "
1743 "ep_num: %d\n",
1744 ep->ep.name, ep->ep.maxpacket,
1745 ep->ep_num);
1746 size -= t;
1747 next += t;
1748
1749 if (list_empty(&ep->queue)) {
1750 t = scnprintf(next, size,
1751 "its req queue is empty\n\n");
1752 size -= t;
1753 next += t;
1754 } else {
1755 list_for_each_entry(req, &ep->queue, queue) {
1756 t = scnprintf(next, size,
1757 "req %p actual 0x%x length "
1758 "0x%x buf %p\n",
1759 &req->req, req->req.actual,
1760 req->req.length, req->req.buf);
1761 size -= t;
1762 next += t;
1763 }
1764 }
1765 }
1766 }
1767
1768 spin_unlock_irqrestore(&dev->lock, flags);
1769 return PAGE_SIZE - size;
1770}
1771static DEVICE_ATTR(langwell_udc, S_IRUGO, show_langwell_udc, NULL);
1772
1773
1774/* device "remote_wakeup" sysfs attribute file */
1775static ssize_t store_remote_wakeup(struct device *_dev,
1776 struct device_attribute *attr, const char *buf, size_t count)
1777{
1778 struct langwell_udc *dev = dev_get_drvdata(_dev);
1779 unsigned long flags;
1780 ssize_t rc = count;
1781
1782 if (count > 2)
1783 return -EINVAL;
1784
1785 if (count > 0 && buf[count-1] == '\n')
1786 ((char *) buf)[count-1] = 0;
1787
1788 if (buf[0] != '1')
1789 return -EINVAL;
1790
1791 /* force remote wakeup enabled in case gadget driver doesn't support */
1792 spin_lock_irqsave(&dev->lock, flags);
1793 dev->remote_wakeup = 1;
1794 dev->dev_status |= (1 << USB_DEVICE_REMOTE_WAKEUP);
1795 spin_unlock_irqrestore(&dev->lock, flags);
1796
1797 langwell_wakeup(&dev->gadget);
1798
1799 return rc;
1800}
1801static DEVICE_ATTR(remote_wakeup, S_IWUSR, NULL, store_remote_wakeup);
1802
1803
1804/*-------------------------------------------------------------------------*/
1805
1806/*
1807 * when a driver is successfully registered, it will receive
1808 * control requests including set_configuration(), which enables
1809 * non-control requests. then usb traffic follows until a
1810 * disconnect is reported. then a host may connect again, or
1811 * the driver might get unbound.
1812 */
1813
1814static int langwell_start(struct usb_gadget *g,
1815 struct usb_gadget_driver *driver)
1816{
1817 struct langwell_udc *dev = gadget_to_langwell(g);
1818 unsigned long flags;
1819 int retval;
1820
1821 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1822
1823 spin_lock_irqsave(&dev->lock, flags);
1824
1825 /* hook up the driver ... */
1826 driver->driver.bus = NULL;
1827 dev->driver = driver;
1828 dev->gadget.dev.driver = &driver->driver;
1829
1830 spin_unlock_irqrestore(&dev->lock, flags);
1831
1832 retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
1833 if (retval)
1834 goto err;
1835
1836 dev->usb_state = USB_STATE_ATTACHED;
1837 dev->ep0_state = WAIT_FOR_SETUP;
1838 dev->ep0_dir = USB_DIR_OUT;
1839
1840 /* enable interrupt and set controller to run state */
1841 if (dev->got_irq)
1842 langwell_udc_start(dev);
1843
1844 dev_vdbg(&dev->pdev->dev,
1845 "After langwell_udc_start(), print all registers:\n");
1846 print_all_registers(dev);
1847
1848 dev_info(&dev->pdev->dev, "register driver: %s\n",
1849 driver->driver.name);
1850 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1851
1852 return 0;
1853
1854err:
1855 dev->gadget.dev.driver = NULL;
1856 dev->driver = NULL;
1857
1858 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1859
1860 return retval;
1861}
1862
1863/* unregister gadget driver */
1864static int langwell_stop(struct usb_gadget *g,
1865 struct usb_gadget_driver *driver)
1866{
1867 struct langwell_udc *dev = gadget_to_langwell(g);
1868 unsigned long flags;
1869
1870 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
1871
1872 /* exit PHY low power suspend */
1873 if (dev->pdev->device != 0x0829)
1874 langwell_phy_low_power(dev, 0);
1875
1876 /* unbind OTG transceiver */
1877 if (dev->transceiver)
1878 (void)otg_set_peripheral(dev->transceiver->otg, 0);
1879
1880 /* disable interrupt and set controller to stop state */
1881 langwell_udc_stop(dev);
1882
1883 dev->usb_state = USB_STATE_ATTACHED;
1884 dev->ep0_state = WAIT_FOR_SETUP;
1885 dev->ep0_dir = USB_DIR_OUT;
1886
1887 spin_lock_irqsave(&dev->lock, flags);
1888
1889 /* stop all usb activities */
1890 dev->gadget.speed = USB_SPEED_UNKNOWN;
1891 dev->gadget.dev.driver = NULL;
1892 dev->driver = NULL;
1893 stop_activity(dev);
1894 spin_unlock_irqrestore(&dev->lock, flags);
1895
1896 device_remove_file(&dev->pdev->dev, &dev_attr_function);
1897
1898 dev_info(&dev->pdev->dev, "unregistered driver '%s'\n",
1899 driver->driver.name);
1900 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1901
1902 return 0;
1903}
1904
1905/*-------------------------------------------------------------------------*/
1906
1907/*
1908 * setup tripwire is used as a semaphore to ensure that the setup data
1909 * payload is extracted from a dQH without being corrupted
1910 */
1911static void setup_tripwire(struct langwell_udc *dev)
1912{
1913 u32 usbcmd,
1914 endptsetupstat;
1915 unsigned long timeout;
1916 struct langwell_dqh *dqh;
1917
1918 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1919
1920 /* ep0 OUT dQH */
1921 dqh = &dev->ep_dqh[EP_DIR_OUT];
1922
1923 /* Write-Clear endptsetupstat */
1924 endptsetupstat = readl(&dev->op_regs->endptsetupstat);
1925 writel(endptsetupstat, &dev->op_regs->endptsetupstat);
1926
1927 /* wait until endptsetupstat is cleared */
1928 timeout = jiffies + SETUPSTAT_TIMEOUT;
1929 while (readl(&dev->op_regs->endptsetupstat)) {
1930 if (time_after(jiffies, timeout)) {
1931 dev_err(&dev->pdev->dev, "setup_tripwire timeout\n");
1932 break;
1933 }
1934 cpu_relax();
1935 }
1936
1937 /* while a hazard exists when setup packet arrives */
1938 do {
1939 /* set setup tripwire bit */
1940 usbcmd = readl(&dev->op_regs->usbcmd);
1941 writel(usbcmd | CMD_SUTW, &dev->op_regs->usbcmd);
1942
1943 /* copy the setup packet to local buffer */
1944 memcpy(&dev->local_setup_buff, &dqh->dqh_setup, 8);
1945 } while (!(readl(&dev->op_regs->usbcmd) & CMD_SUTW));
1946
1947 /* Write-Clear setup tripwire bit */
1948 usbcmd = readl(&dev->op_regs->usbcmd);
1949 writel(usbcmd & ~CMD_SUTW, &dev->op_regs->usbcmd);
1950
1951 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1952}
1953
1954
1955/* protocol ep0 stall, will automatically be cleared on new transaction */
1956static void ep0_stall(struct langwell_udc *dev)
1957{
1958 u32 endptctrl;
1959
1960 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1961
1962 /* set TX and RX to stall */
1963 endptctrl = readl(&dev->op_regs->endptctrl[0]);
1964 endptctrl |= EPCTRL_TXS | EPCTRL_RXS;
1965 writel(endptctrl, &dev->op_regs->endptctrl[0]);
1966
1967 /* update ep0 state */
1968 dev->ep0_state = WAIT_FOR_SETUP;
1969 dev->ep0_dir = USB_DIR_OUT;
1970
1971 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
1972}
1973
1974
1975/* PRIME a status phase for ep0 */
1976static int prime_status_phase(struct langwell_udc *dev, int dir)
1977{
1978 struct langwell_request *req;
1979 struct langwell_ep *ep;
1980 int status = 0;
1981
1982 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
1983
1984 if (dir == EP_DIR_IN)
1985 dev->ep0_dir = USB_DIR_IN;
1986 else
1987 dev->ep0_dir = USB_DIR_OUT;
1988
1989 ep = &dev->ep[0];
1990 dev->ep0_state = WAIT_FOR_OUT_STATUS;
1991
1992 req = dev->status_req;
1993
1994 req->ep = ep;
1995 req->req.length = 0;
1996 req->req.status = -EINPROGRESS;
1997 req->req.actual = 0;
1998 req->req.complete = NULL;
1999 req->dtd_count = 0;
2000
2001 if (!req_to_dtd(req))
2002 status = queue_dtd(ep, req);
2003 else
2004 return -ENOMEM;
2005
2006 if (status)
2007 dev_err(&dev->pdev->dev, "can't queue ep0 status request\n");
2008
2009 list_add_tail(&req->queue, &ep->queue);
2010
2011 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2012 return status;
2013}
2014
2015
2016/* SET_ADDRESS request routine */
2017static void set_address(struct langwell_udc *dev, u16 value,
2018 u16 index, u16 length)
2019{
2020 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2021
2022 /* save the new address to device struct */
2023 dev->dev_addr = (u8) value;
2024 dev_vdbg(&dev->pdev->dev, "dev->dev_addr = %d\n", dev->dev_addr);
2025
2026 /* update usb state */
2027 dev->usb_state = USB_STATE_ADDRESS;
2028
2029 /* STATUS phase */
2030 if (prime_status_phase(dev, EP_DIR_IN))
2031 ep0_stall(dev);
2032
2033 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2034}
2035
2036
2037/* return endpoint by windex */
2038static struct langwell_ep *get_ep_by_windex(struct langwell_udc *dev,
2039 u16 wIndex)
2040{
2041 struct langwell_ep *ep;
2042 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2043
2044 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
2045 return &dev->ep[0];
2046
2047 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
2048 u8 bEndpointAddress;
2049 if (!ep->desc)
2050 continue;
2051
2052 bEndpointAddress = ep->desc->bEndpointAddress;
2053 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
2054 continue;
2055
2056 if ((wIndex & USB_ENDPOINT_NUMBER_MASK)
2057 == (bEndpointAddress & USB_ENDPOINT_NUMBER_MASK))
2058 return ep;
2059 }
2060
2061 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2062 return NULL;
2063}
2064
2065
2066/* return whether endpoint is stalled, 0: not stalled; 1: stalled */
2067static int ep_is_stall(struct langwell_ep *ep)
2068{
2069 struct langwell_udc *dev = ep->dev;
2070 u32 endptctrl;
2071 int retval;
2072
2073 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2074
2075 endptctrl = readl(&dev->op_regs->endptctrl[ep->ep_num]);
2076 if (is_in(ep))
2077 retval = endptctrl & EPCTRL_TXS ? 1 : 0;
2078 else
2079 retval = endptctrl & EPCTRL_RXS ? 1 : 0;
2080
2081 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2082 return retval;
2083}
2084
2085
2086/* GET_STATUS request routine */
2087static void get_status(struct langwell_udc *dev, u8 request_type, u16 value,
2088 u16 index, u16 length)
2089{
2090 struct langwell_request *req;
2091 struct langwell_ep *ep;
2092 u16 status_data = 0; /* 16 bits cpu view status data */
2093 int status = 0;
2094
2095 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2096
2097 ep = &dev->ep[0];
2098
2099 if ((request_type & USB_RECIP_MASK) == USB_RECIP_DEVICE) {
2100 /* get device status */
2101 status_data = dev->dev_status;
2102 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_INTERFACE) {
2103 /* get interface status */
2104 status_data = 0;
2105 } else if ((request_type & USB_RECIP_MASK) == USB_RECIP_ENDPOINT) {
2106 /* get endpoint status */
2107 struct langwell_ep *epn;
2108 epn = get_ep_by_windex(dev, index);
2109 /* stall if endpoint doesn't exist */
2110 if (!epn)
2111 goto stall;
2112
2113 status_data = ep_is_stall(epn) << USB_ENDPOINT_HALT;
2114 }
2115
2116 dev_dbg(&dev->pdev->dev, "get status data: 0x%04x\n", status_data);
2117
2118 dev->ep0_dir = USB_DIR_IN;
2119
2120 /* borrow the per device status_req */
2121 req = dev->status_req;
2122
2123 /* fill in the reqest structure */
2124 *((u16 *) req->req.buf) = cpu_to_le16(status_data);
2125 req->ep = ep;
2126 req->req.length = 2;
2127 req->req.status = -EINPROGRESS;
2128 req->req.actual = 0;
2129 req->req.complete = NULL;
2130 req->dtd_count = 0;
2131
2132 /* prime the data phase */
2133 if (!req_to_dtd(req))
2134 status = queue_dtd(ep, req);
2135 else /* no mem */
2136 goto stall;
2137
2138 if (status) {
2139 dev_err(&dev->pdev->dev,
2140 "response error on GET_STATUS request\n");
2141 goto stall;
2142 }
2143
2144 list_add_tail(&req->queue, &ep->queue);
2145 dev->ep0_state = DATA_STATE_XMIT;
2146
2147 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2148 return;
2149stall:
2150 ep0_stall(dev);
2151 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2152}
2153
2154
2155/* setup packet interrupt handler */
2156static void handle_setup_packet(struct langwell_udc *dev,
2157 struct usb_ctrlrequest *setup)
2158{
2159 u16 wValue = le16_to_cpu(setup->wValue);
2160 u16 wIndex = le16_to_cpu(setup->wIndex);
2161 u16 wLength = le16_to_cpu(setup->wLength);
2162 u32 portsc1;
2163
2164 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2165
2166 /* ep0 fifo flush */
2167 nuke(&dev->ep[0], -ESHUTDOWN);
2168
2169 dev_dbg(&dev->pdev->dev, "SETUP %02x.%02x v%04x i%04x l%04x\n",
2170 setup->bRequestType, setup->bRequest,
2171 wValue, wIndex, wLength);
2172
2173 /* RNDIS gadget delegate */
2174 if ((setup->bRequestType == 0x21) && (setup->bRequest == 0x00)) {
2175 /* USB_CDC_SEND_ENCAPSULATED_COMMAND */
2176 goto delegate;
2177 }
2178
2179 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2180 if ((setup->bRequestType == 0xa1) && (setup->bRequest == 0x01)) {
2181 /* USB_CDC_GET_ENCAPSULATED_RESPONSE */
2182 goto delegate;
2183 }
2184
2185 /* We process some stardard setup requests here */
2186 switch (setup->bRequest) {
2187 case USB_REQ_GET_STATUS:
2188 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_GET_STATUS\n");
2189 /* get status, DATA and STATUS phase */
2190 if ((setup->bRequestType & (USB_DIR_IN | USB_TYPE_MASK))
2191 != (USB_DIR_IN | USB_TYPE_STANDARD))
2192 break;
2193 get_status(dev, setup->bRequestType, wValue, wIndex, wLength);
2194 goto end;
2195
2196 case USB_REQ_SET_ADDRESS:
2197 dev_dbg(&dev->pdev->dev, "SETUP: USB_REQ_SET_ADDRESS\n");
2198 /* STATUS phase */
2199 if (setup->bRequestType != (USB_DIR_OUT | USB_TYPE_STANDARD
2200 | USB_RECIP_DEVICE))
2201 break;
2202 set_address(dev, wValue, wIndex, wLength);
2203 goto end;
2204
2205 case USB_REQ_CLEAR_FEATURE:
2206 case USB_REQ_SET_FEATURE:
2207 /* STATUS phase */
2208 {
2209 int rc = -EOPNOTSUPP;
2210 if (setup->bRequest == USB_REQ_SET_FEATURE)
2211 dev_dbg(&dev->pdev->dev,
2212 "SETUP: USB_REQ_SET_FEATURE\n");
2213 else if (setup->bRequest == USB_REQ_CLEAR_FEATURE)
2214 dev_dbg(&dev->pdev->dev,
2215 "SETUP: USB_REQ_CLEAR_FEATURE\n");
2216
2217 if ((setup->bRequestType & (USB_RECIP_MASK | USB_TYPE_MASK))
2218 == (USB_RECIP_ENDPOINT | USB_TYPE_STANDARD)) {
2219 struct langwell_ep *epn;
2220 epn = get_ep_by_windex(dev, wIndex);
2221 /* stall if endpoint doesn't exist */
2222 if (!epn) {
2223 ep0_stall(dev);
2224 goto end;
2225 }
2226
2227 if (wValue != 0 || wLength != 0
2228 || epn->ep_num > dev->ep_max)
2229 break;
2230
2231 spin_unlock(&dev->lock);
2232 rc = langwell_ep_set_halt(&epn->ep,
2233 (setup->bRequest == USB_REQ_SET_FEATURE)
2234 ? 1 : 0);
2235 spin_lock(&dev->lock);
2236
2237 } else if ((setup->bRequestType & (USB_RECIP_MASK
2238 | USB_TYPE_MASK)) == (USB_RECIP_DEVICE
2239 | USB_TYPE_STANDARD)) {
2240 rc = 0;
2241 switch (wValue) {
2242 case USB_DEVICE_REMOTE_WAKEUP:
2243 if (setup->bRequest == USB_REQ_SET_FEATURE) {
2244 dev->remote_wakeup = 1;
2245 dev->dev_status |= (1 << wValue);
2246 } else {
2247 dev->remote_wakeup = 0;
2248 dev->dev_status &= ~(1 << wValue);
2249 }
2250 break;
2251 case USB_DEVICE_TEST_MODE:
2252 dev_dbg(&dev->pdev->dev, "SETUP: TEST MODE\n");
2253 if ((wIndex & 0xff) ||
2254 (dev->gadget.speed != USB_SPEED_HIGH))
2255 ep0_stall(dev);
2256
2257 switch (wIndex >> 8) {
2258 case TEST_J:
2259 case TEST_K:
2260 case TEST_SE0_NAK:
2261 case TEST_PACKET:
2262 case TEST_FORCE_EN:
2263 if (prime_status_phase(dev, EP_DIR_IN))
2264 ep0_stall(dev);
2265 portsc1 = readl(&dev->op_regs->portsc1);
2266 portsc1 |= (wIndex & 0xf00) << 8;
2267 writel(portsc1, &dev->op_regs->portsc1);
2268 goto end;
2269 default:
2270 rc = -EOPNOTSUPP;
2271 }
2272 break;
2273 default:
2274 rc = -EOPNOTSUPP;
2275 break;
2276 }
2277
2278 if (!gadget_is_otg(&dev->gadget))
2279 break;
2280 else if (setup->bRequest == USB_DEVICE_B_HNP_ENABLE)
2281 dev->gadget.b_hnp_enable = 1;
2282 else if (setup->bRequest == USB_DEVICE_A_HNP_SUPPORT)
2283 dev->gadget.a_hnp_support = 1;
2284 else if (setup->bRequest ==
2285 USB_DEVICE_A_ALT_HNP_SUPPORT)
2286 dev->gadget.a_alt_hnp_support = 1;
2287 else
2288 break;
2289 } else
2290 break;
2291
2292 if (rc == 0) {
2293 if (prime_status_phase(dev, EP_DIR_IN))
2294 ep0_stall(dev);
2295 }
2296 goto end;
2297 }
2298
2299 case USB_REQ_GET_DESCRIPTOR:
2300 dev_dbg(&dev->pdev->dev,
2301 "SETUP: USB_REQ_GET_DESCRIPTOR\n");
2302 goto delegate;
2303
2304 case USB_REQ_SET_DESCRIPTOR:
2305 dev_dbg(&dev->pdev->dev,
2306 "SETUP: USB_REQ_SET_DESCRIPTOR unsupported\n");
2307 goto delegate;
2308
2309 case USB_REQ_GET_CONFIGURATION:
2310 dev_dbg(&dev->pdev->dev,
2311 "SETUP: USB_REQ_GET_CONFIGURATION\n");
2312 goto delegate;
2313
2314 case USB_REQ_SET_CONFIGURATION:
2315 dev_dbg(&dev->pdev->dev,
2316 "SETUP: USB_REQ_SET_CONFIGURATION\n");
2317 goto delegate;
2318
2319 case USB_REQ_GET_INTERFACE:
2320 dev_dbg(&dev->pdev->dev,
2321 "SETUP: USB_REQ_GET_INTERFACE\n");
2322 goto delegate;
2323
2324 case USB_REQ_SET_INTERFACE:
2325 dev_dbg(&dev->pdev->dev,
2326 "SETUP: USB_REQ_SET_INTERFACE\n");
2327 goto delegate;
2328
2329 case USB_REQ_SYNCH_FRAME:
2330 dev_dbg(&dev->pdev->dev,
2331 "SETUP: USB_REQ_SYNCH_FRAME unsupported\n");
2332 goto delegate;
2333
2334 default:
2335 /* delegate USB standard requests to the gadget driver */
2336 goto delegate;
2337delegate:
2338 /* USB requests handled by gadget */
2339 if (wLength) {
2340 /* DATA phase from gadget, STATUS phase from udc */
2341 dev->ep0_dir = (setup->bRequestType & USB_DIR_IN)
2342 ? USB_DIR_IN : USB_DIR_OUT;
2343 dev_vdbg(&dev->pdev->dev,
2344 "dev->ep0_dir = 0x%x, wLength = %d\n",
2345 dev->ep0_dir, wLength);
2346 spin_unlock(&dev->lock);
2347 if (dev->driver->setup(&dev->gadget,
2348 &dev->local_setup_buff) < 0)
2349 ep0_stall(dev);
2350 spin_lock(&dev->lock);
2351 dev->ep0_state = (setup->bRequestType & USB_DIR_IN)
2352 ? DATA_STATE_XMIT : DATA_STATE_RECV;
2353 } else {
2354 /* no DATA phase, IN STATUS phase from gadget */
2355 dev->ep0_dir = USB_DIR_IN;
2356 dev_vdbg(&dev->pdev->dev,
2357 "dev->ep0_dir = 0x%x, wLength = %d\n",
2358 dev->ep0_dir, wLength);
2359 spin_unlock(&dev->lock);
2360 if (dev->driver->setup(&dev->gadget,
2361 &dev->local_setup_buff) < 0)
2362 ep0_stall(dev);
2363 spin_lock(&dev->lock);
2364 dev->ep0_state = WAIT_FOR_OUT_STATUS;
2365 }
2366 break;
2367 }
2368end:
2369 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2370}
2371
2372
2373/* transfer completion, process endpoint request and free the completed dTDs
2374 * for this request
2375 */
2376static int process_ep_req(struct langwell_udc *dev, int index,
2377 struct langwell_request *curr_req)
2378{
2379 struct langwell_dtd *curr_dtd;
2380 struct langwell_dqh *curr_dqh;
2381 int td_complete, actual, remaining_length;
2382 int i, dir;
2383 u8 dtd_status = 0;
2384 int retval = 0;
2385
2386 curr_dqh = &dev->ep_dqh[index];
2387 dir = index % 2;
2388
2389 curr_dtd = curr_req->head;
2390 td_complete = 0;
2391 actual = curr_req->req.length;
2392
2393 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2394
2395 for (i = 0; i < curr_req->dtd_count; i++) {
2396
2397 /* command execution states by dTD */
2398 dtd_status = curr_dtd->dtd_status;
2399
2400 barrier();
2401 remaining_length = le16_to_cpu(curr_dtd->dtd_total);
2402 actual -= remaining_length;
2403
2404 if (!dtd_status) {
2405 /* transfers completed successfully */
2406 if (!remaining_length) {
2407 td_complete++;
2408 dev_vdbg(&dev->pdev->dev,
2409 "dTD transmitted successfully\n");
2410 } else {
2411 if (dir) {
2412 dev_vdbg(&dev->pdev->dev,
2413 "TX dTD remains data\n");
2414 retval = -EPROTO;
2415 break;
2416
2417 } else {
2418 td_complete++;
2419 break;
2420 }
2421 }
2422 } else {
2423 /* transfers completed with errors */
2424 if (dtd_status & DTD_STS_ACTIVE) {
2425 dev_dbg(&dev->pdev->dev,
2426 "dTD status ACTIVE dQH[%d]\n", index);
2427 retval = 1;
2428 return retval;
2429 } else if (dtd_status & DTD_STS_HALTED) {
2430 dev_err(&dev->pdev->dev,
2431 "dTD error %08x dQH[%d]\n",
2432 dtd_status, index);
2433 /* clear the errors and halt condition */
2434 curr_dqh->dtd_status = 0;
2435 retval = -EPIPE;
2436 break;
2437 } else if (dtd_status & DTD_STS_DBE) {
2438 dev_dbg(&dev->pdev->dev,
2439 "data buffer (overflow) error\n");
2440 retval = -EPROTO;
2441 break;
2442 } else if (dtd_status & DTD_STS_TRE) {
2443 dev_dbg(&dev->pdev->dev,
2444 "transaction(ISO) error\n");
2445 retval = -EILSEQ;
2446 break;
2447 } else
2448 dev_err(&dev->pdev->dev,
2449 "unknown error (0x%x)!\n",
2450 dtd_status);
2451 }
2452
2453 if (i != curr_req->dtd_count - 1)
2454 curr_dtd = (struct langwell_dtd *)
2455 curr_dtd->next_dtd_virt;
2456 }
2457
2458 if (retval)
2459 return retval;
2460
2461 curr_req->req.actual = actual;
2462
2463 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2464 return 0;
2465}
2466
2467
2468/* complete DATA or STATUS phase of ep0 prime status phase if needed */
2469static void ep0_req_complete(struct langwell_udc *dev,
2470 struct langwell_ep *ep0, struct langwell_request *req)
2471{
2472 u32 new_addr;
2473 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2474
2475 if (dev->usb_state == USB_STATE_ADDRESS) {
2476 /* set the new address */
2477 new_addr = (u32)dev->dev_addr;
2478 writel(new_addr << USBADR_SHIFT, &dev->op_regs->deviceaddr);
2479
2480 new_addr = USBADR(readl(&dev->op_regs->deviceaddr));
2481 dev_vdbg(&dev->pdev->dev, "new_addr = %d\n", new_addr);
2482 }
2483
2484 done(ep0, req, 0);
2485
2486 switch (dev->ep0_state) {
2487 case DATA_STATE_XMIT:
2488 /* receive status phase */
2489 if (prime_status_phase(dev, EP_DIR_OUT))
2490 ep0_stall(dev);
2491 break;
2492 case DATA_STATE_RECV:
2493 /* send status phase */
2494 if (prime_status_phase(dev, EP_DIR_IN))
2495 ep0_stall(dev);
2496 break;
2497 case WAIT_FOR_OUT_STATUS:
2498 dev->ep0_state = WAIT_FOR_SETUP;
2499 break;
2500 case WAIT_FOR_SETUP:
2501 dev_err(&dev->pdev->dev, "unexpect ep0 packets\n");
2502 break;
2503 default:
2504 ep0_stall(dev);
2505 break;
2506 }
2507
2508 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2509}
2510
2511
2512/* USB transfer completion interrupt */
2513static void handle_trans_complete(struct langwell_udc *dev)
2514{
2515 u32 complete_bits;
2516 int i, ep_num, dir, bit_mask, status;
2517 struct langwell_ep *epn;
2518 struct langwell_request *curr_req, *temp_req;
2519
2520 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2521
2522 complete_bits = readl(&dev->op_regs->endptcomplete);
2523 dev_vdbg(&dev->pdev->dev, "endptcomplete register: 0x%08x\n",
2524 complete_bits);
2525
2526 /* Write-Clear the bits in endptcomplete register */
2527 writel(complete_bits, &dev->op_regs->endptcomplete);
2528
2529 if (!complete_bits) {
2530 dev_dbg(&dev->pdev->dev, "complete_bits = 0\n");
2531 goto done;
2532 }
2533
2534 for (i = 0; i < dev->ep_max; i++) {
2535 ep_num = i / 2;
2536 dir = i % 2;
2537
2538 bit_mask = 1 << (ep_num + 16 * dir);
2539
2540 if (!(complete_bits & bit_mask))
2541 continue;
2542
2543 /* ep0 */
2544 if (i == 1)
2545 epn = &dev->ep[0];
2546 else
2547 epn = &dev->ep[i];
2548
2549 if (epn->name == NULL) {
2550 dev_warn(&dev->pdev->dev, "invalid endpoint\n");
2551 continue;
2552 }
2553
2554 if (i < 2)
2555 /* ep0 in and out */
2556 dev_dbg(&dev->pdev->dev, "%s-%s transfer completed\n",
2557 epn->name,
2558 is_in(epn) ? "in" : "out");
2559 else
2560 dev_dbg(&dev->pdev->dev, "%s transfer completed\n",
2561 epn->name);
2562
2563 /* process the req queue until an uncomplete request */
2564 list_for_each_entry_safe(curr_req, temp_req,
2565 &epn->queue, queue) {
2566 status = process_ep_req(dev, i, curr_req);
2567 dev_vdbg(&dev->pdev->dev, "%s req status: %d\n",
2568 epn->name, status);
2569
2570 if (status)
2571 break;
2572
2573 /* write back status to req */
2574 curr_req->req.status = status;
2575
2576 /* ep0 request completion */
2577 if (ep_num == 0) {
2578 ep0_req_complete(dev, epn, curr_req);
2579 break;
2580 } else {
2581 done(epn, curr_req, status);
2582 }
2583 }
2584 }
2585done:
2586 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2587}
2588
2589/* port change detect interrupt handler */
2590static void handle_port_change(struct langwell_udc *dev)
2591{
2592 u32 portsc1, devlc;
2593
2594 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2595
2596 if (dev->bus_reset)
2597 dev->bus_reset = 0;
2598
2599 portsc1 = readl(&dev->op_regs->portsc1);
2600 devlc = readl(&dev->op_regs->devlc);
2601 dev_vdbg(&dev->pdev->dev, "portsc1 = 0x%08x, devlc = 0x%08x\n",
2602 portsc1, devlc);
2603
2604 /* bus reset is finished */
2605 if (!(portsc1 & PORTS_PR)) {
2606 /* get the speed */
2607 dev->gadget.speed = lpm_device_speed(devlc);
2608 dev_vdbg(&dev->pdev->dev, "dev->gadget.speed = %d\n",
2609 dev->gadget.speed);
2610 }
2611
2612 /* LPM L0 to L1 */
2613 if (dev->lpm && dev->lpm_state == LPM_L0)
2614 if (portsc1 & PORTS_SUSP && portsc1 & PORTS_SLP) {
2615 dev_info(&dev->pdev->dev, "LPM L0 to L1\n");
2616 dev->lpm_state = LPM_L1;
2617 }
2618
2619 /* LPM L1 to L0, force resume or remote wakeup finished */
2620 if (dev->lpm && dev->lpm_state == LPM_L1)
2621 if (!(portsc1 & PORTS_SUSP)) {
2622 dev_info(&dev->pdev->dev, "LPM L1 to L0\n");
2623 dev->lpm_state = LPM_L0;
2624 }
2625
2626 /* update USB state */
2627 if (!dev->resume_state)
2628 dev->usb_state = USB_STATE_DEFAULT;
2629
2630 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2631}
2632
2633
2634/* USB reset interrupt handler */
2635static void handle_usb_reset(struct langwell_udc *dev)
2636{
2637 u32 deviceaddr,
2638 endptsetupstat,
2639 endptcomplete;
2640 unsigned long timeout;
2641
2642 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2643
2644 /* Write-Clear the device address */
2645 deviceaddr = readl(&dev->op_regs->deviceaddr);
2646 writel(deviceaddr & ~USBADR_MASK, &dev->op_regs->deviceaddr);
2647
2648 dev->dev_addr = 0;
2649
2650 /* clear usb state */
2651 dev->resume_state = 0;
2652
2653 /* LPM L1 to L0, reset */
2654 if (dev->lpm)
2655 dev->lpm_state = LPM_L0;
2656
2657 dev->ep0_dir = USB_DIR_OUT;
2658 dev->ep0_state = WAIT_FOR_SETUP;
2659
2660 /* remote wakeup reset to 0 when the device is reset */
2661 dev->remote_wakeup = 0;
2662 dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
2663 dev->gadget.b_hnp_enable = 0;
2664 dev->gadget.a_hnp_support = 0;
2665 dev->gadget.a_alt_hnp_support = 0;
2666
2667 /* Write-Clear all the setup token semaphores */
2668 endptsetupstat = readl(&dev->op_regs->endptsetupstat);
2669 writel(endptsetupstat, &dev->op_regs->endptsetupstat);
2670
2671 /* Write-Clear all the endpoint complete status bits */
2672 endptcomplete = readl(&dev->op_regs->endptcomplete);
2673 writel(endptcomplete, &dev->op_regs->endptcomplete);
2674
2675 /* wait until all endptprime bits cleared */
2676 timeout = jiffies + PRIME_TIMEOUT;
2677 while (readl(&dev->op_regs->endptprime)) {
2678 if (time_after(jiffies, timeout)) {
2679 dev_err(&dev->pdev->dev, "USB reset timeout\n");
2680 break;
2681 }
2682 cpu_relax();
2683 }
2684
2685 /* write 1s to endptflush register to clear any primed buffers */
2686 writel((u32) ~0, &dev->op_regs->endptflush);
2687
2688 if (readl(&dev->op_regs->portsc1) & PORTS_PR) {
2689 dev_vdbg(&dev->pdev->dev, "USB bus reset\n");
2690 /* bus is reseting */
2691 dev->bus_reset = 1;
2692
2693 /* reset all the queues, stop all USB activities */
2694 stop_activity(dev);
2695 dev->usb_state = USB_STATE_DEFAULT;
2696 } else {
2697 dev_vdbg(&dev->pdev->dev, "device controller reset\n");
2698 /* controller reset */
2699 langwell_udc_reset(dev);
2700
2701 /* reset all the queues, stop all USB activities */
2702 stop_activity(dev);
2703
2704 /* reset ep0 dQH and endptctrl */
2705 ep0_reset(dev);
2706
2707 /* enable interrupt and set controller to run state */
2708 langwell_udc_start(dev);
2709
2710 dev->usb_state = USB_STATE_ATTACHED;
2711 }
2712
2713 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2714}
2715
2716
2717/* USB bus suspend/resume interrupt */
2718static void handle_bus_suspend(struct langwell_udc *dev)
2719{
2720 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2721
2722 dev->resume_state = dev->usb_state;
2723 dev->usb_state = USB_STATE_SUSPENDED;
2724
2725 /* report suspend to the driver */
2726 if (dev->driver) {
2727 if (dev->driver->suspend) {
2728 spin_unlock(&dev->lock);
2729 dev->driver->suspend(&dev->gadget);
2730 spin_lock(&dev->lock);
2731 dev_dbg(&dev->pdev->dev, "suspend %s\n",
2732 dev->driver->driver.name);
2733 }
2734 }
2735
2736 /* enter PHY low power suspend */
2737 if (dev->pdev->device != 0x0829)
2738 langwell_phy_low_power(dev, 0);
2739
2740 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2741}
2742
2743
2744static void handle_bus_resume(struct langwell_udc *dev)
2745{
2746 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2747
2748 dev->usb_state = dev->resume_state;
2749 dev->resume_state = 0;
2750
2751 /* exit PHY low power suspend */
2752 if (dev->pdev->device != 0x0829)
2753 langwell_phy_low_power(dev, 0);
2754
2755 /* report resume to the driver */
2756 if (dev->driver) {
2757 if (dev->driver->resume) {
2758 spin_unlock(&dev->lock);
2759 dev->driver->resume(&dev->gadget);
2760 spin_lock(&dev->lock);
2761 dev_dbg(&dev->pdev->dev, "resume %s\n",
2762 dev->driver->driver.name);
2763 }
2764 }
2765
2766 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2767}
2768
2769
2770/* USB device controller interrupt handler */
2771static irqreturn_t langwell_irq(int irq, void *_dev)
2772{
2773 struct langwell_udc *dev = _dev;
2774 u32 usbsts,
2775 usbintr,
2776 irq_sts,
2777 portsc1;
2778
2779 dev_vdbg(&dev->pdev->dev, "---> %s()\n", __func__);
2780
2781 if (dev->stopped) {
2782 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2783 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2784 return IRQ_NONE;
2785 }
2786
2787 spin_lock(&dev->lock);
2788
2789 /* USB status */
2790 usbsts = readl(&dev->op_regs->usbsts);
2791
2792 /* USB interrupt enable */
2793 usbintr = readl(&dev->op_regs->usbintr);
2794
2795 irq_sts = usbsts & usbintr;
2796 dev_vdbg(&dev->pdev->dev,
2797 "usbsts = 0x%08x, usbintr = 0x%08x, irq_sts = 0x%08x\n",
2798 usbsts, usbintr, irq_sts);
2799
2800 if (!irq_sts) {
2801 dev_vdbg(&dev->pdev->dev, "handle IRQ_NONE\n");
2802 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2803 spin_unlock(&dev->lock);
2804 return IRQ_NONE;
2805 }
2806
2807 /* Write-Clear interrupt status bits */
2808 writel(irq_sts, &dev->op_regs->usbsts);
2809
2810 /* resume from suspend */
2811 portsc1 = readl(&dev->op_regs->portsc1);
2812 if (dev->usb_state == USB_STATE_SUSPENDED)
2813 if (!(portsc1 & PORTS_SUSP))
2814 handle_bus_resume(dev);
2815
2816 /* USB interrupt */
2817 if (irq_sts & STS_UI) {
2818 dev_vdbg(&dev->pdev->dev, "USB interrupt\n");
2819
2820 /* setup packet received from ep0 */
2821 if (readl(&dev->op_regs->endptsetupstat)
2822 & EP0SETUPSTAT_MASK) {
2823 dev_vdbg(&dev->pdev->dev,
2824 "USB SETUP packet received interrupt\n");
2825 /* setup tripwire semaphone */
2826 setup_tripwire(dev);
2827 handle_setup_packet(dev, &dev->local_setup_buff);
2828 }
2829
2830 /* USB transfer completion */
2831 if (readl(&dev->op_regs->endptcomplete)) {
2832 dev_vdbg(&dev->pdev->dev,
2833 "USB transfer completion interrupt\n");
2834 handle_trans_complete(dev);
2835 }
2836 }
2837
2838 /* SOF received interrupt (for ISO transfer) */
2839 if (irq_sts & STS_SRI) {
2840 /* FIXME */
2841 /* dev_vdbg(&dev->pdev->dev, "SOF received interrupt\n"); */
2842 }
2843
2844 /* port change detect interrupt */
2845 if (irq_sts & STS_PCI) {
2846 dev_vdbg(&dev->pdev->dev, "port change detect interrupt\n");
2847 handle_port_change(dev);
2848 }
2849
2850 /* suspend interrupt */
2851 if (irq_sts & STS_SLI) {
2852 dev_vdbg(&dev->pdev->dev, "suspend interrupt\n");
2853 handle_bus_suspend(dev);
2854 }
2855
2856 /* USB reset interrupt */
2857 if (irq_sts & STS_URI) {
2858 dev_vdbg(&dev->pdev->dev, "USB reset interrupt\n");
2859 handle_usb_reset(dev);
2860 }
2861
2862 /* USB error or system error interrupt */
2863 if (irq_sts & (STS_UEI | STS_SEI)) {
2864 /* FIXME */
2865 dev_warn(&dev->pdev->dev, "error IRQ, irq_sts: %x\n", irq_sts);
2866 }
2867
2868 spin_unlock(&dev->lock);
2869
2870 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2871 return IRQ_HANDLED;
2872}
2873
2874
2875/*-------------------------------------------------------------------------*/
2876
2877/* release device structure */
2878static void gadget_release(struct device *_dev)
2879{
2880 struct langwell_udc *dev = dev_get_drvdata(_dev);
2881
2882 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2883
2884 complete(dev->done);
2885
2886 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2887 kfree(dev);
2888}
2889
2890
2891/* enable SRAM caching if SRAM detected */
2892static void sram_init(struct langwell_udc *dev)
2893{
2894 struct pci_dev *pdev = dev->pdev;
2895
2896 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2897
2898 dev->sram_addr = pci_resource_start(pdev, 1);
2899 dev->sram_size = pci_resource_len(pdev, 1);
2900 dev_info(&dev->pdev->dev, "Found private SRAM at %x size:%x\n",
2901 dev->sram_addr, dev->sram_size);
2902 dev->got_sram = 1;
2903
2904 if (pci_request_region(pdev, 1, kobject_name(&pdev->dev.kobj))) {
2905 dev_warn(&dev->pdev->dev, "SRAM request failed\n");
2906 dev->got_sram = 0;
2907 } else if (!dma_declare_coherent_memory(&pdev->dev, dev->sram_addr,
2908 dev->sram_addr, dev->sram_size, DMA_MEMORY_MAP)) {
2909 dev_warn(&dev->pdev->dev, "SRAM DMA declare failed\n");
2910 pci_release_region(pdev, 1);
2911 dev->got_sram = 0;
2912 }
2913
2914 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2915}
2916
2917
2918/* release SRAM caching */
2919static void sram_deinit(struct langwell_udc *dev)
2920{
2921 struct pci_dev *pdev = dev->pdev;
2922
2923 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2924
2925 dma_release_declared_memory(&pdev->dev);
2926 pci_release_region(pdev, 1);
2927
2928 dev->got_sram = 0;
2929
2930 dev_info(&dev->pdev->dev, "release SRAM caching\n");
2931 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2932}
2933
2934
2935/* tear down the binding between this driver and the pci device */
2936static void langwell_udc_remove(struct pci_dev *pdev)
2937{
2938 struct langwell_udc *dev = pci_get_drvdata(pdev);
2939
2940 DECLARE_COMPLETION(done);
2941
2942 BUG_ON(dev->driver);
2943 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
2944
2945 dev->done = &done;
2946
2947 /* free dTD dma_pool and dQH */
2948 if (dev->dtd_pool)
2949 dma_pool_destroy(dev->dtd_pool);
2950
2951 if (dev->ep_dqh)
2952 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
2953 dev->ep_dqh, dev->ep_dqh_dma);
2954
2955 /* release SRAM caching */
2956 if (dev->has_sram && dev->got_sram)
2957 sram_deinit(dev);
2958
2959 if (dev->status_req) {
2960 kfree(dev->status_req->req.buf);
2961 kfree(dev->status_req);
2962 }
2963
2964 kfree(dev->ep);
2965
2966 /* disable IRQ handler */
2967 if (dev->got_irq)
2968 free_irq(pdev->irq, dev);
2969
2970 if (dev->cap_regs)
2971 iounmap(dev->cap_regs);
2972
2973 if (dev->region)
2974 release_mem_region(pci_resource_start(pdev, 0),
2975 pci_resource_len(pdev, 0));
2976
2977 if (dev->enabled)
2978 pci_disable_device(pdev);
2979
2980 dev->cap_regs = NULL;
2981
2982 dev_info(&dev->pdev->dev, "unbind\n");
2983 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
2984
2985 device_unregister(&dev->gadget.dev);
2986 device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
2987 device_remove_file(&pdev->dev, &dev_attr_remote_wakeup);
2988
2989 pci_set_drvdata(pdev, NULL);
2990
2991 /* free dev, wait for the release() finished */
2992 wait_for_completion(&done);
2993}
2994
2995
2996/*
2997 * wrap this driver around the specified device, but
2998 * don't respond over USB until a gadget driver binds to us.
2999 */
3000static int langwell_udc_probe(struct pci_dev *pdev,
3001 const struct pci_device_id *id)
3002{
3003 struct langwell_udc *dev;
3004 unsigned long resource, len;
3005 void __iomem *base = NULL;
3006 size_t size;
3007 int retval;
3008
3009 /* alloc, and start init */
3010 dev = kzalloc(sizeof *dev, GFP_KERNEL);
3011 if (dev == NULL) {
3012 retval = -ENOMEM;
3013 goto error;
3014 }
3015
3016 /* initialize device spinlock */
3017 spin_lock_init(&dev->lock);
3018
3019 dev->pdev = pdev;
3020 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3021
3022 pci_set_drvdata(pdev, dev);
3023
3024 /* now all the pci goodies ... */
3025 if (pci_enable_device(pdev) < 0) {
3026 retval = -ENODEV;
3027 goto error;
3028 }
3029 dev->enabled = 1;
3030
3031 /* control register: BAR 0 */
3032 resource = pci_resource_start(pdev, 0);
3033 len = pci_resource_len(pdev, 0);
3034 if (!request_mem_region(resource, len, driver_name)) {
3035 dev_err(&dev->pdev->dev, "controller already in use\n");
3036 retval = -EBUSY;
3037 goto error;
3038 }
3039 dev->region = 1;
3040
3041 base = ioremap_nocache(resource, len);
3042 if (base == NULL) {
3043 dev_err(&dev->pdev->dev, "can't map memory\n");
3044 retval = -EFAULT;
3045 goto error;
3046 }
3047
3048 dev->cap_regs = (struct langwell_cap_regs __iomem *) base;
3049 dev_vdbg(&dev->pdev->dev, "dev->cap_regs: %p\n", dev->cap_regs);
3050 dev->op_regs = (struct langwell_op_regs __iomem *)
3051 (base + OP_REG_OFFSET);
3052 dev_vdbg(&dev->pdev->dev, "dev->op_regs: %p\n", dev->op_regs);
3053
3054 /* irq setup after old hardware is cleaned up */
3055 if (!pdev->irq) {
3056 dev_err(&dev->pdev->dev, "No IRQ. Check PCI setup!\n");
3057 retval = -ENODEV;
3058 goto error;
3059 }
3060
3061 dev->has_sram = 1;
3062 dev->got_sram = 0;
3063 dev_vdbg(&dev->pdev->dev, "dev->has_sram: %d\n", dev->has_sram);
3064
3065 /* enable SRAM caching if detected */
3066 if (dev->has_sram && !dev->got_sram)
3067 sram_init(dev);
3068
3069 dev_info(&dev->pdev->dev,
3070 "irq %d, io mem: 0x%08lx, len: 0x%08lx, pci mem 0x%p\n",
3071 pdev->irq, resource, len, base);
3072 /* enables bus-mastering for device dev */
3073 pci_set_master(pdev);
3074
3075 if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3076 driver_name, dev) != 0) {
3077 dev_err(&dev->pdev->dev,
3078 "request interrupt %d failed\n", pdev->irq);
3079 retval = -EBUSY;
3080 goto error;
3081 }
3082 dev->got_irq = 1;
3083
3084 /* set stopped bit */
3085 dev->stopped = 1;
3086
3087 /* capabilities and endpoint number */
3088 dev->lpm = (readl(&dev->cap_regs->hccparams) & HCC_LEN) ? 1 : 0;
3089 dev->dciversion = readw(&dev->cap_regs->dciversion);
3090 dev->devcap = (readl(&dev->cap_regs->dccparams) & DEVCAP) ? 1 : 0;
3091 dev_vdbg(&dev->pdev->dev, "dev->lpm: %d\n", dev->lpm);
3092 dev_vdbg(&dev->pdev->dev, "dev->dciversion: 0x%04x\n",
3093 dev->dciversion);
3094 dev_vdbg(&dev->pdev->dev, "dccparams: 0x%08x\n",
3095 readl(&dev->cap_regs->dccparams));
3096 dev_vdbg(&dev->pdev->dev, "dev->devcap: %d\n", dev->devcap);
3097 if (!dev->devcap) {
3098 dev_err(&dev->pdev->dev, "can't support device mode\n");
3099 retval = -ENODEV;
3100 goto error;
3101 }
3102
3103 /* a pair of endpoints (out/in) for each address */
3104 dev->ep_max = DEN(readl(&dev->cap_regs->dccparams)) * 2;
3105 dev_vdbg(&dev->pdev->dev, "dev->ep_max: %d\n", dev->ep_max);
3106
3107 /* allocate endpoints memory */
3108 dev->ep = kzalloc(sizeof(struct langwell_ep) * dev->ep_max,
3109 GFP_KERNEL);
3110 if (!dev->ep) {
3111 dev_err(&dev->pdev->dev, "allocate endpoints memory failed\n");
3112 retval = -ENOMEM;
3113 goto error;
3114 }
3115
3116 /* allocate device dQH memory */
3117 size = dev->ep_max * sizeof(struct langwell_dqh);
3118 dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3119 if (size < DQH_ALIGNMENT)
3120 size = DQH_ALIGNMENT;
3121 else if ((size % DQH_ALIGNMENT) != 0) {
3122 size += DQH_ALIGNMENT + 1;
3123 size &= ~(DQH_ALIGNMENT - 1);
3124 }
3125 dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3126 &dev->ep_dqh_dma, GFP_KERNEL);
3127 if (!dev->ep_dqh) {
3128 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3129 retval = -ENOMEM;
3130 goto error;
3131 }
3132 dev->ep_dqh_size = size;
3133 dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3134
3135 /* initialize ep0 status request structure */
3136 dev->status_req = kzalloc(sizeof(struct langwell_request), GFP_KERNEL);
3137 if (!dev->status_req) {
3138 dev_err(&dev->pdev->dev,
3139 "allocate status_req memory failed\n");
3140 retval = -ENOMEM;
3141 goto error;
3142 }
3143 INIT_LIST_HEAD(&dev->status_req->queue);
3144
3145 /* allocate a small amount of memory to get valid address */
3146 dev->status_req->req.buf = kmalloc(8, GFP_KERNEL);
3147 dev->status_req->req.dma = virt_to_phys(dev->status_req->req.buf);
3148
3149 dev->resume_state = USB_STATE_NOTATTACHED;
3150 dev->usb_state = USB_STATE_POWERED;
3151 dev->ep0_dir = USB_DIR_OUT;
3152
3153 /* remote wakeup reset to 0 when the device is reset */
3154 dev->remote_wakeup = 0;
3155 dev->dev_status = 1 << USB_DEVICE_SELF_POWERED;
3156
3157 /* reset device controller */
3158 langwell_udc_reset(dev);
3159
3160 /* initialize gadget structure */
3161 dev->gadget.ops = &langwell_ops; /* usb_gadget_ops */
3162 dev->gadget.ep0 = &dev->ep[0].ep; /* gadget ep0 */
3163 INIT_LIST_HEAD(&dev->gadget.ep_list); /* ep_list */
3164 dev->gadget.speed = USB_SPEED_UNKNOWN; /* speed */
3165 dev->gadget.max_speed = USB_SPEED_HIGH; /* support dual speed */
3166
3167 /* the "gadget" abstracts/virtualizes the controller */
3168 dev_set_name(&dev->gadget.dev, "gadget");
3169 dev->gadget.dev.parent = &pdev->dev;
3170 dev->gadget.dev.dma_mask = pdev->dev.dma_mask;
3171 dev->gadget.dev.release = gadget_release;
3172 dev->gadget.name = driver_name; /* gadget name */
3173
3174 /* controller endpoints reinit */
3175 eps_reinit(dev);
3176
3177 /* reset ep0 dQH and endptctrl */
3178 ep0_reset(dev);
3179
3180 /* create dTD dma_pool resource */
3181 dev->dtd_pool = dma_pool_create("langwell_dtd",
3182 &dev->pdev->dev,
3183 sizeof(struct langwell_dtd),
3184 DTD_ALIGNMENT,
3185 DMA_BOUNDARY);
3186
3187 if (!dev->dtd_pool) {
3188 retval = -ENOMEM;
3189 goto error;
3190 }
3191
3192 /* done */
3193 dev_info(&dev->pdev->dev, "%s\n", driver_desc);
3194 dev_info(&dev->pdev->dev, "irq %d, pci mem %p\n", pdev->irq, base);
3195 dev_info(&dev->pdev->dev, "Driver version: " DRIVER_VERSION "\n");
3196 dev_info(&dev->pdev->dev, "Support (max) %d endpoints\n", dev->ep_max);
3197 dev_info(&dev->pdev->dev, "Device interface version: 0x%04x\n",
3198 dev->dciversion);
3199 dev_info(&dev->pdev->dev, "Controller mode: %s\n",
3200 dev->devcap ? "Device" : "Host");
3201 dev_info(&dev->pdev->dev, "Support USB LPM: %s\n",
3202 dev->lpm ? "Yes" : "No");
3203
3204 dev_vdbg(&dev->pdev->dev,
3205 "After langwell_udc_probe(), print all registers:\n");
3206 print_all_registers(dev);
3207
3208 retval = device_register(&dev->gadget.dev);
3209 if (retval)
3210 goto error;
3211
3212 retval = usb_add_gadget_udc(&pdev->dev, &dev->gadget);
3213 if (retval)
3214 goto error;
3215
3216 retval = device_create_file(&pdev->dev, &dev_attr_langwell_udc);
3217 if (retval)
3218 goto error;
3219
3220 retval = device_create_file(&pdev->dev, &dev_attr_remote_wakeup);
3221 if (retval)
3222 goto error_attr1;
3223
3224 dev_vdbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3225 return 0;
3226
3227error_attr1:
3228 device_remove_file(&pdev->dev, &dev_attr_langwell_udc);
3229error:
3230 if (dev) {
3231 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3232 langwell_udc_remove(pdev);
3233 }
3234
3235 return retval;
3236}
3237
3238
3239/* device controller suspend */
3240static int langwell_udc_suspend(struct pci_dev *pdev, pm_message_t state)
3241{
3242 struct langwell_udc *dev = pci_get_drvdata(pdev);
3243
3244 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3245
3246 usb_del_gadget_udc(&dev->gadget);
3247 /* disable interrupt and set controller to stop state */
3248 langwell_udc_stop(dev);
3249
3250 /* disable IRQ handler */
3251 if (dev->got_irq)
3252 free_irq(pdev->irq, dev);
3253 dev->got_irq = 0;
3254
3255 /* save PCI state */
3256 pci_save_state(pdev);
3257
3258 spin_lock_irq(&dev->lock);
3259 /* stop all usb activities */
3260 stop_activity(dev);
3261 spin_unlock_irq(&dev->lock);
3262
3263 /* free dTD dma_pool and dQH */
3264 if (dev->dtd_pool)
3265 dma_pool_destroy(dev->dtd_pool);
3266
3267 if (dev->ep_dqh)
3268 dma_free_coherent(&pdev->dev, dev->ep_dqh_size,
3269 dev->ep_dqh, dev->ep_dqh_dma);
3270
3271 /* release SRAM caching */
3272 if (dev->has_sram && dev->got_sram)
3273 sram_deinit(dev);
3274
3275 /* set device power state */
3276 pci_set_power_state(pdev, PCI_D3hot);
3277
3278 /* enter PHY low power suspend */
3279 if (dev->pdev->device != 0x0829)
3280 langwell_phy_low_power(dev, 1);
3281
3282 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3283 return 0;
3284}
3285
3286
3287/* device controller resume */
3288static int langwell_udc_resume(struct pci_dev *pdev)
3289{
3290 struct langwell_udc *dev = pci_get_drvdata(pdev);
3291 size_t size;
3292
3293 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3294
3295 /* exit PHY low power suspend */
3296 if (dev->pdev->device != 0x0829)
3297 langwell_phy_low_power(dev, 0);
3298
3299 /* set device D0 power state */
3300 pci_set_power_state(pdev, PCI_D0);
3301
3302 /* enable SRAM caching if detected */
3303 if (dev->has_sram && !dev->got_sram)
3304 sram_init(dev);
3305
3306 /* allocate device dQH memory */
3307 size = dev->ep_max * sizeof(struct langwell_dqh);
3308 dev_vdbg(&dev->pdev->dev, "orig size = %zd\n", size);
3309 if (size < DQH_ALIGNMENT)
3310 size = DQH_ALIGNMENT;
3311 else if ((size % DQH_ALIGNMENT) != 0) {
3312 size += DQH_ALIGNMENT + 1;
3313 size &= ~(DQH_ALIGNMENT - 1);
3314 }
3315 dev->ep_dqh = dma_alloc_coherent(&pdev->dev, size,
3316 &dev->ep_dqh_dma, GFP_KERNEL);
3317 if (!dev->ep_dqh) {
3318 dev_err(&dev->pdev->dev, "allocate dQH memory failed\n");
3319 return -ENOMEM;
3320 }
3321 dev->ep_dqh_size = size;
3322 dev_vdbg(&dev->pdev->dev, "ep_dqh_size = %zd\n", dev->ep_dqh_size);
3323
3324 /* create dTD dma_pool resource */
3325 dev->dtd_pool = dma_pool_create("langwell_dtd",
3326 &dev->pdev->dev,
3327 sizeof(struct langwell_dtd),
3328 DTD_ALIGNMENT,
3329 DMA_BOUNDARY);
3330
3331 if (!dev->dtd_pool)
3332 return -ENOMEM;
3333
3334 /* restore PCI state */
3335 pci_restore_state(pdev);
3336
3337 /* enable IRQ handler */
3338 if (request_irq(pdev->irq, langwell_irq, IRQF_SHARED,
3339 driver_name, dev) != 0) {
3340 dev_err(&dev->pdev->dev, "request interrupt %d failed\n",
3341 pdev->irq);
3342 return -EBUSY;
3343 }
3344 dev->got_irq = 1;
3345
3346 /* reset and start controller to run state */
3347 if (dev->stopped) {
3348 /* reset device controller */
3349 langwell_udc_reset(dev);
3350
3351 /* reset ep0 dQH and endptctrl */
3352 ep0_reset(dev);
3353
3354 /* start device if gadget is loaded */
3355 if (dev->driver)
3356 langwell_udc_start(dev);
3357 }
3358
3359 /* reset USB status */
3360 dev->usb_state = USB_STATE_ATTACHED;
3361 dev->ep0_state = WAIT_FOR_SETUP;
3362 dev->ep0_dir = USB_DIR_OUT;
3363
3364 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3365 return 0;
3366}
3367
3368
3369/* pci driver shutdown */
3370static void langwell_udc_shutdown(struct pci_dev *pdev)
3371{
3372 struct langwell_udc *dev = pci_get_drvdata(pdev);
3373 u32 usbmode;
3374
3375 dev_dbg(&dev->pdev->dev, "---> %s()\n", __func__);
3376
3377 /* reset controller mode to IDLE */
3378 usbmode = readl(&dev->op_regs->usbmode);
3379 dev_dbg(&dev->pdev->dev, "usbmode = 0x%08x\n", usbmode);
3380 usbmode &= (~3 | MODE_IDLE);
3381 writel(usbmode, &dev->op_regs->usbmode);
3382
3383 dev_dbg(&dev->pdev->dev, "<--- %s()\n", __func__);
3384}
3385
3386/*-------------------------------------------------------------------------*/
3387
3388static const struct pci_device_id pci_ids[] = { {
3389 .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
3390 .class_mask = ~0,
3391 .vendor = 0x8086,
3392 .device = 0x0811,
3393 .subvendor = PCI_ANY_ID,
3394 .subdevice = PCI_ANY_ID,
3395}, { /* end: all zeroes */ }
3396};
3397
3398MODULE_DEVICE_TABLE(pci, pci_ids);
3399
3400
3401static struct pci_driver langwell_pci_driver = {
3402 .name = (char *) driver_name,
3403 .id_table = pci_ids,
3404
3405 .probe = langwell_udc_probe,
3406 .remove = langwell_udc_remove,
3407
3408 /* device controller suspend/resume */
3409 .suspend = langwell_udc_suspend,
3410 .resume = langwell_udc_resume,
3411
3412 .shutdown = langwell_udc_shutdown,
3413};
3414
3415
3416static int __init init(void)
3417{
3418 return pci_register_driver(&langwell_pci_driver);
3419}
3420module_init(init);
3421
3422
3423static void __exit cleanup(void)
3424{
3425 pci_unregister_driver(&langwell_pci_driver);
3426}
3427module_exit(cleanup);
3428
3429
3430MODULE_DESCRIPTION(DRIVER_DESC);
3431MODULE_AUTHOR("Xiaochen Shen <xiaochen.shen@intel.com>");
3432MODULE_VERSION(DRIVER_VERSION);
3433MODULE_LICENSE("GPL");
3434
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 01:28:44 -0500