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path: root/drivers/usb/dwc3/core.h
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Diffstat (limited to 'drivers/usb/dwc3/core.h')
-rw-r--r--drivers/usb/dwc3/core.h22
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 696b20a8b1f..81d1c0aeb6c 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -145,22 +145,22 @@
145/* Bit fields */ 145/* Bit fields */
146 146
147/* Global Configuration Register */ 147/* Global Configuration Register */
148#define DWC3_GCTL_PWRDNSCALE(n) (n << 19) 148#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
149#define DWC3_GCTL_U2RSTECN (1 << 16) 149#define DWC3_GCTL_U2RSTECN (1 << 16)
150#define DWC3_GCTL_RAMCLKSEL(x) ((x & DWC3_GCTL_CLK_MASK) << 6) 150#define DWC3_GCTL_RAMCLKSEL(x) (((x) & DWC3_GCTL_CLK_MASK) << 6)
151#define DWC3_GCTL_CLK_BUS (0) 151#define DWC3_GCTL_CLK_BUS (0)
152#define DWC3_GCTL_CLK_PIPE (1) 152#define DWC3_GCTL_CLK_PIPE (1)
153#define DWC3_GCTL_CLK_PIPEHALF (2) 153#define DWC3_GCTL_CLK_PIPEHALF (2)
154#define DWC3_GCTL_CLK_MASK (3) 154#define DWC3_GCTL_CLK_MASK (3)
155 155
156#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12) 156#define DWC3_GCTL_PRTCAP(n) (((n) & (3 << 12)) >> 12)
157#define DWC3_GCTL_PRTCAPDIR(n) (n << 12) 157#define DWC3_GCTL_PRTCAPDIR(n) ((n) << 12)
158#define DWC3_GCTL_PRTCAP_HOST 1 158#define DWC3_GCTL_PRTCAP_HOST 1
159#define DWC3_GCTL_PRTCAP_DEVICE 2 159#define DWC3_GCTL_PRTCAP_DEVICE 2
160#define DWC3_GCTL_PRTCAP_OTG 3 160#define DWC3_GCTL_PRTCAP_OTG 3
161 161
162#define DWC3_GCTL_CORESOFTRESET (1 << 11) 162#define DWC3_GCTL_CORESOFTRESET (1 << 11)
163#define DWC3_GCTL_SCALEDOWN(n) (n << 4) 163#define DWC3_GCTL_SCALEDOWN(n) ((n) << 4)
164#define DWC3_GCTL_DISSCRAMBLE (1 << 3) 164#define DWC3_GCTL_DISSCRAMBLE (1 << 3)
165#define DWC3_GCTL_DSBLCLKGTNG (1 << 0) 165#define DWC3_GCTL_DSBLCLKGTNG (1 << 0)
166 166
@@ -177,7 +177,7 @@
177#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000) 177#define DWC3_GTXFIFOSIZ_TXFSTADDR(n) ((n) & 0xffff0000)
178 178
179/* Global HWPARAMS1 Register */ 179/* Global HWPARAMS1 Register */
180#define DWC3_GHWPARAMS1_EN_PWROPT(n) ((n & (3 << 24)) >> 24) 180#define DWC3_GHWPARAMS1_EN_PWROPT(n) (((n) & (3 << 24)) >> 24)
181#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0 181#define DWC3_GHWPARAMS1_EN_PWROPT_NO 0
182#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1 182#define DWC3_GHWPARAMS1_EN_PWROPT_CLK 1
183 183
@@ -273,10 +273,10 @@
273 273
274/* Device Endpoint Command Register */ 274/* Device Endpoint Command Register */
275#define DWC3_DEPCMD_PARAM_SHIFT 16 275#define DWC3_DEPCMD_PARAM_SHIFT 16
276#define DWC3_DEPCMD_PARAM(x) (x << DWC3_DEPCMD_PARAM_SHIFT) 276#define DWC3_DEPCMD_PARAM(x) ((x) << DWC3_DEPCMD_PARAM_SHIFT)
277#define DWC3_DEPCMD_GET_RSC_IDX(x) ((x >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f) 277#define DWC3_DEPCMD_GET_RSC_IDX(x) (((x) >> DWC3_DEPCMD_PARAM_SHIFT) & 0x7f)
278#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12) 278#define DWC3_DEPCMD_STATUS_MASK (0x0f << 12)
279#define DWC3_DEPCMD_STATUS(x) ((x & DWC3_DEPCMD_STATUS_MASK) >> 12) 279#define DWC3_DEPCMD_STATUS(x) (((x) & DWC3_DEPCMD_STATUS_MASK) >> 12)
280#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11) 280#define DWC3_DEPCMD_HIPRI_FORCERM (1 << 11)
281#define DWC3_DEPCMD_CMDACT (1 << 10) 281#define DWC3_DEPCMD_CMDACT (1 << 10)
282#define DWC3_DEPCMD_CMDIOC (1 << 8) 282#define DWC3_DEPCMD_CMDIOC (1 << 8)
@@ -683,9 +683,9 @@ struct dwc3_event_depevt {
683#define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3) 683#define DEPEVT_STATUS_TRANSFER_ACTIVE (1 << 3)
684 684
685/* Within XferComplete */ 685/* Within XferComplete */
686#define DEPEVT_STATUS_BUSERR (1 << 0) 686#define DEPEVT_STATUS_BUSERR (1 << 0)
687#define DEPEVT_STATUS_SHORT (1 << 1) 687#define DEPEVT_STATUS_SHORT (1 << 1)
688#define DEPEVT_STATUS_IOC (1 << 2) 688#define DEPEVT_STATUS_IOC (1 << 2)
689#define DEPEVT_STATUS_LST (1 << 3) 689#define DEPEVT_STATUS_LST (1 << 3)
690 690
691/* Stream event only */ 691/* Stream event only */