diff options
Diffstat (limited to 'drivers/tty/serial/imx.c')
-rw-r--r-- | drivers/tty/serial/imx.c | 261 |
1 files changed, 62 insertions, 199 deletions
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c index 59819121fe9..7e91b3d368c 100644 --- a/drivers/tty/serial/imx.c +++ b/drivers/tty/serial/imx.c | |||
@@ -47,11 +47,10 @@ | |||
47 | #include <linux/slab.h> | 47 | #include <linux/slab.h> |
48 | #include <linux/of.h> | 48 | #include <linux/of.h> |
49 | #include <linux/of_device.h> | 49 | #include <linux/of_device.h> |
50 | #include <linux/pinctrl/consumer.h> | ||
51 | 50 | ||
52 | #include <asm/io.h> | 51 | #include <asm/io.h> |
53 | #include <asm/irq.h> | 52 | #include <asm/irq.h> |
54 | #include <linux/platform_data/serial-imx.h> | 53 | #include <mach/imx-uart.h> |
55 | 54 | ||
56 | /* Register definitions */ | 55 | /* Register definitions */ |
57 | #define URXD0 0x0 /* Receiver Register */ | 56 | #define URXD0 0x0 /* Receiver Register */ |
@@ -103,7 +102,6 @@ | |||
103 | #define UCR2_STPB (1<<6) /* Stop */ | 102 | #define UCR2_STPB (1<<6) /* Stop */ |
104 | #define UCR2_WS (1<<5) /* Word size */ | 103 | #define UCR2_WS (1<<5) /* Word size */ |
105 | #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ | 104 | #define UCR2_RTSEN (1<<4) /* Request to send interrupt enable */ |
106 | #define UCR2_ATEN (1<<3) /* Aging Timer Enable */ | ||
107 | #define UCR2_TXEN (1<<2) /* Transmitter enabled */ | 105 | #define UCR2_TXEN (1<<2) /* Transmitter enabled */ |
108 | #define UCR2_RXEN (1<<1) /* Receiver enabled */ | 106 | #define UCR2_RXEN (1<<1) /* Receiver enabled */ |
109 | #define UCR2_SRST (1<<0) /* SW reset */ | 107 | #define UCR2_SRST (1<<0) /* SW reset */ |
@@ -132,7 +130,6 @@ | |||
132 | #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ | 130 | #define UCR4_OREN (1<<1) /* Receiver overrun interrupt enable */ |
133 | #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ | 131 | #define UCR4_DREN (1<<0) /* Recv data ready interrupt enable */ |
134 | #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ | 132 | #define UFCR_RXTL_SHF 0 /* Receiver trigger level shift */ |
135 | #define UFCR_DCEDTE (1<<6) /* DCE/DTE mode select */ | ||
136 | #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ | 133 | #define UFCR_RFDIV (7<<7) /* Reference freq divider mask */ |
137 | #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) | 134 | #define UFCR_RFDIV_REG(x) (((x) < 7 ? 6 - (x) : 6) << 7) |
138 | #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ | 135 | #define UFCR_TXTL_SHF 10 /* Transmitter trigger level shift */ |
@@ -170,6 +167,7 @@ | |||
170 | #define SERIAL_IMX_MAJOR 207 | 167 | #define SERIAL_IMX_MAJOR 207 |
171 | #define MINOR_START 16 | 168 | #define MINOR_START 16 |
172 | #define DEV_NAME "ttymxc" | 169 | #define DEV_NAME "ttymxc" |
170 | #define MAX_INTERNAL_IRQ MXC_INTERNAL_IRQS | ||
173 | 171 | ||
174 | /* | 172 | /* |
175 | * This determines how often we check the modem status signals | 173 | * This determines how often we check the modem status signals |
@@ -205,15 +203,8 @@ struct imx_port { | |||
205 | unsigned int irda_inv_rx:1; | 203 | unsigned int irda_inv_rx:1; |
206 | unsigned int irda_inv_tx:1; | 204 | unsigned int irda_inv_tx:1; |
207 | unsigned short trcv_delay; /* transceiver delay */ | 205 | unsigned short trcv_delay; /* transceiver delay */ |
208 | struct clk *clk_ipg; | 206 | struct clk *clk; |
209 | struct clk *clk_per; | 207 | struct imx_uart_data *devdata; |
210 | const struct imx_uart_data *devdata; | ||
211 | }; | ||
212 | |||
213 | struct imx_port_ucrs { | ||
214 | unsigned int ucr1; | ||
215 | unsigned int ucr2; | ||
216 | unsigned int ucr3; | ||
217 | }; | 208 | }; |
218 | 209 | ||
219 | #ifdef CONFIG_IRDA | 210 | #ifdef CONFIG_IRDA |
@@ -269,27 +260,6 @@ static inline int is_imx21_uart(struct imx_port *sport) | |||
269 | } | 260 | } |
270 | 261 | ||
271 | /* | 262 | /* |
272 | * Save and restore functions for UCR1, UCR2 and UCR3 registers | ||
273 | */ | ||
274 | static void imx_port_ucrs_save(struct uart_port *port, | ||
275 | struct imx_port_ucrs *ucr) | ||
276 | { | ||
277 | /* save control registers */ | ||
278 | ucr->ucr1 = readl(port->membase + UCR1); | ||
279 | ucr->ucr2 = readl(port->membase + UCR2); | ||
280 | ucr->ucr3 = readl(port->membase + UCR3); | ||
281 | } | ||
282 | |||
283 | static void imx_port_ucrs_restore(struct uart_port *port, | ||
284 | struct imx_port_ucrs *ucr) | ||
285 | { | ||
286 | /* restore control registers */ | ||
287 | writel(ucr->ucr1, port->membase + UCR1); | ||
288 | writel(ucr->ucr2, port->membase + UCR2); | ||
289 | writel(ucr->ucr3, port->membase + UCR3); | ||
290 | } | ||
291 | |||
292 | /* | ||
293 | * Handle any change of modem status signal since we were last called. | 263 | * Handle any change of modem status signal since we were last called. |
294 | */ | 264 | */ |
295 | static void imx_mctrl_check(struct imx_port *sport) | 265 | static void imx_mctrl_check(struct imx_port *sport) |
@@ -538,10 +508,8 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) | |||
538 | if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) | 508 | if (uart_handle_sysrq_char(&sport->port, (unsigned char)rx)) |
539 | continue; | 509 | continue; |
540 | 510 | ||
541 | if (unlikely(rx & URXD_ERR)) { | 511 | if (rx & (URXD_PRERR | URXD_OVRRUN | URXD_FRMERR) ) { |
542 | if (rx & URXD_BRK) | 512 | if (rx & URXD_PRERR) |
543 | sport->port.icount.brk++; | ||
544 | else if (rx & URXD_PRERR) | ||
545 | sport->port.icount.parity++; | 513 | sport->port.icount.parity++; |
546 | else if (rx & URXD_FRMERR) | 514 | else if (rx & URXD_FRMERR) |
547 | sport->port.icount.frame++; | 515 | sport->port.icount.frame++; |
@@ -556,9 +524,7 @@ static irqreturn_t imx_rxint(int irq, void *dev_id) | |||
556 | 524 | ||
557 | rx &= sport->port.read_status_mask; | 525 | rx &= sport->port.read_status_mask; |
558 | 526 | ||
559 | if (rx & URXD_BRK) | 527 | if (rx & URXD_PRERR) |
560 | flg = TTY_BREAK; | ||
561 | else if (rx & URXD_PRERR) | ||
562 | flg = TTY_PARITY; | 528 | flg = TTY_PARITY; |
563 | else if (rx & URXD_FRMERR) | 529 | else if (rx & URXD_FRMERR) |
564 | flg = TTY_FRAME; | 530 | flg = TTY_FRAME; |
@@ -596,9 +562,6 @@ static irqreturn_t imx_int(int irq, void *dev_id) | |||
596 | if (sts & USR1_RTSD) | 562 | if (sts & USR1_RTSD) |
597 | imx_rtsint(irq, dev_id); | 563 | imx_rtsint(irq, dev_id); |
598 | 564 | ||
599 | if (sts & USR1_AWAKE) | ||
600 | writel(USR1_AWAKE, sport->port.membase + USR1); | ||
601 | |||
602 | return IRQ_HANDLED; | 565 | return IRQ_HANDLED; |
603 | } | 566 | } |
604 | 567 | ||
@@ -668,11 +631,22 @@ static void imx_break_ctl(struct uart_port *port, int break_state) | |||
668 | static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) | 631 | static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode) |
669 | { | 632 | { |
670 | unsigned int val; | 633 | unsigned int val; |
634 | unsigned int ufcr_rfdiv; | ||
635 | |||
636 | /* set receiver / transmitter trigger level. | ||
637 | * RFDIV is set such way to satisfy requested uartclk value | ||
638 | */ | ||
639 | val = TXTL << 10 | RXTL; | ||
640 | ufcr_rfdiv = (clk_get_rate(sport->clk) + sport->port.uartclk / 2) | ||
641 | / sport->port.uartclk; | ||
642 | |||
643 | if(!ufcr_rfdiv) | ||
644 | ufcr_rfdiv = 1; | ||
645 | |||
646 | val |= UFCR_RFDIV_REG(ufcr_rfdiv); | ||
671 | 647 | ||
672 | /* set receiver / transmitter trigger level */ | ||
673 | val = readl(sport->port.membase + UFCR) & (UFCR_RFDIV | UFCR_DCEDTE); | ||
674 | val |= TXTL << UFCR_TXTL_SHF | RXTL; | ||
675 | writel(val, sport->port.membase + UFCR); | 648 | writel(val, sport->port.membase + UFCR); |
649 | |||
676 | return 0; | 650 | return 0; |
677 | } | 651 | } |
678 | 652 | ||
@@ -730,7 +704,10 @@ static int imx_startup(struct uart_port *port) | |||
730 | 704 | ||
731 | /* do not use RTS IRQ on IrDA */ | 705 | /* do not use RTS IRQ on IrDA */ |
732 | if (!USE_IRDA(sport)) { | 706 | if (!USE_IRDA(sport)) { |
733 | retval = request_irq(sport->rtsirq, imx_rtsint, 0, | 707 | retval = request_irq(sport->rtsirq, imx_rtsint, |
708 | (sport->rtsirq < MAX_INTERNAL_IRQ) ? 0 : | ||
709 | IRQF_TRIGGER_FALLING | | ||
710 | IRQF_TRIGGER_RISING, | ||
734 | DRIVER_NAME, sport); | 711 | DRIVER_NAME, sport); |
735 | if (retval) | 712 | if (retval) |
736 | goto error_out3; | 713 | goto error_out3; |
@@ -744,7 +721,6 @@ static int imx_startup(struct uart_port *port) | |||
744 | } | 721 | } |
745 | } | 722 | } |
746 | 723 | ||
747 | spin_lock_irqsave(&sport->port.lock, flags); | ||
748 | /* | 724 | /* |
749 | * Finally, clear and enable interrupts | 725 | * Finally, clear and enable interrupts |
750 | */ | 726 | */ |
@@ -798,6 +774,7 @@ static int imx_startup(struct uart_port *port) | |||
798 | /* | 774 | /* |
799 | * Enable modem status interrupts | 775 | * Enable modem status interrupts |
800 | */ | 776 | */ |
777 | spin_lock_irqsave(&sport->port.lock,flags); | ||
801 | imx_enable_ms(&sport->port); | 778 | imx_enable_ms(&sport->port); |
802 | spin_unlock_irqrestore(&sport->port.lock,flags); | 779 | spin_unlock_irqrestore(&sport->port.lock,flags); |
803 | 780 | ||
@@ -827,13 +804,10 @@ static void imx_shutdown(struct uart_port *port) | |||
827 | { | 804 | { |
828 | struct imx_port *sport = (struct imx_port *)port; | 805 | struct imx_port *sport = (struct imx_port *)port; |
829 | unsigned long temp; | 806 | unsigned long temp; |
830 | unsigned long flags; | ||
831 | 807 | ||
832 | spin_lock_irqsave(&sport->port.lock, flags); | ||
833 | temp = readl(sport->port.membase + UCR2); | 808 | temp = readl(sport->port.membase + UCR2); |
834 | temp &= ~(UCR2_TXEN); | 809 | temp &= ~(UCR2_TXEN); |
835 | writel(temp, sport->port.membase + UCR2); | 810 | writel(temp, sport->port.membase + UCR2); |
836 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
837 | 811 | ||
838 | if (USE_IRDA(sport)) { | 812 | if (USE_IRDA(sport)) { |
839 | struct imxuart_platform_data *pdata; | 813 | struct imxuart_platform_data *pdata; |
@@ -862,14 +836,12 @@ static void imx_shutdown(struct uart_port *port) | |||
862 | * Disable all interrupts, port and break condition. | 836 | * Disable all interrupts, port and break condition. |
863 | */ | 837 | */ |
864 | 838 | ||
865 | spin_lock_irqsave(&sport->port.lock, flags); | ||
866 | temp = readl(sport->port.membase + UCR1); | 839 | temp = readl(sport->port.membase + UCR1); |
867 | temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); | 840 | temp &= ~(UCR1_TXMPTYEN | UCR1_RRDYEN | UCR1_RTSDEN | UCR1_UARTEN); |
868 | if (USE_IRDA(sport)) | 841 | if (USE_IRDA(sport)) |
869 | temp &= ~(UCR1_IREN); | 842 | temp &= ~(UCR1_IREN); |
870 | 843 | ||
871 | writel(temp, sport->port.membase + UCR1); | 844 | writel(temp, sport->port.membase + UCR1); |
872 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
873 | } | 845 | } |
874 | 846 | ||
875 | static void | 847 | static void |
@@ -925,8 +897,6 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
925 | ucr2 |= UCR2_PROE; | 897 | ucr2 |= UCR2_PROE; |
926 | } | 898 | } |
927 | 899 | ||
928 | del_timer_sync(&sport->timer); | ||
929 | |||
930 | /* | 900 | /* |
931 | * Ask the core to calculate the divisor for us. | 901 | * Ask the core to calculate the divisor for us. |
932 | */ | 902 | */ |
@@ -957,6 +927,8 @@ imx_set_termios(struct uart_port *port, struct ktermios *termios, | |||
957 | sport->port.ignore_status_mask |= URXD_OVRRUN; | 927 | sport->port.ignore_status_mask |= URXD_OVRRUN; |
958 | } | 928 | } |
959 | 929 | ||
930 | del_timer_sync(&sport->timer); | ||
931 | |||
960 | /* | 932 | /* |
961 | * Update the per-port timeout. | 933 | * Update the per-port timeout. |
962 | */ | 934 | */ |
@@ -1103,70 +1075,6 @@ imx_verify_port(struct uart_port *port, struct serial_struct *ser) | |||
1103 | return ret; | 1075 | return ret; |
1104 | } | 1076 | } |
1105 | 1077 | ||
1106 | #if defined(CONFIG_CONSOLE_POLL) | ||
1107 | static int imx_poll_get_char(struct uart_port *port) | ||
1108 | { | ||
1109 | struct imx_port_ucrs old_ucr; | ||
1110 | unsigned int status; | ||
1111 | unsigned char c; | ||
1112 | |||
1113 | /* save control registers */ | ||
1114 | imx_port_ucrs_save(port, &old_ucr); | ||
1115 | |||
1116 | /* disable interrupts */ | ||
1117 | writel(UCR1_UARTEN, port->membase + UCR1); | ||
1118 | writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), | ||
1119 | port->membase + UCR2); | ||
1120 | writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), | ||
1121 | port->membase + UCR3); | ||
1122 | |||
1123 | /* poll */ | ||
1124 | do { | ||
1125 | status = readl(port->membase + USR2); | ||
1126 | } while (~status & USR2_RDR); | ||
1127 | |||
1128 | /* read */ | ||
1129 | c = readl(port->membase + URXD0); | ||
1130 | |||
1131 | /* restore control registers */ | ||
1132 | imx_port_ucrs_restore(port, &old_ucr); | ||
1133 | |||
1134 | return c; | ||
1135 | } | ||
1136 | |||
1137 | static void imx_poll_put_char(struct uart_port *port, unsigned char c) | ||
1138 | { | ||
1139 | struct imx_port_ucrs old_ucr; | ||
1140 | unsigned int status; | ||
1141 | |||
1142 | /* save control registers */ | ||
1143 | imx_port_ucrs_save(port, &old_ucr); | ||
1144 | |||
1145 | /* disable interrupts */ | ||
1146 | writel(UCR1_UARTEN, port->membase + UCR1); | ||
1147 | writel(old_ucr.ucr2 & ~(UCR2_ATEN | UCR2_RTSEN | UCR2_ESCI), | ||
1148 | port->membase + UCR2); | ||
1149 | writel(old_ucr.ucr3 & ~(UCR3_DCD | UCR3_RI | UCR3_DTREN), | ||
1150 | port->membase + UCR3); | ||
1151 | |||
1152 | /* drain */ | ||
1153 | do { | ||
1154 | status = readl(port->membase + USR1); | ||
1155 | } while (~status & USR1_TRDY); | ||
1156 | |||
1157 | /* write */ | ||
1158 | writel(c, port->membase + URTX0); | ||
1159 | |||
1160 | /* flush */ | ||
1161 | do { | ||
1162 | status = readl(port->membase + USR2); | ||
1163 | } while (~status & USR2_TXDC); | ||
1164 | |||
1165 | /* restore control registers */ | ||
1166 | imx_port_ucrs_restore(port, &old_ucr); | ||
1167 | } | ||
1168 | #endif | ||
1169 | |||
1170 | static struct uart_ops imx_pops = { | 1078 | static struct uart_ops imx_pops = { |
1171 | .tx_empty = imx_tx_empty, | 1079 | .tx_empty = imx_tx_empty, |
1172 | .set_mctrl = imx_set_mctrl, | 1080 | .set_mctrl = imx_set_mctrl, |
@@ -1184,10 +1092,6 @@ static struct uart_ops imx_pops = { | |||
1184 | .request_port = imx_request_port, | 1092 | .request_port = imx_request_port, |
1185 | .config_port = imx_config_port, | 1093 | .config_port = imx_config_port, |
1186 | .verify_port = imx_verify_port, | 1094 | .verify_port = imx_verify_port, |
1187 | #if defined(CONFIG_CONSOLE_POLL) | ||
1188 | .poll_get_char = imx_poll_get_char, | ||
1189 | .poll_put_char = imx_poll_put_char, | ||
1190 | #endif | ||
1191 | }; | 1095 | }; |
1192 | 1096 | ||
1193 | static struct imx_port *imx_ports[UART_NR]; | 1097 | static struct imx_port *imx_ports[UART_NR]; |
@@ -1210,17 +1114,13 @@ static void | |||
1210 | imx_console_write(struct console *co, const char *s, unsigned int count) | 1114 | imx_console_write(struct console *co, const char *s, unsigned int count) |
1211 | { | 1115 | { |
1212 | struct imx_port *sport = imx_ports[co->index]; | 1116 | struct imx_port *sport = imx_ports[co->index]; |
1213 | struct imx_port_ucrs old_ucr; | 1117 | unsigned int old_ucr1, old_ucr2, ucr1; |
1214 | unsigned int ucr1; | ||
1215 | unsigned long flags; | ||
1216 | |||
1217 | spin_lock_irqsave(&sport->port.lock, flags); | ||
1218 | 1118 | ||
1219 | /* | 1119 | /* |
1220 | * First, save UCR1/2/3 and then disable interrupts | 1120 | * First, save UCR1/2 and then disable interrupts |
1221 | */ | 1121 | */ |
1222 | imx_port_ucrs_save(&sport->port, &old_ucr); | 1122 | ucr1 = old_ucr1 = readl(sport->port.membase + UCR1); |
1223 | ucr1 = old_ucr.ucr1; | 1123 | old_ucr2 = readl(sport->port.membase + UCR2); |
1224 | 1124 | ||
1225 | if (is_imx1_uart(sport)) | 1125 | if (is_imx1_uart(sport)) |
1226 | ucr1 |= IMX1_UCR1_UARTCLKEN; | 1126 | ucr1 |= IMX1_UCR1_UARTCLKEN; |
@@ -1229,19 +1129,18 @@ imx_console_write(struct console *co, const char *s, unsigned int count) | |||
1229 | 1129 | ||
1230 | writel(ucr1, sport->port.membase + UCR1); | 1130 | writel(ucr1, sport->port.membase + UCR1); |
1231 | 1131 | ||
1232 | writel(old_ucr.ucr2 | UCR2_TXEN, sport->port.membase + UCR2); | 1132 | writel(old_ucr2 | UCR2_TXEN, sport->port.membase + UCR2); |
1233 | 1133 | ||
1234 | uart_console_write(&sport->port, s, count, imx_console_putchar); | 1134 | uart_console_write(&sport->port, s, count, imx_console_putchar); |
1235 | 1135 | ||
1236 | /* | 1136 | /* |
1237 | * Finally, wait for transmitter to become empty | 1137 | * Finally, wait for transmitter to become empty |
1238 | * and restore UCR1/2/3 | 1138 | * and restore UCR1/2 |
1239 | */ | 1139 | */ |
1240 | while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); | 1140 | while (!(readl(sport->port.membase + USR2) & USR2_TXDC)); |
1241 | 1141 | ||
1242 | imx_port_ucrs_restore(&sport->port, &old_ucr); | 1142 | writel(old_ucr1, sport->port.membase + UCR1); |
1243 | 1143 | writel(old_ucr2, sport->port.membase + UCR2); | |
1244 | spin_unlock_irqrestore(&sport->port.lock, flags); | ||
1245 | } | 1144 | } |
1246 | 1145 | ||
1247 | /* | 1146 | /* |
@@ -1283,7 +1182,7 @@ imx_console_get_options(struct imx_port *sport, int *baud, | |||
1283 | else | 1182 | else |
1284 | ucfr_rfdiv = 6 - ucfr_rfdiv; | 1183 | ucfr_rfdiv = 6 - ucfr_rfdiv; |
1285 | 1184 | ||
1286 | uartclk = clk_get_rate(sport->clk_per); | 1185 | uartclk = clk_get_rate(sport->clk); |
1287 | uartclk /= ucfr_rfdiv; | 1186 | uartclk /= ucfr_rfdiv; |
1288 | 1187 | ||
1289 | { /* | 1188 | { /* |
@@ -1366,14 +1265,9 @@ static struct uart_driver imx_reg = { | |||
1366 | static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) | 1265 | static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) |
1367 | { | 1266 | { |
1368 | struct imx_port *sport = platform_get_drvdata(dev); | 1267 | struct imx_port *sport = platform_get_drvdata(dev); |
1369 | unsigned int val; | ||
1370 | |||
1371 | /* enable wakeup from i.MX UART */ | ||
1372 | val = readl(sport->port.membase + UCR3); | ||
1373 | val |= UCR3_AWAKEN; | ||
1374 | writel(val, sport->port.membase + UCR3); | ||
1375 | 1268 | ||
1376 | uart_suspend_port(&imx_reg, &sport->port); | 1269 | if (sport) |
1270 | uart_suspend_port(&imx_reg, &sport->port); | ||
1377 | 1271 | ||
1378 | return 0; | 1272 | return 0; |
1379 | } | 1273 | } |
@@ -1381,41 +1275,28 @@ static int serial_imx_suspend(struct platform_device *dev, pm_message_t state) | |||
1381 | static int serial_imx_resume(struct platform_device *dev) | 1275 | static int serial_imx_resume(struct platform_device *dev) |
1382 | { | 1276 | { |
1383 | struct imx_port *sport = platform_get_drvdata(dev); | 1277 | struct imx_port *sport = platform_get_drvdata(dev); |
1384 | unsigned int val; | ||
1385 | |||
1386 | /* disable wakeup from i.MX UART */ | ||
1387 | val = readl(sport->port.membase + UCR3); | ||
1388 | val &= ~UCR3_AWAKEN; | ||
1389 | writel(val, sport->port.membase + UCR3); | ||
1390 | 1278 | ||
1391 | uart_resume_port(&imx_reg, &sport->port); | 1279 | if (sport) |
1280 | uart_resume_port(&imx_reg, &sport->port); | ||
1392 | 1281 | ||
1393 | return 0; | 1282 | return 0; |
1394 | } | 1283 | } |
1395 | 1284 | ||
1396 | #ifdef CONFIG_OF | 1285 | #ifdef CONFIG_OF |
1397 | /* | ||
1398 | * This function returns 1 iff pdev isn't a device instatiated by dt, 0 iff it | ||
1399 | * could successfully get all information from dt or a negative errno. | ||
1400 | */ | ||
1401 | static int serial_imx_probe_dt(struct imx_port *sport, | 1286 | static int serial_imx_probe_dt(struct imx_port *sport, |
1402 | struct platform_device *pdev) | 1287 | struct platform_device *pdev) |
1403 | { | 1288 | { |
1289 | static int portnum = 0; | ||
1404 | struct device_node *np = pdev->dev.of_node; | 1290 | struct device_node *np = pdev->dev.of_node; |
1405 | const struct of_device_id *of_id = | 1291 | const struct of_device_id *of_id = |
1406 | of_match_device(imx_uart_dt_ids, &pdev->dev); | 1292 | of_match_device(imx_uart_dt_ids, &pdev->dev); |
1407 | int ret; | ||
1408 | 1293 | ||
1409 | if (!np) | 1294 | if (!np) |
1410 | /* no device tree device */ | 1295 | return -ENODEV; |
1411 | return 1; | ||
1412 | 1296 | ||
1413 | ret = of_alias_get_id(np, "serial"); | 1297 | sport->port.line = portnum++; |
1414 | if (ret < 0) { | 1298 | if (sport->port.line >= UART_NR) |
1415 | dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret); | 1299 | return -EINVAL; |
1416 | return ret; | ||
1417 | } | ||
1418 | sport->port.line = ret; | ||
1419 | 1300 | ||
1420 | if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) | 1301 | if (of_get_property(np, "fsl,uart-has-rtscts", NULL)) |
1421 | sport->have_rtscts = 1; | 1302 | sport->have_rtscts = 1; |
@@ -1431,7 +1312,7 @@ static int serial_imx_probe_dt(struct imx_port *sport, | |||
1431 | static inline int serial_imx_probe_dt(struct imx_port *sport, | 1312 | static inline int serial_imx_probe_dt(struct imx_port *sport, |
1432 | struct platform_device *pdev) | 1313 | struct platform_device *pdev) |
1433 | { | 1314 | { |
1434 | return 1; | 1315 | return -ENODEV; |
1435 | } | 1316 | } |
1436 | #endif | 1317 | #endif |
1437 | 1318 | ||
@@ -1460,17 +1341,14 @@ static int serial_imx_probe(struct platform_device *pdev) | |||
1460 | void __iomem *base; | 1341 | void __iomem *base; |
1461 | int ret = 0; | 1342 | int ret = 0; |
1462 | struct resource *res; | 1343 | struct resource *res; |
1463 | struct pinctrl *pinctrl; | ||
1464 | 1344 | ||
1465 | sport = kzalloc(sizeof(*sport), GFP_KERNEL); | 1345 | sport = kzalloc(sizeof(*sport), GFP_KERNEL); |
1466 | if (!sport) | 1346 | if (!sport) |
1467 | return -ENOMEM; | 1347 | return -ENOMEM; |
1468 | 1348 | ||
1469 | ret = serial_imx_probe_dt(sport, pdev); | 1349 | ret = serial_imx_probe_dt(sport, pdev); |
1470 | if (ret > 0) | 1350 | if (ret == -ENODEV) |
1471 | serial_imx_probe_pdata(sport, pdev); | 1351 | serial_imx_probe_pdata(sport, pdev); |
1472 | else if (ret < 0) | ||
1473 | goto free; | ||
1474 | 1352 | ||
1475 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1353 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1476 | if (!res) { | 1354 | if (!res) { |
@@ -1500,31 +1378,14 @@ static int serial_imx_probe(struct platform_device *pdev) | |||
1500 | sport->timer.function = imx_timeout; | 1378 | sport->timer.function = imx_timeout; |
1501 | sport->timer.data = (unsigned long)sport; | 1379 | sport->timer.data = (unsigned long)sport; |
1502 | 1380 | ||
1503 | pinctrl = devm_pinctrl_get_select_default(&pdev->dev); | 1381 | sport->clk = clk_get(&pdev->dev, "uart"); |
1504 | if (IS_ERR(pinctrl)) { | 1382 | if (IS_ERR(sport->clk)) { |
1505 | ret = PTR_ERR(pinctrl); | 1383 | ret = PTR_ERR(sport->clk); |
1506 | dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret); | ||
1507 | goto unmap; | 1384 | goto unmap; |
1508 | } | 1385 | } |
1386 | clk_enable(sport->clk); | ||
1509 | 1387 | ||
1510 | sport->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); | 1388 | sport->port.uartclk = clk_get_rate(sport->clk); |
1511 | if (IS_ERR(sport->clk_ipg)) { | ||
1512 | ret = PTR_ERR(sport->clk_ipg); | ||
1513 | dev_err(&pdev->dev, "failed to get ipg clk: %d\n", ret); | ||
1514 | goto unmap; | ||
1515 | } | ||
1516 | |||
1517 | sport->clk_per = devm_clk_get(&pdev->dev, "per"); | ||
1518 | if (IS_ERR(sport->clk_per)) { | ||
1519 | ret = PTR_ERR(sport->clk_per); | ||
1520 | dev_err(&pdev->dev, "failed to get per clk: %d\n", ret); | ||
1521 | goto unmap; | ||
1522 | } | ||
1523 | |||
1524 | clk_prepare_enable(sport->clk_per); | ||
1525 | clk_prepare_enable(sport->clk_ipg); | ||
1526 | |||
1527 | sport->port.uartclk = clk_get_rate(sport->clk_per); | ||
1528 | 1389 | ||
1529 | imx_ports[sport->port.line] = sport; | 1390 | imx_ports[sport->port.line] = sport; |
1530 | 1391 | ||
@@ -1538,15 +1399,15 @@ static int serial_imx_probe(struct platform_device *pdev) | |||
1538 | ret = uart_add_one_port(&imx_reg, &sport->port); | 1399 | ret = uart_add_one_port(&imx_reg, &sport->port); |
1539 | if (ret) | 1400 | if (ret) |
1540 | goto deinit; | 1401 | goto deinit; |
1541 | platform_set_drvdata(pdev, sport); | 1402 | platform_set_drvdata(pdev, &sport->port); |
1542 | 1403 | ||
1543 | return 0; | 1404 | return 0; |
1544 | deinit: | 1405 | deinit: |
1545 | if (pdata && pdata->exit) | 1406 | if (pdata && pdata->exit) |
1546 | pdata->exit(pdev); | 1407 | pdata->exit(pdev); |
1547 | clkput: | 1408 | clkput: |
1548 | clk_disable_unprepare(sport->clk_per); | 1409 | clk_put(sport->clk); |
1549 | clk_disable_unprepare(sport->clk_ipg); | 1410 | clk_disable(sport->clk); |
1550 | unmap: | 1411 | unmap: |
1551 | iounmap(sport->port.membase); | 1412 | iounmap(sport->port.membase); |
1552 | free: | 1413 | free: |
@@ -1564,10 +1425,12 @@ static int serial_imx_remove(struct platform_device *pdev) | |||
1564 | 1425 | ||
1565 | platform_set_drvdata(pdev, NULL); | 1426 | platform_set_drvdata(pdev, NULL); |
1566 | 1427 | ||
1567 | uart_remove_one_port(&imx_reg, &sport->port); | 1428 | if (sport) { |
1429 | uart_remove_one_port(&imx_reg, &sport->port); | ||
1430 | clk_put(sport->clk); | ||
1431 | } | ||
1568 | 1432 | ||
1569 | clk_disable_unprepare(sport->clk_per); | 1433 | clk_disable(sport->clk); |
1570 | clk_disable_unprepare(sport->clk_ipg); | ||
1571 | 1434 | ||
1572 | if (pdata && pdata->exit) | 1435 | if (pdata && pdata->exit) |
1573 | pdata->exit(pdev); | 1436 | pdata->exit(pdev); |
@@ -1606,7 +1469,7 @@ static int __init imx_serial_init(void) | |||
1606 | if (ret != 0) | 1469 | if (ret != 0) |
1607 | uart_unregister_driver(&imx_reg); | 1470 | uart_unregister_driver(&imx_reg); |
1608 | 1471 | ||
1609 | return ret; | 1472 | return 0; |
1610 | } | 1473 | } |
1611 | 1474 | ||
1612 | static void __exit imx_serial_exit(void) | 1475 | static void __exit imx_serial_exit(void) |