diff options
Diffstat (limited to 'drivers/staging/rt2860/chips')
-rw-r--r-- | drivers/staging/rt2860/chips/rt3070.c | 74 | ||||
-rw-r--r-- | drivers/staging/rt2860/chips/rt3090.c | 32 | ||||
-rw-r--r-- | drivers/staging/rt2860/chips/rt30xx.c | 273 |
3 files changed, 169 insertions, 210 deletions
diff --git a/drivers/staging/rt2860/chips/rt3070.c b/drivers/staging/rt2860/chips/rt3070.c index 5a3e668601a..eb3b214add2 100644 --- a/drivers/staging/rt2860/chips/rt3070.c +++ b/drivers/staging/rt2860/chips/rt3070.c | |||
@@ -39,12 +39,10 @@ | |||
39 | 39 | ||
40 | #include "../rt_config.h" | 40 | #include "../rt_config.h" |
41 | 41 | ||
42 | |||
43 | #ifndef RTMP_RF_RW_SUPPORT | 42 | #ifndef RTMP_RF_RW_SUPPORT |
44 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" | 43 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" |
45 | #endif // RTMP_RF_RW_SUPPORT // | 44 | #endif // RTMP_RF_RW_SUPPORT // |
46 | 45 | ||
47 | |||
48 | VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) | 46 | VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) |
49 | { | 47 | { |
50 | INT i; | 48 | INT i; |
@@ -52,61 +50,55 @@ VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) | |||
52 | 50 | ||
53 | // Driver must read EEPROM to get RfIcType before initial RF registers | 51 | // Driver must read EEPROM to get RfIcType before initial RF registers |
54 | // Initialize RF register to default value | 52 | // Initialize RF register to default value |
55 | if (IS_RT3070(pAd) || IS_RT3071(pAd)) | 53 | if (IS_RT3070(pAd) || IS_RT3071(pAd)) { |
56 | { | ||
57 | // Init RF calibration | 54 | // Init RF calibration |
58 | // Driver should toggle RF R30 bit7 before init RF registers | 55 | // Driver should toggle RF R30 bit7 before init RF registers |
59 | UINT32 RfReg = 0; | 56 | UINT32 RfReg = 0; |
60 | UINT32 data; | 57 | UINT32 data; |
61 | 58 | ||
62 | RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg); | 59 | RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR) & RfReg); |
63 | RfReg |= 0x80; | 60 | RfReg |= 0x80; |
64 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg); | 61 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR) RfReg); |
65 | RTMPusecDelay(1000); | 62 | RTMPusecDelay(1000); |
66 | RfReg &= 0x7F; | 63 | RfReg &= 0x7F; |
67 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg); | 64 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR) RfReg); |
68 | 65 | ||
69 | // Initialize RF register to default value | 66 | // Initialize RF register to default value |
70 | for (i = 0; i < NUM_RF_REG_PARMS; i++) | 67 | for (i = 0; i < NUM_RF_REG_PARMS; i++) { |
71 | { | 68 | RT30xxWriteRFRegister(pAd, |
72 | RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value); | 69 | RT30xx_RFRegTable[i].Register, |
70 | RT30xx_RFRegTable[i].Value); | ||
73 | } | 71 | } |
74 | 72 | ||
75 | // add by johnli | 73 | // add by johnli |
76 | if (IS_RT3070(pAd)) | 74 | if (IS_RT3070(pAd)) { |
77 | { | ||
78 | // | 75 | // |
79 | // The DAC issue(LDO_CFG0) has been fixed in RT3070(F). | 76 | // The DAC issue(LDO_CFG0) has been fixed in RT3070(F). |
80 | // The voltage raising patch is no longer needed for RT3070(F) | 77 | // The voltage raising patch is no longer needed for RT3070(F) |
81 | // | 78 | // |
82 | if ((pAd->MACVersion & 0xffff) < 0x0201) | 79 | if ((pAd->MACVersion & 0xffff) < 0x0201) { |
83 | { | ||
84 | // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate | 80 | // Update MAC 0x05D4 from 01xxxxxx to 0Dxxxxxx (voltage 1.2V to 1.35V) for RT3070 to improve yield rate |
85 | RTUSBReadMACRegister(pAd, LDO_CFG0, &data); | 81 | RTUSBReadMACRegister(pAd, LDO_CFG0, &data); |
86 | data = ((data & 0xF0FFFFFF) | 0x0D000000); | 82 | data = ((data & 0xF0FFFFFF) | 0x0D000000); |
87 | RTUSBWriteMACRegister(pAd, LDO_CFG0, data); | 83 | RTUSBWriteMACRegister(pAd, LDO_CFG0, data); |
88 | } | 84 | } |
89 | } | 85 | } else if (IS_RT3071(pAd)) { |
90 | else if (IS_RT3071(pAd)) | ||
91 | { | ||
92 | // Driver should set RF R6 bit6 on before init RF registers | 86 | // Driver should set RF R6 bit6 on before init RF registers |
93 | RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg); | 87 | RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR) & RfReg); |
94 | RfReg |= 0x40; | 88 | RfReg |= 0x40; |
95 | RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg); | 89 | RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR) RfReg); |
96 | 90 | ||
97 | // init R31 | 91 | // init R31 |
98 | RT30xxWriteRFRegister(pAd, RF_R31, 0x14); | 92 | RT30xxWriteRFRegister(pAd, RF_R31, 0x14); |
99 | 93 | ||
100 | // RT3071 version E has fixed this issue | 94 | // RT3071 version E has fixed this issue |
101 | if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211)) | 95 | if ((pAd->NicConfig2.field.DACTestBit == 1) |
102 | { | 96 | && ((pAd->MACVersion & 0xffff) < 0x0211)) { |
103 | // patch tx EVM issue temporarily | 97 | // patch tx EVM issue temporarily |
104 | RTUSBReadMACRegister(pAd, LDO_CFG0, &data); | 98 | RTUSBReadMACRegister(pAd, LDO_CFG0, &data); |
105 | data = ((data & 0xE0FFFFFF) | 0x0D000000); | 99 | data = ((data & 0xE0FFFFFF) | 0x0D000000); |
106 | RTUSBWriteMACRegister(pAd, LDO_CFG0, data); | 100 | RTUSBWriteMACRegister(pAd, LDO_CFG0, data); |
107 | } | 101 | } else { |
108 | else | ||
109 | { | ||
110 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); | 102 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); |
111 | data = ((data & 0xE0FFFFFF) | 0x01000000); | 103 | data = ((data & 0xE0FFFFFF) | 0x01000000); |
112 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); | 104 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); |
@@ -117,8 +109,7 @@ VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) | |||
117 | data &= ~(0x20); | 109 | data &= ~(0x20); |
118 | RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data); | 110 | RTUSBWriteMACRegister(pAd, GPIO_SWITCH, data); |
119 | } | 111 | } |
120 | 112 | //For RF filter Calibration | |
121 | //For RF filter Calibration | ||
122 | RTMPFilterCalibration(pAd); | 113 | RTMPFilterCalibration(pAd); |
123 | 114 | ||
124 | // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() | 115 | // Initialize RF R27 register, set RF R27 must be behind RTMPFilterCalibration() |
@@ -126,15 +117,12 @@ VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) | |||
126 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). | 117 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). |
127 | // Raising RF voltage is no longer needed for RT3070(F) | 118 | // Raising RF voltage is no longer needed for RT3070(F) |
128 | // | 119 | // |
129 | if ((IS_RT3070(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0201)) | 120 | if ((IS_RT3070(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0201)) { |
130 | { | ||
131 | RT30xxWriteRFRegister(pAd, RF_R27, 0x3); | 121 | RT30xxWriteRFRegister(pAd, RF_R27, 0x3); |
132 | } | 122 | } else if ((IS_RT3071(pAd)) |
133 | else if ((IS_RT3071(pAd)) && ((pAd->MACVersion & 0xffff) < 0x0211)) | 123 | && ((pAd->MACVersion & 0xffff) < 0x0211)) { |
134 | { | ||
135 | RT30xxWriteRFRegister(pAd, RF_R27, 0x3); | 124 | RT30xxWriteRFRegister(pAd, RF_R27, 0x3); |
136 | } | 125 | } |
137 | |||
138 | // set led open drain enable | 126 | // set led open drain enable |
139 | RTUSBReadMACRegister(pAd, OPT_14, &data); | 127 | RTUSBReadMACRegister(pAd, OPT_14, &data); |
140 | data |= 0x01; | 128 | data |= 0x01; |
@@ -145,29 +133,25 @@ VOID NICInitRT3070RFRegisters(IN PRTMP_ADAPTER pAd) | |||
145 | RT30xxReadRFRegister(pAd, RF_R17, &RFValue); | 133 | RT30xxReadRFRegister(pAd, RF_R17, &RFValue); |
146 | RFValue &= (~0x08); | 134 | RFValue &= (~0x08); |
147 | // to fix rx long range issue | 135 | // to fix rx long range issue |
148 | if (pAd->NicConfig2.field.ExternalLNAForG == 0) | 136 | if (pAd->NicConfig2.field.ExternalLNAForG == 0) { |
149 | { | 137 | if ((IS_RT3071(pAd) |
150 | if ((IS_RT3071(pAd) && ((pAd->MACVersion & 0xffff) >= 0x0211)) || IS_RT3070(pAd)) | 138 | && ((pAd->MACVersion & 0xffff) >= 0x0211)) |
151 | { | 139 | || IS_RT3070(pAd)) { |
152 | RFValue |= 0x20; | 140 | RFValue |= 0x20; |
153 | } | 141 | } |
154 | } | 142 | } |
155 | // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h | 143 | // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h |
156 | if (pAd->TxMixerGain24G >= 1) | 144 | if (pAd->TxMixerGain24G >= 1) { |
157 | { | 145 | RFValue &= (~0x7); // clean bit [2:0] |
158 | RFValue &= (~0x7); // clean bit [2:0] | ||
159 | RFValue |= pAd->TxMixerGain24G; | 146 | RFValue |= pAd->TxMixerGain24G; |
160 | } | 147 | } |
161 | RT30xxWriteRFRegister(pAd, RF_R17, RFValue); | 148 | RT30xxWriteRFRegister(pAd, RF_R17, RFValue); |
162 | 149 | ||
163 | if (IS_RT3071(pAd)) | 150 | if (IS_RT3071(pAd)) { |
164 | { | ||
165 | // add by johnli, RF power sequence setup, load RF normal operation-mode setup | 151 | // add by johnli, RF power sequence setup, load RF normal operation-mode setup |
166 | RT30xxLoadRFNormalModeSetup(pAd); | 152 | RT30xxLoadRFNormalModeSetup(pAd); |
167 | } | 153 | } else if (IS_RT3070(pAd)) { |
168 | else if (IS_RT3070(pAd)) | 154 | /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */ |
169 | { | ||
170 | /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem*/ | ||
171 | // LDORF_VC, RF R27 register Bit 2 to 0 | 155 | // LDORF_VC, RF R27 register Bit 2 to 0 |
172 | RT30xxReadRFRegister(pAd, RF_R27, &RFValue); | 156 | RT30xxReadRFRegister(pAd, RF_R27, &RFValue); |
173 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). | 157 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). |
diff --git a/drivers/staging/rt2860/chips/rt3090.c b/drivers/staging/rt2860/chips/rt3090.c index 35c549dc4ce..143529422f8 100644 --- a/drivers/staging/rt2860/chips/rt3090.c +++ b/drivers/staging/rt2860/chips/rt3090.c | |||
@@ -39,44 +39,39 @@ | |||
39 | 39 | ||
40 | #include "../rt_config.h" | 40 | #include "../rt_config.h" |
41 | 41 | ||
42 | |||
43 | #ifndef RTMP_RF_RW_SUPPORT | 42 | #ifndef RTMP_RF_RW_SUPPORT |
44 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" | 43 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" |
45 | #endif // RTMP_RF_RW_SUPPORT // | 44 | #endif // RTMP_RF_RW_SUPPORT // |
46 | 45 | ||
47 | |||
48 | VOID NICInitRT3090RFRegisters(IN PRTMP_ADAPTER pAd) | 46 | VOID NICInitRT3090RFRegisters(IN PRTMP_ADAPTER pAd) |
49 | { | 47 | { |
50 | INT i; | 48 | INT i; |
51 | // Driver must read EEPROM to get RfIcType before initial RF registers | 49 | // Driver must read EEPROM to get RfIcType before initial RF registers |
52 | // Initialize RF register to default value | 50 | // Initialize RF register to default value |
53 | if (IS_RT3090(pAd)) | 51 | if (IS_RT3090(pAd)) { |
54 | { | ||
55 | // Init RF calibration | 52 | // Init RF calibration |
56 | // Driver should toggle RF R30 bit7 before init RF registers | 53 | // Driver should toggle RF R30 bit7 before init RF registers |
57 | UINT32 RfReg = 0, data; | 54 | UINT32 RfReg = 0, data; |
58 | 55 | ||
59 | RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR)&RfReg); | 56 | RT30xxReadRFRegister(pAd, RF_R30, (PUCHAR) & RfReg); |
60 | RfReg |= 0x80; | 57 | RfReg |= 0x80; |
61 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg); | 58 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR) RfReg); |
62 | RTMPusecDelay(1000); | 59 | RTMPusecDelay(1000); |
63 | RfReg &= 0x7F; | 60 | RfReg &= 0x7F; |
64 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR)RfReg); | 61 | RT30xxWriteRFRegister(pAd, RF_R30, (UCHAR) RfReg); |
65 | 62 | ||
66 | // init R24, R31 | 63 | // init R24, R31 |
67 | RT30xxWriteRFRegister(pAd, RF_R24, 0x0F); | 64 | RT30xxWriteRFRegister(pAd, RF_R24, 0x0F); |
68 | RT30xxWriteRFRegister(pAd, RF_R31, 0x0F); | 65 | RT30xxWriteRFRegister(pAd, RF_R31, 0x0F); |
69 | 66 | ||
70 | // RT309x version E has fixed this issue | 67 | // RT309x version E has fixed this issue |
71 | if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211)) | 68 | if ((pAd->NicConfig2.field.DACTestBit == 1) |
72 | { | 69 | && ((pAd->MACVersion & 0xffff) < 0x0211)) { |
73 | // patch tx EVM issue temporarily | 70 | // patch tx EVM issue temporarily |
74 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); | 71 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); |
75 | data = ((data & 0xE0FFFFFF) | 0x0D000000); | 72 | data = ((data & 0xE0FFFFFF) | 0x0D000000); |
76 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); | 73 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); |
77 | } | 74 | } else { |
78 | else | ||
79 | { | ||
80 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); | 75 | RTMP_IO_READ32(pAd, LDO_CFG0, &data); |
81 | data = ((data & 0xE0FFFFFF) | 0x01000000); | 76 | data = ((data & 0xE0FFFFFF) | 0x01000000); |
82 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); | 77 | RTMP_IO_WRITE32(pAd, LDO_CFG0, data); |
@@ -88,15 +83,16 @@ VOID NICInitRT3090RFRegisters(IN PRTMP_ADAPTER pAd) | |||
88 | RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data); | 83 | RTMP_IO_WRITE32(pAd, GPIO_SWITCH, data); |
89 | 84 | ||
90 | // Initialize RF register to default value | 85 | // Initialize RF register to default value |
91 | for (i = 0; i < NUM_RF_REG_PARMS; i++) | 86 | for (i = 0; i < NUM_RF_REG_PARMS; i++) { |
92 | { | 87 | RT30xxWriteRFRegister(pAd, |
93 | RT30xxWriteRFRegister(pAd, RT30xx_RFRegTable[i].Register, RT30xx_RFRegTable[i].Value); | 88 | RT30xx_RFRegTable[i].Register, |
89 | RT30xx_RFRegTable[i].Value); | ||
94 | } | 90 | } |
95 | 91 | ||
96 | // Driver should set RF R6 bit6 on before calibration | 92 | // Driver should set RF R6 bit6 on before calibration |
97 | RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR)&RfReg); | 93 | RT30xxReadRFRegister(pAd, RF_R06, (PUCHAR) & RfReg); |
98 | RfReg |= 0x40; | 94 | RfReg |= 0x40; |
99 | RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR)RfReg); | 95 | RT30xxWriteRFRegister(pAd, RF_R06, (UCHAR) RfReg); |
100 | 96 | ||
101 | //For RF filter Calibration | 97 | //For RF filter Calibration |
102 | RTMPFilterCalibration(pAd); | 98 | RTMPFilterCalibration(pAd); |
diff --git a/drivers/staging/rt2860/chips/rt30xx.c b/drivers/staging/rt2860/chips/rt30xx.c index c69fab56898..940f731a61c 100644 --- a/drivers/staging/rt2860/chips/rt30xx.c +++ b/drivers/staging/rt2860/chips/rt30xx.c | |||
@@ -35,73 +35,82 @@ | |||
35 | -------- ---------- ---------------------------------------------- | 35 | -------- ---------- ---------------------------------------------- |
36 | */ | 36 | */ |
37 | 37 | ||
38 | |||
39 | #ifdef RT30xx | 38 | #ifdef RT30xx |
40 | 39 | ||
41 | |||
42 | #ifndef RTMP_RF_RW_SUPPORT | 40 | #ifndef RTMP_RF_RW_SUPPORT |
43 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" | 41 | #error "You Should Enable compile flag RTMP_RF_RW_SUPPORT for this chip" |
44 | #endif // RTMP_RF_RW_SUPPORT // | 42 | #endif // RTMP_RF_RW_SUPPORT // |
45 | 43 | ||
46 | #include "../rt_config.h" | 44 | #include "../rt_config.h" |
47 | 45 | ||
48 | |||
49 | // | 46 | // |
50 | // RF register initialization set | 47 | // RF register initialization set |
51 | // | 48 | // |
52 | REG_PAIR RT30xx_RFRegTable[] = { | 49 | REG_PAIR RT30xx_RFRegTable[] = { |
53 | {RF_R04, 0x40}, | 50 | {RF_R04, 0x40} |
54 | {RF_R05, 0x03}, | 51 | , |
55 | {RF_R06, 0x02}, | 52 | {RF_R05, 0x03} |
56 | {RF_R07, 0x70}, | 53 | , |
57 | {RF_R09, 0x0F}, | 54 | {RF_R06, 0x02} |
58 | {RF_R10, 0x41}, | 55 | , |
59 | {RF_R11, 0x21}, | 56 | {RF_R07, 0x70} |
60 | {RF_R12, 0x7B}, | 57 | , |
61 | {RF_R14, 0x90}, | 58 | {RF_R09, 0x0F} |
62 | {RF_R15, 0x58}, | 59 | , |
63 | {RF_R16, 0xB3}, | 60 | {RF_R10, 0x41} |
64 | {RF_R17, 0x92}, | 61 | , |
65 | {RF_R18, 0x2C}, | 62 | {RF_R11, 0x21} |
66 | {RF_R19, 0x02}, | 63 | , |
67 | {RF_R20, 0xBA}, | 64 | {RF_R12, 0x7B} |
68 | {RF_R21, 0xDB}, | 65 | , |
69 | {RF_R24, 0x16}, | 66 | {RF_R14, 0x90} |
70 | {RF_R25, 0x01}, | 67 | , |
71 | {RF_R29, 0x1F}, | 68 | {RF_R15, 0x58} |
69 | , | ||
70 | {RF_R16, 0xB3} | ||
71 | , | ||
72 | {RF_R17, 0x92} | ||
73 | , | ||
74 | {RF_R18, 0x2C} | ||
75 | , | ||
76 | {RF_R19, 0x02} | ||
77 | , | ||
78 | {RF_R20, 0xBA} | ||
79 | , | ||
80 | {RF_R21, 0xDB} | ||
81 | , | ||
82 | {RF_R24, 0x16} | ||
83 | , | ||
84 | {RF_R25, 0x01} | ||
85 | , | ||
86 | {RF_R29, 0x1F} | ||
87 | , | ||
72 | }; | 88 | }; |
73 | 89 | ||
74 | UCHAR NUM_RF_REG_PARMS = (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR)); | 90 | UCHAR NUM_RF_REG_PARMS = (sizeof(RT30xx_RFRegTable) / sizeof(REG_PAIR)); |
75 | 91 | ||
76 | |||
77 | |||
78 | // Antenna divesity use GPIO3 and EESK pin for control | 92 | // Antenna divesity use GPIO3 and EESK pin for control |
79 | // Antenna and EEPROM access are both using EESK pin, | 93 | // Antenna and EEPROM access are both using EESK pin, |
80 | // Therefor we should avoid accessing EESK at the same time | 94 | // Therefor we should avoid accessing EESK at the same time |
81 | // Then restore antenna after EEPROM access | 95 | // Then restore antenna after EEPROM access |
82 | // The original name of this function is AsicSetRxAnt(), now change to | 96 | // The original name of this function is AsicSetRxAnt(), now change to |
83 | //VOID AsicSetRxAnt( | 97 | //VOID AsicSetRxAnt( |
84 | VOID RT30xxSetRxAnt( | 98 | VOID RT30xxSetRxAnt(IN PRTMP_ADAPTER pAd, IN UCHAR Ant) |
85 | IN PRTMP_ADAPTER pAd, | ||
86 | IN UCHAR Ant) | ||
87 | { | 99 | { |
88 | UINT32 Value; | 100 | UINT32 Value; |
89 | #ifdef RTMP_MAC_PCI | 101 | #ifdef RTMP_MAC_PCI |
90 | UINT32 x; | 102 | UINT32 x; |
91 | #endif | 103 | #endif |
92 | 104 | ||
93 | if ((pAd->EepromAccess) || | 105 | if ((pAd->EepromAccess) || |
94 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) || | 106 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RESET_IN_PROGRESS)) || |
95 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) || | 107 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_HALT_IN_PROGRESS)) || |
96 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) || | 108 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_RADIO_OFF)) || |
97 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) | 109 | (RTMP_TEST_FLAG(pAd, fRTMP_ADAPTER_NIC_NOT_EXIST))) { |
98 | { | ||
99 | return; | 110 | return; |
100 | } | 111 | } |
101 | |||
102 | // the antenna selection is through firmware and MAC register(GPIO3) | 112 | // the antenna selection is through firmware and MAC register(GPIO3) |
103 | if (Ant == 0) | 113 | if (Ant == 0) { |
104 | { | ||
105 | // Main antenna | 114 | // Main antenna |
106 | #ifdef RTMP_MAC_PCI | 115 | #ifdef RTMP_MAC_PCI |
107 | RTMP_IO_READ32(pAd, E2PROM_CSR, &x); | 116 | RTMP_IO_READ32(pAd, E2PROM_CSR, &x); |
@@ -114,10 +123,9 @@ VOID RT30xxSetRxAnt( | |||
114 | RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value); | 123 | RTMP_IO_READ32(pAd, GPIO_CTRL_CFG, &Value); |
115 | Value &= ~(0x0808); | 124 | Value &= ~(0x0808); |
116 | RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); | 125 | RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); |
117 | DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to main antenna\n")); | 126 | DBGPRINT_RAW(RT_DEBUG_TRACE, |
118 | } | 127 | ("AsicSetRxAnt, switch to main antenna\n")); |
119 | else | 128 | } else { |
120 | { | ||
121 | // Aux antenna | 129 | // Aux antenna |
122 | #ifdef RTMP_MAC_PCI | 130 | #ifdef RTMP_MAC_PCI |
123 | RTMP_IO_READ32(pAd, E2PROM_CSR, &x); | 131 | RTMP_IO_READ32(pAd, E2PROM_CSR, &x); |
@@ -130,11 +138,11 @@ VOID RT30xxSetRxAnt( | |||
130 | Value &= ~(0x0808); | 138 | Value &= ~(0x0808); |
131 | Value |= 0x08; | 139 | Value |= 0x08; |
132 | RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); | 140 | RTMP_IO_WRITE32(pAd, GPIO_CTRL_CFG, Value); |
133 | DBGPRINT_RAW(RT_DEBUG_TRACE, ("AsicSetRxAnt, switch to aux antenna\n")); | 141 | DBGPRINT_RAW(RT_DEBUG_TRACE, |
142 | ("AsicSetRxAnt, switch to aux antenna\n")); | ||
134 | } | 143 | } |
135 | } | 144 | } |
136 | 145 | ||
137 | |||
138 | /* | 146 | /* |
139 | ======================================================================== | 147 | ======================================================================== |
140 | 148 | ||
@@ -151,46 +159,43 @@ VOID RT30xxSetRxAnt( | |||
151 | 159 | ||
152 | ======================================================================== | 160 | ======================================================================== |
153 | */ | 161 | */ |
154 | VOID RTMPFilterCalibration( | 162 | VOID RTMPFilterCalibration(IN PRTMP_ADAPTER pAd) |
155 | IN PRTMP_ADAPTER pAd) | ||
156 | { | 163 | { |
157 | UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue=0; | 164 | UCHAR R55x = 0, value, FilterTarget = 0x1E, BBPValue = 0; |
158 | UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0; | 165 | UINT loop = 0, count = 0, loopcnt = 0, ReTry = 0; |
159 | UCHAR RF_R24_Value = 0; | 166 | UCHAR RF_R24_Value = 0; |
160 | 167 | ||
161 | // Give bbp filter initial value | 168 | // Give bbp filter initial value |
162 | pAd->Mlme.CaliBW20RfR24 = 0x1F; | 169 | pAd->Mlme.CaliBW20RfR24 = 0x1F; |
163 | pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40 | 170 | pAd->Mlme.CaliBW40RfR24 = 0x2F; //Bit[5] must be 1 for BW 40 |
164 | 171 | ||
165 | do | 172 | do { |
166 | { | ||
167 | if (loop == 1) //BandWidth = 40 MHz | 173 | if (loop == 1) //BandWidth = 40 MHz |
168 | { | 174 | { |
169 | // Write 0x27 to RF_R24 to program filter | 175 | // Write 0x27 to RF_R24 to program filter |
170 | RF_R24_Value = 0x27; | 176 | RF_R24_Value = 0x27; |
171 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); | 177 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); |
172 | if (IS_RT3090(pAd) || IS_RT3572(pAd)|| IS_RT3390(pAd)) | 178 | if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) |
173 | FilterTarget = 0x15; | 179 | FilterTarget = 0x15; |
174 | else | 180 | else |
175 | FilterTarget = 0x19; | 181 | FilterTarget = 0x19; |
176 | 182 | ||
177 | // when calibrate BW40, BBP mask must set to BW40. | 183 | // when calibrate BW40, BBP mask must set to BW40. |
178 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); | 184 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); |
179 | BBPValue&= (~0x18); | 185 | BBPValue &= (~0x18); |
180 | BBPValue|= (0x10); | 186 | BBPValue |= (0x10); |
181 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); | 187 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); |
182 | 188 | ||
183 | // set to BW40 | 189 | // set to BW40 |
184 | RT30xxReadRFRegister(pAd, RF_R31, &value); | 190 | RT30xxReadRFRegister(pAd, RF_R31, &value); |
185 | value |= 0x20; | 191 | value |= 0x20; |
186 | RT30xxWriteRFRegister(pAd, RF_R31, value); | 192 | RT30xxWriteRFRegister(pAd, RF_R31, value); |
187 | } | 193 | } else //BandWidth = 20 MHz |
188 | else //BandWidth = 20 MHz | ||
189 | { | 194 | { |
190 | // Write 0x07 to RF_R24 to program filter | 195 | // Write 0x07 to RF_R24 to program filter |
191 | RF_R24_Value = 0x07; | 196 | RF_R24_Value = 0x07; |
192 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); | 197 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); |
193 | if (IS_RT3090(pAd) || IS_RT3572(pAd)|| IS_RT3390(pAd)) | 198 | if (IS_RT3090(pAd) || IS_RT3572(pAd) || IS_RT3390(pAd)) |
194 | FilterTarget = 0x13; | 199 | FilterTarget = 0x13; |
195 | else | 200 | else |
196 | FilterTarget = 0x16; | 201 | FilterTarget = 0x16; |
@@ -209,8 +214,7 @@ VOID RTMPFilterCalibration( | |||
209 | // Write 0x00 to BBP_R24 to set power & frequency of passband test tone | 214 | // Write 0x00 to BBP_R24 to set power & frequency of passband test tone |
210 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0); | 215 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0); |
211 | 216 | ||
212 | do | 217 | do { |
213 | { | ||
214 | // Write 0x90 to BBP_R25 to transmit test tone | 218 | // Write 0x90 to BBP_R25 to transmit test tone |
215 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); | 219 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); |
216 | 220 | ||
@@ -224,8 +228,7 @@ VOID RTMPFilterCalibration( | |||
224 | // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone | 228 | // Write 0x06 to BBP_R24 to set power & frequency of stopband test tone |
225 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06); | 229 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R24, 0x06); |
226 | 230 | ||
227 | while(TRUE) | 231 | while (TRUE) { |
228 | { | ||
229 | // Write 0x90 to BBP_R25 to transmit test tone | 232 | // Write 0x90 to BBP_R25 to transmit test tone |
230 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); | 233 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R25, 0x90); |
231 | 234 | ||
@@ -233,59 +236,47 @@ VOID RTMPFilterCalibration( | |||
233 | RTMPusecDelay(1000); | 236 | RTMPusecDelay(1000); |
234 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value); | 237 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R55, &value); |
235 | value &= 0xFF; | 238 | value &= 0xFF; |
236 | if ((R55x - value) < FilterTarget) | 239 | if ((R55x - value) < FilterTarget) { |
237 | { | 240 | RF_R24_Value++; |
238 | RF_R24_Value ++; | 241 | } else if ((R55x - value) == FilterTarget) { |
239 | } | 242 | RF_R24_Value++; |
240 | else if ((R55x - value) == FilterTarget) | 243 | count++; |
241 | { | 244 | } else { |
242 | RF_R24_Value ++; | ||
243 | count ++; | ||
244 | } | ||
245 | else | ||
246 | { | ||
247 | break; | 245 | break; |
248 | } | 246 | } |
249 | 247 | ||
250 | // prevent infinite loop cause driver hang. | 248 | // prevent infinite loop cause driver hang. |
251 | if (loopcnt++ > 100) | 249 | if (loopcnt++ > 100) { |
252 | { | 250 | DBGPRINT(RT_DEBUG_ERROR, |
253 | DBGPRINT(RT_DEBUG_ERROR, ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", loopcnt)); | 251 | ("RTMPFilterCalibration - can't find a valid value, loopcnt=%d stop calibrating", |
252 | loopcnt)); | ||
254 | break; | 253 | break; |
255 | } | 254 | } |
256 | |||
257 | // Write RF_R24 to program filter | 255 | // Write RF_R24 to program filter |
258 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); | 256 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); |
259 | } | 257 | } |
260 | 258 | ||
261 | if (count > 0) | 259 | if (count > 0) { |
262 | { | ||
263 | RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0)); | 260 | RF_R24_Value = RF_R24_Value - ((count) ? (1) : (0)); |
264 | } | 261 | } |
265 | |||
266 | // Store for future usage | 262 | // Store for future usage |
267 | if (loopcnt < 100) | 263 | if (loopcnt < 100) { |
268 | { | 264 | if (loop++ == 0) { |
269 | if (loop++ == 0) | ||
270 | { | ||
271 | //BandWidth = 20 MHz | 265 | //BandWidth = 20 MHz |
272 | pAd->Mlme.CaliBW20RfR24 = (UCHAR)RF_R24_Value; | 266 | pAd->Mlme.CaliBW20RfR24 = (UCHAR) RF_R24_Value; |
273 | } | 267 | } else { |
274 | else | ||
275 | { | ||
276 | //BandWidth = 40 MHz | 268 | //BandWidth = 40 MHz |
277 | pAd->Mlme.CaliBW40RfR24 = (UCHAR)RF_R24_Value; | 269 | pAd->Mlme.CaliBW40RfR24 = (UCHAR) RF_R24_Value; |
278 | break; | 270 | break; |
279 | } | 271 | } |
280 | } | 272 | } else |
281 | else | ||
282 | break; | 273 | break; |
283 | 274 | ||
284 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); | 275 | RT30xxWriteRFRegister(pAd, RF_R24, RF_R24_Value); |
285 | 276 | ||
286 | // reset count | 277 | // reset count |
287 | count = 0; | 278 | count = 0; |
288 | } while(TRUE); | 279 | } while (TRUE); |
289 | 280 | ||
290 | // | 281 | // |
291 | // Set back to initial state | 282 | // Set back to initial state |
@@ -298,13 +289,14 @@ VOID RTMPFilterCalibration( | |||
298 | 289 | ||
299 | // set BBP back to BW20 | 290 | // set BBP back to BW20 |
300 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); | 291 | RTMP_BBP_IO_READ8_BY_REG_ID(pAd, BBP_R4, &BBPValue); |
301 | BBPValue&= (~0x18); | 292 | BBPValue &= (~0x18); |
302 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); | 293 | RTMP_BBP_IO_WRITE8_BY_REG_ID(pAd, BBP_R4, BBPValue); |
303 | 294 | ||
304 | DBGPRINT(RT_DEBUG_TRACE, ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24)); | 295 | DBGPRINT(RT_DEBUG_TRACE, |
296 | ("RTMPFilterCalibration - CaliBW20RfR24=0x%x, CaliBW40RfR24=0x%x\n", | ||
297 | pAd->Mlme.CaliBW20RfR24, pAd->Mlme.CaliBW40RfR24)); | ||
305 | } | 298 | } |
306 | 299 | ||
307 | |||
308 | // add by johnli, RF power sequence setup | 300 | // add by johnli, RF power sequence setup |
309 | /* | 301 | /* |
310 | ========================================================================== | 302 | ========================================================================== |
@@ -314,8 +306,7 @@ VOID RTMPFilterCalibration( | |||
314 | 306 | ||
315 | ========================================================================== | 307 | ========================================================================== |
316 | */ | 308 | */ |
317 | VOID RT30xxLoadRFNormalModeSetup( | 309 | VOID RT30xxLoadRFNormalModeSetup(IN PRTMP_ADAPTER pAd) |
318 | IN PRTMP_ADAPTER pAd) | ||
319 | { | 310 | { |
320 | UCHAR RFValue; | 311 | UCHAR RFValue; |
321 | 312 | ||
@@ -330,22 +321,22 @@ VOID RT30xxLoadRFNormalModeSetup( | |||
330 | RT30xxWriteRFRegister(pAd, RF_R15, RFValue); | 321 | RT30xxWriteRFRegister(pAd, RF_R15, RFValue); |
331 | 322 | ||
332 | /* move to NICInitRT30xxRFRegisters | 323 | /* move to NICInitRT30xxRFRegisters |
333 | // TX_LO1_en, RF R17 register Bit 3 to 0 | 324 | // TX_LO1_en, RF R17 register Bit 3 to 0 |
334 | RT30xxReadRFRegister(pAd, RF_R17, &RFValue); | 325 | RT30xxReadRFRegister(pAd, RF_R17, &RFValue); |
335 | RFValue &= (~0x08); | 326 | RFValue &= (~0x08); |
336 | // to fix rx long range issue | 327 | // to fix rx long range issue |
337 | if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0)) | 328 | if (((pAd->MACVersion & 0xffff) >= 0x0211) && (pAd->NicConfig2.field.ExternalLNAForG == 0)) |
338 | { | 329 | { |
339 | RFValue |= 0x20; | 330 | RFValue |= 0x20; |
340 | } | 331 | } |
341 | // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h | 332 | // set RF_R17_bit[2:0] equal to EEPROM setting at 0x48h |
342 | if (pAd->TxMixerGain24G >= 2) | 333 | if (pAd->TxMixerGain24G >= 2) |
343 | { | 334 | { |
344 | RFValue &= (~0x7); // clean bit [2:0] | 335 | RFValue &= (~0x7); // clean bit [2:0] |
345 | RFValue |= pAd->TxMixerGain24G; | 336 | RFValue |= pAd->TxMixerGain24G; |
346 | } | 337 | } |
347 | RT30xxWriteRFRegister(pAd, RF_R17, RFValue); | 338 | RT30xxWriteRFRegister(pAd, RF_R17, RFValue); |
348 | */ | 339 | */ |
349 | 340 | ||
350 | // RX_LO1_en, RF R20 register Bit 3 to 0 | 341 | // RX_LO1_en, RF R20 register Bit 3 to 0 |
351 | RT30xxReadRFRegister(pAd, RF_R20, &RFValue); | 342 | RT30xxReadRFRegister(pAd, RF_R20, &RFValue); |
@@ -357,7 +348,7 @@ VOID RT30xxLoadRFNormalModeSetup( | |||
357 | RFValue &= (~0x08); | 348 | RFValue &= (~0x08); |
358 | RT30xxWriteRFRegister(pAd, RF_R21, RFValue); | 349 | RT30xxWriteRFRegister(pAd, RF_R21, RFValue); |
359 | 350 | ||
360 | /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem*/ | 351 | /* add by johnli, reset RF_R27 when interface down & up to fix throughput problem */ |
361 | // LDORF_VC, RF R27 register Bit 2 to 0 | 352 | // LDORF_VC, RF R27 register Bit 2 to 0 |
362 | RT30xxReadRFRegister(pAd, RF_R27, &RFValue); | 353 | RT30xxReadRFRegister(pAd, RF_R27, &RFValue); |
363 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). | 354 | // TX to RX IQ glitch(RF_R27) has been fixed in RT3070(F). |
@@ -381,15 +372,13 @@ VOID RT30xxLoadRFNormalModeSetup( | |||
381 | 372 | ||
382 | ========================================================================== | 373 | ========================================================================== |
383 | */ | 374 | */ |
384 | VOID RT30xxLoadRFSleepModeSetup( | 375 | VOID RT30xxLoadRFSleepModeSetup(IN PRTMP_ADAPTER pAd) |
385 | IN PRTMP_ADAPTER pAd) | ||
386 | { | 376 | { |
387 | UCHAR RFValue; | 377 | UCHAR RFValue; |
388 | UINT32 MACValue; | 378 | UINT32 MACValue; |
389 | 379 | ||
390 | |||
391 | #ifdef RTMP_MAC_USB | 380 | #ifdef RTMP_MAC_USB |
392 | if(!IS_RT3572(pAd)) | 381 | if (!IS_RT3572(pAd)) |
393 | #endif // RTMP_MAC_USB // | 382 | #endif // RTMP_MAC_USB // |
394 | { | 383 | { |
395 | // RF_BLOCK_en. RF R1 register Bit 0 to 0 | 384 | // RF_BLOCK_en. RF R1 register Bit 0 to 0 |
@@ -414,9 +403,8 @@ VOID RT30xxLoadRFSleepModeSetup( | |||
414 | } | 403 | } |
415 | 404 | ||
416 | if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72 | 405 | if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72 |
417 | IS_RT3572(pAd) || | 406 | IS_RT3572(pAd) || |
418 | (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) | 407 | (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) { |
419 | { | ||
420 | #ifdef RTMP_MAC_USB | 408 | #ifdef RTMP_MAC_USB |
421 | if (!IS_RT3572(pAd)) | 409 | if (!IS_RT3572(pAd)) |
422 | #endif // RTMP_MAC_USB // | 410 | #endif // RTMP_MAC_USB // |
@@ -440,14 +428,13 @@ VOID RT30xxLoadRFSleepModeSetup( | |||
440 | 428 | ||
441 | ========================================================================== | 429 | ========================================================================== |
442 | */ | 430 | */ |
443 | VOID RT30xxReverseRFSleepModeSetup( | 431 | VOID RT30xxReverseRFSleepModeSetup(IN PRTMP_ADAPTER pAd) |
444 | IN PRTMP_ADAPTER pAd) | ||
445 | { | 432 | { |
446 | UCHAR RFValue; | 433 | UCHAR RFValue; |
447 | UINT32 MACValue; | 434 | UINT32 MACValue; |
448 | 435 | ||
449 | #ifdef RTMP_MAC_USB | 436 | #ifdef RTMP_MAC_USB |
450 | if(!IS_RT3572(pAd)) | 437 | if (!IS_RT3572(pAd)) |
451 | #endif // RTMP_MAC_USB // | 438 | #endif // RTMP_MAC_USB // |
452 | { | 439 | { |
453 | // RF_BLOCK_en, RF R1 register Bit 0 to 1 | 440 | // RF_BLOCK_en, RF R1 register Bit 0 to 1 |
@@ -472,10 +459,9 @@ VOID RT30xxReverseRFSleepModeSetup( | |||
472 | } | 459 | } |
473 | 460 | ||
474 | if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72 | 461 | if (IS_RT3090(pAd) || // IS_RT3090 including RT309x and RT3071/72 |
475 | IS_RT3572(pAd) || | 462 | IS_RT3572(pAd) || |
476 | IS_RT3390(pAd) || | 463 | IS_RT3390(pAd) || |
477 | (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) | 464 | (IS_RT3070(pAd) && ((pAd->MACVersion & 0xffff) < 0x0201))) { |
478 | { | ||
479 | #ifdef RTMP_MAC_USB | 465 | #ifdef RTMP_MAC_USB |
480 | if (!IS_RT3572(pAd)) | 466 | if (!IS_RT3572(pAd)) |
481 | #endif // RTMP_MAC_USB // | 467 | #endif // RTMP_MAC_USB // |
@@ -487,48 +473,41 @@ VOID RT30xxReverseRFSleepModeSetup( | |||
487 | RFValue = (RFValue & (~0x77)); | 473 | RFValue = (RFValue & (~0x77)); |
488 | RT30xxWriteRFRegister(pAd, RF_R27, RFValue); | 474 | RT30xxWriteRFRegister(pAd, RF_R27, RFValue); |
489 | } | 475 | } |
490 | |||
491 | // RT3071 version E has fixed this issue | 476 | // RT3071 version E has fixed this issue |
492 | if ((pAd->NicConfig2.field.DACTestBit == 1) && ((pAd->MACVersion & 0xffff) < 0x0211)) | 477 | if ((pAd->NicConfig2.field.DACTestBit == 1) |
493 | { | 478 | && ((pAd->MACVersion & 0xffff) < 0x0211)) { |
494 | // patch tx EVM issue temporarily | 479 | // patch tx EVM issue temporarily |
495 | RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue); | 480 | RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue); |
496 | MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000); | 481 | MACValue = ((MACValue & 0xE0FFFFFF) | 0x0D000000); |
497 | RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue); | 482 | RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue); |
498 | } | 483 | } else { |
499 | else | ||
500 | { | ||
501 | RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue); | 484 | RTMP_IO_READ32(pAd, LDO_CFG0, &MACValue); |
502 | MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000); | 485 | MACValue = ((MACValue & 0xE0FFFFFF) | 0x01000000); |
503 | RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue); | 486 | RTMP_IO_WRITE32(pAd, LDO_CFG0, MACValue); |
504 | } | 487 | } |
505 | } | 488 | } |
506 | 489 | ||
507 | if(IS_RT3572(pAd)) | 490 | if (IS_RT3572(pAd)) |
508 | RT30xxWriteRFRegister(pAd, RF_R08, 0x80); | 491 | RT30xxWriteRFRegister(pAd, RF_R08, 0x80); |
509 | } | 492 | } |
493 | |||
510 | // end johnli | 494 | // end johnli |
511 | 495 | ||
512 | VOID RT30xxHaltAction( | 496 | VOID RT30xxHaltAction(IN PRTMP_ADAPTER pAd) |
513 | IN PRTMP_ADAPTER pAd) | ||
514 | { | 497 | { |
515 | UINT32 TxPinCfg = 0x00050F0F; | 498 | UINT32 TxPinCfg = 0x00050F0F; |
516 | 499 | ||
517 | // | 500 | // |
518 | // Turn off LNA_PE or TRSW_POL | 501 | // Turn off LNA_PE or TRSW_POL |
519 | // | 502 | // |
520 | if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)) | 503 | if (IS_RT3070(pAd) || IS_RT3071(pAd) || IS_RT3572(pAd)) { |
521 | { | ||
522 | if ((IS_RT3071(pAd) || IS_RT3572(pAd)) | 504 | if ((IS_RT3071(pAd) || IS_RT3572(pAd)) |
523 | #ifdef RTMP_EFUSE_SUPPORT | 505 | #ifdef RTMP_EFUSE_SUPPORT |
524 | && (pAd->bUseEfuse) | 506 | && (pAd->bUseEfuse) |
525 | #endif // RTMP_EFUSE_SUPPORT // | 507 | #endif // RTMP_EFUSE_SUPPORT // |
526 | ) | 508 | ) { |
527 | { | 509 | TxPinCfg &= 0xFFFBF0F0; // bit18 off |
528 | TxPinCfg &= 0xFFFBF0F0; // bit18 off | 510 | } else { |
529 | } | ||
530 | else | ||
531 | { | ||
532 | TxPinCfg &= 0xFFFFF0F0; | 511 | TxPinCfg &= 0xFFFFF0F0; |
533 | } | 512 | } |
534 | 513 | ||