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-rw-r--r--drivers/staging/omapdrm/Makefile1
-rw-r--r--drivers/staging/omapdrm/TODO3
-rw-r--r--drivers/staging/omapdrm/omap_connector.c111
-rw-r--r--drivers/staging/omapdrm/omap_crtc.c507
-rw-r--r--drivers/staging/omapdrm/omap_drv.c439
-rw-r--r--drivers/staging/omapdrm/omap_drv.h140
-rw-r--r--drivers/staging/omapdrm/omap_encoder.c132
-rw-r--r--drivers/staging/omapdrm/omap_gem_dmabuf.c2
-rw-r--r--drivers/staging/omapdrm/omap_irq.c322
-rw-r--r--drivers/staging/omapdrm/omap_plane.c452
10 files changed, 1215 insertions, 894 deletions
diff --git a/drivers/staging/omapdrm/Makefile b/drivers/staging/omapdrm/Makefile
index 1ca0e0016de..d85e058f284 100644
--- a/drivers/staging/omapdrm/Makefile
+++ b/drivers/staging/omapdrm/Makefile
@@ -5,6 +5,7 @@
5 5
6ccflags-y := -Iinclude/drm -Werror 6ccflags-y := -Iinclude/drm -Werror
7omapdrm-y := omap_drv.o \ 7omapdrm-y := omap_drv.o \
8 omap_irq.o \
8 omap_debugfs.o \ 9 omap_debugfs.o \
9 omap_crtc.o \ 10 omap_crtc.o \
10 omap_plane.o \ 11 omap_plane.o \
diff --git a/drivers/staging/omapdrm/TODO b/drivers/staging/omapdrm/TODO
index 938c7888ca3..abeeb00aaa1 100644
--- a/drivers/staging/omapdrm/TODO
+++ b/drivers/staging/omapdrm/TODO
@@ -17,9 +17,6 @@ TODO
17. Revisit GEM sync object infrastructure.. TTM has some framework for this 17. Revisit GEM sync object infrastructure.. TTM has some framework for this
18 already. Possibly this could be refactored out and made more common? 18 already. Possibly this could be refactored out and made more common?
19 There should be some way to do this with less wheel-reinvention. 19 There should be some way to do this with less wheel-reinvention.
20. Review DSS vs KMS mismatches. The omap_dss_device is sort of part encoder,
21 part connector. Which results in a bit of duct tape to fwd calls from
22 encoder to connector. Possibly this could be done a bit better.
23. Solve PM sequencing on resume. DMM/TILER must be reloaded before any 20. Solve PM sequencing on resume. DMM/TILER must be reloaded before any
24 access is made from any component in the system. Which means on suspend 21 access is made from any component in the system. Which means on suspend
25 CRTC's should be disabled, and on resume the LUT should be reprogrammed 22 CRTC's should be disabled, and on resume the LUT should be reprogrammed
diff --git a/drivers/staging/omapdrm/omap_connector.c b/drivers/staging/omapdrm/omap_connector.c
index 91edb3f9697..4cc9ee733c5 100644
--- a/drivers/staging/omapdrm/omap_connector.c
+++ b/drivers/staging/omapdrm/omap_connector.c
@@ -31,9 +31,10 @@
31struct omap_connector { 31struct omap_connector {
32 struct drm_connector base; 32 struct drm_connector base;
33 struct omap_dss_device *dssdev; 33 struct omap_dss_device *dssdev;
34 struct drm_encoder *encoder;
34}; 35};
35 36
36static inline void copy_timings_omap_to_drm(struct drm_display_mode *mode, 37void copy_timings_omap_to_drm(struct drm_display_mode *mode,
37 struct omap_video_timings *timings) 38 struct omap_video_timings *timings)
38{ 39{
39 mode->clock = timings->pixel_clock; 40 mode->clock = timings->pixel_clock;
@@ -64,7 +65,7 @@ static inline void copy_timings_omap_to_drm(struct drm_display_mode *mode,
64 mode->flags |= DRM_MODE_FLAG_NVSYNC; 65 mode->flags |= DRM_MODE_FLAG_NVSYNC;
65} 66}
66 67
67static inline void copy_timings_drm_to_omap(struct omap_video_timings *timings, 68void copy_timings_drm_to_omap(struct omap_video_timings *timings,
68 struct drm_display_mode *mode) 69 struct drm_display_mode *mode)
69{ 70{
70 timings->pixel_clock = mode->clock; 71 timings->pixel_clock = mode->clock;
@@ -96,48 +97,7 @@ static inline void copy_timings_drm_to_omap(struct omap_video_timings *timings,
96 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES; 97 timings->sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES;
97} 98}
98 99
99static void omap_connector_dpms(struct drm_connector *connector, int mode) 100static enum drm_connector_status omap_connector_detect(
100{
101 struct omap_connector *omap_connector = to_omap_connector(connector);
102 struct omap_dss_device *dssdev = omap_connector->dssdev;
103 int old_dpms;
104
105 DBG("%s: %d", dssdev->name, mode);
106
107 old_dpms = connector->dpms;
108
109 /* from off to on, do from crtc to connector */
110 if (mode < old_dpms)
111 drm_helper_connector_dpms(connector, mode);
112
113 if (mode == DRM_MODE_DPMS_ON) {
114 /* store resume info for suspended displays */
115 switch (dssdev->state) {
116 case OMAP_DSS_DISPLAY_SUSPENDED:
117 dssdev->activate_after_resume = true;
118 break;
119 case OMAP_DSS_DISPLAY_DISABLED: {
120 int ret = dssdev->driver->enable(dssdev);
121 if (ret) {
122 DBG("%s: failed to enable: %d",
123 dssdev->name, ret);
124 dssdev->driver->disable(dssdev);
125 }
126 break;
127 }
128 default:
129 break;
130 }
131 } else {
132 /* TODO */
133 }
134
135 /* from on to off, do from connector to crtc */
136 if (mode > old_dpms)
137 drm_helper_connector_dpms(connector, mode);
138}
139
140enum drm_connector_status omap_connector_detect(
141 struct drm_connector *connector, bool force) 101 struct drm_connector *connector, bool force)
142{ 102{
143 struct omap_connector *omap_connector = to_omap_connector(connector); 103 struct omap_connector *omap_connector = to_omap_connector(connector);
@@ -164,8 +124,6 @@ static void omap_connector_destroy(struct drm_connector *connector)
164 struct omap_connector *omap_connector = to_omap_connector(connector); 124 struct omap_connector *omap_connector = to_omap_connector(connector);
165 struct omap_dss_device *dssdev = omap_connector->dssdev; 125 struct omap_dss_device *dssdev = omap_connector->dssdev;
166 126
167 dssdev->driver->disable(dssdev);
168
169 DBG("%s", omap_connector->dssdev->name); 127 DBG("%s", omap_connector->dssdev->name);
170 drm_sysfs_connector_remove(connector); 128 drm_sysfs_connector_remove(connector);
171 drm_connector_cleanup(connector); 129 drm_connector_cleanup(connector);
@@ -261,36 +219,12 @@ static int omap_connector_mode_valid(struct drm_connector *connector,
261struct drm_encoder *omap_connector_attached_encoder( 219struct drm_encoder *omap_connector_attached_encoder(
262 struct drm_connector *connector) 220 struct drm_connector *connector)
263{ 221{
264 int i;
265 struct omap_connector *omap_connector = to_omap_connector(connector); 222 struct omap_connector *omap_connector = to_omap_connector(connector);
266 223 return omap_connector->encoder;
267 for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) {
268 struct drm_mode_object *obj;
269
270 if (connector->encoder_ids[i] == 0)
271 break;
272
273 obj = drm_mode_object_find(connector->dev,
274 connector->encoder_ids[i],
275 DRM_MODE_OBJECT_ENCODER);
276
277 if (obj) {
278 struct drm_encoder *encoder = obj_to_encoder(obj);
279 struct omap_overlay_manager *mgr =
280 omap_encoder_get_manager(encoder);
281 DBG("%s: found %s", omap_connector->dssdev->name,
282 mgr->name);
283 return encoder;
284 }
285 }
286
287 DBG("%s: no encoder", omap_connector->dssdev->name);
288
289 return NULL;
290} 224}
291 225
292static const struct drm_connector_funcs omap_connector_funcs = { 226static const struct drm_connector_funcs omap_connector_funcs = {
293 .dpms = omap_connector_dpms, 227 .dpms = drm_helper_connector_dpms,
294 .detect = omap_connector_detect, 228 .detect = omap_connector_detect,
295 .fill_modes = drm_helper_probe_single_connector_modes, 229 .fill_modes = drm_helper_probe_single_connector_modes,
296 .destroy = omap_connector_destroy, 230 .destroy = omap_connector_destroy,
@@ -302,34 +236,6 @@ static const struct drm_connector_helper_funcs omap_connector_helper_funcs = {
302 .best_encoder = omap_connector_attached_encoder, 236 .best_encoder = omap_connector_attached_encoder,
303}; 237};
304 238
305/* called from encoder when mode is set, to propagate settings to the dssdev */
306void omap_connector_mode_set(struct drm_connector *connector,
307 struct drm_display_mode *mode)
308{
309 struct drm_device *dev = connector->dev;
310 struct omap_connector *omap_connector = to_omap_connector(connector);
311 struct omap_dss_device *dssdev = omap_connector->dssdev;
312 struct omap_dss_driver *dssdrv = dssdev->driver;
313 struct omap_video_timings timings = {0};
314
315 copy_timings_drm_to_omap(&timings, mode);
316
317 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
318 omap_connector->dssdev->name,
319 mode->base.id, mode->name, mode->vrefresh, mode->clock,
320 mode->hdisplay, mode->hsync_start,
321 mode->hsync_end, mode->htotal,
322 mode->vdisplay, mode->vsync_start,
323 mode->vsync_end, mode->vtotal, mode->type, mode->flags);
324
325 if (dssdrv->check_timings(dssdev, &timings)) {
326 dev_err(dev->dev, "could not set timings\n");
327 return;
328 }
329
330 dssdrv->set_timings(dssdev, &timings);
331}
332
333/* flush an area of the framebuffer (in case of manual update display that 239/* flush an area of the framebuffer (in case of manual update display that
334 * is not automatically flushed) 240 * is not automatically flushed)
335 */ 241 */
@@ -344,7 +250,8 @@ void omap_connector_flush(struct drm_connector *connector,
344 250
345/* initialize connector */ 251/* initialize connector */
346struct drm_connector *omap_connector_init(struct drm_device *dev, 252struct drm_connector *omap_connector_init(struct drm_device *dev,
347 int connector_type, struct omap_dss_device *dssdev) 253 int connector_type, struct omap_dss_device *dssdev,
254 struct drm_encoder *encoder)
348{ 255{
349 struct drm_connector *connector = NULL; 256 struct drm_connector *connector = NULL;
350 struct omap_connector *omap_connector; 257 struct omap_connector *omap_connector;
@@ -360,6 +267,8 @@ struct drm_connector *omap_connector_init(struct drm_device *dev,
360 } 267 }
361 268
362 omap_connector->dssdev = dssdev; 269 omap_connector->dssdev = dssdev;
270 omap_connector->encoder = encoder;
271
363 connector = &omap_connector->base; 272 connector = &omap_connector->base;
364 273
365 drm_connector_init(dev, connector, &omap_connector_funcs, 274 drm_connector_init(dev, connector, &omap_connector_funcs,
diff --git a/drivers/staging/omapdrm/omap_crtc.c b/drivers/staging/omapdrm/omap_crtc.c
index d87bd84257b..5c6ed6040ef 100644
--- a/drivers/staging/omapdrm/omap_crtc.c
+++ b/drivers/staging/omapdrm/omap_crtc.c
@@ -28,19 +28,131 @@
28struct omap_crtc { 28struct omap_crtc {
29 struct drm_crtc base; 29 struct drm_crtc base;
30 struct drm_plane *plane; 30 struct drm_plane *plane;
31
31 const char *name; 32 const char *name;
32 int id; 33 int pipe;
34 enum omap_channel channel;
35 struct omap_overlay_manager_info info;
36
37 /*
38 * Temporary: eventually this will go away, but it is needed
39 * for now to keep the output's happy. (They only need
40 * mgr->id.) Eventually this will be replaced w/ something
41 * more common-panel-framework-y
42 */
43 struct omap_overlay_manager mgr;
44
45 struct omap_video_timings timings;
46 bool enabled;
47 bool full_update;
48
49 struct omap_drm_apply apply;
50
51 struct omap_drm_irq apply_irq;
52 struct omap_drm_irq error_irq;
53
54 /* list of in-progress apply's: */
55 struct list_head pending_applies;
56
57 /* list of queued apply's: */
58 struct list_head queued_applies;
59
60 /* for handling queued and in-progress applies: */
61 struct work_struct apply_work;
33 62
34 /* if there is a pending flip, these will be non-null: */ 63 /* if there is a pending flip, these will be non-null: */
35 struct drm_pending_vblank_event *event; 64 struct drm_pending_vblank_event *event;
36 struct drm_framebuffer *old_fb; 65 struct drm_framebuffer *old_fb;
66
67 /* for handling page flips without caring about what
68 * the callback is called from. Possibly we should just
69 * make omap_gem always call the cb from the worker so
70 * we don't have to care about this..
71 *
72 * XXX maybe fold into apply_work??
73 */
74 struct work_struct page_flip_work;
75};
76
77/*
78 * Manager-ops, callbacks from output when they need to configure
79 * the upstream part of the video pipe.
80 *
81 * Most of these we can ignore until we add support for command-mode
82 * panels.. for video-mode the crtc-helpers already do an adequate
83 * job of sequencing the setup of the video pipe in the proper order
84 */
85
86/* we can probably ignore these until we support command-mode panels: */
87static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
88{
89}
90
91static int omap_crtc_enable(struct omap_overlay_manager *mgr)
92{
93 return 0;
94}
95
96static void omap_crtc_disable(struct omap_overlay_manager *mgr)
97{
98}
99
100static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
101 const struct omap_video_timings *timings)
102{
103 struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
104 DBG("%s", omap_crtc->name);
105 omap_crtc->timings = *timings;
106 omap_crtc->full_update = true;
107}
108
109static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
110 const struct dss_lcd_mgr_config *config)
111{
112 struct omap_crtc *omap_crtc = container_of(mgr, struct omap_crtc, mgr);
113 DBG("%s", omap_crtc->name);
114 dispc_mgr_set_lcd_config(omap_crtc->channel, config);
115}
116
117static int omap_crtc_register_framedone_handler(
118 struct omap_overlay_manager *mgr,
119 void (*handler)(void *), void *data)
120{
121 return 0;
122}
123
124static void omap_crtc_unregister_framedone_handler(
125 struct omap_overlay_manager *mgr,
126 void (*handler)(void *), void *data)
127{
128}
129
130static const struct dss_mgr_ops mgr_ops = {
131 .start_update = omap_crtc_start_update,
132 .enable = omap_crtc_enable,
133 .disable = omap_crtc_disable,
134 .set_timings = omap_crtc_set_timings,
135 .set_lcd_config = omap_crtc_set_lcd_config,
136 .register_framedone_handler = omap_crtc_register_framedone_handler,
137 .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
37}; 138};
38 139
140/*
141 * CRTC funcs:
142 */
143
39static void omap_crtc_destroy(struct drm_crtc *crtc) 144static void omap_crtc_destroy(struct drm_crtc *crtc)
40{ 145{
41 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 146 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
147
148 DBG("%s", omap_crtc->name);
149
150 WARN_ON(omap_crtc->apply_irq.registered);
151 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
152
42 omap_crtc->plane->funcs->destroy(omap_crtc->plane); 153 omap_crtc->plane->funcs->destroy(omap_crtc->plane);
43 drm_crtc_cleanup(crtc); 154 drm_crtc_cleanup(crtc);
155
44 kfree(omap_crtc); 156 kfree(omap_crtc);
45} 157}
46 158
@@ -48,14 +160,25 @@ static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
48{ 160{
49 struct omap_drm_private *priv = crtc->dev->dev_private; 161 struct omap_drm_private *priv = crtc->dev->dev_private;
50 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 162 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
163 bool enabled = (mode == DRM_MODE_DPMS_ON);
51 int i; 164 int i;
52 165
53 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode)); 166 DBG("%s: %d", omap_crtc->name, mode);
167
168 if (enabled != omap_crtc->enabled) {
169 omap_crtc->enabled = enabled;
170 omap_crtc->full_update = true;
171 omap_crtc_apply(crtc, &omap_crtc->apply);
54 172
55 for (i = 0; i < priv->num_planes; i++) { 173 /* also enable our private plane: */
56 struct drm_plane *plane = priv->planes[i]; 174 WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
57 if (plane->crtc == crtc) 175
58 WARN_ON(omap_plane_dpms(plane, mode)); 176 /* and any attached overlay planes: */
177 for (i = 0; i < priv->num_planes; i++) {
178 struct drm_plane *plane = priv->planes[i];
179 if (plane->crtc == crtc)
180 WARN_ON(omap_plane_dpms(plane, mode));
181 }
59 } 182 }
60} 183}
61 184
@@ -73,12 +196,26 @@ static int omap_crtc_mode_set(struct drm_crtc *crtc,
73 struct drm_framebuffer *old_fb) 196 struct drm_framebuffer *old_fb)
74{ 197{
75 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 198 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
76 struct drm_plane *plane = omap_crtc->plane;
77 199
78 return omap_plane_mode_set(plane, crtc, crtc->fb, 200 mode = adjusted_mode;
201
202 DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
203 omap_crtc->name, mode->base.id, mode->name,
204 mode->vrefresh, mode->clock,
205 mode->hdisplay, mode->hsync_start,
206 mode->hsync_end, mode->htotal,
207 mode->vdisplay, mode->vsync_start,
208 mode->vsync_end, mode->vtotal,
209 mode->type, mode->flags);
210
211 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
212 omap_crtc->full_update = true;
213
214 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
79 0, 0, mode->hdisplay, mode->vdisplay, 215 0, 0, mode->hdisplay, mode->vdisplay,
80 x << 16, y << 16, 216 x << 16, y << 16,
81 mode->hdisplay << 16, mode->vdisplay << 16); 217 mode->hdisplay << 16, mode->vdisplay << 16,
218 NULL, NULL);
82} 219}
83 220
84static void omap_crtc_prepare(struct drm_crtc *crtc) 221static void omap_crtc_prepare(struct drm_crtc *crtc)
@@ -102,10 +239,11 @@ static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
102 struct drm_plane *plane = omap_crtc->plane; 239 struct drm_plane *plane = omap_crtc->plane;
103 struct drm_display_mode *mode = &crtc->mode; 240 struct drm_display_mode *mode = &crtc->mode;
104 241
105 return plane->funcs->update_plane(plane, crtc, crtc->fb, 242 return omap_plane_mode_set(plane, crtc, crtc->fb,
106 0, 0, mode->hdisplay, mode->vdisplay, 243 0, 0, mode->hdisplay, mode->vdisplay,
107 x << 16, y << 16, 244 x << 16, y << 16,
108 mode->hdisplay << 16, mode->vdisplay << 16); 245 mode->hdisplay << 16, mode->vdisplay << 16,
246 NULL, NULL);
109} 247}
110 248
111static void omap_crtc_load_lut(struct drm_crtc *crtc) 249static void omap_crtc_load_lut(struct drm_crtc *crtc)
@@ -114,63 +252,54 @@ static void omap_crtc_load_lut(struct drm_crtc *crtc)
114 252
115static void vblank_cb(void *arg) 253static void vblank_cb(void *arg)
116{ 254{
117 static uint32_t sequence;
118 struct drm_crtc *crtc = arg; 255 struct drm_crtc *crtc = arg;
119 struct drm_device *dev = crtc->dev; 256 struct drm_device *dev = crtc->dev;
120 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 257 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
121 struct drm_pending_vblank_event *event = omap_crtc->event;
122 unsigned long flags; 258 unsigned long flags;
123 struct timeval now;
124 259
125 WARN_ON(!event); 260 spin_lock_irqsave(&dev->event_lock, flags);
261
262 /* wakeup userspace */
263 if (omap_crtc->event)
264 drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
126 265
127 omap_crtc->event = NULL; 266 omap_crtc->event = NULL;
267 omap_crtc->old_fb = NULL;
128 268
129 /* wakeup userspace */ 269 spin_unlock_irqrestore(&dev->event_lock, flags);
130 if (event) {
131 do_gettimeofday(&now);
132
133 spin_lock_irqsave(&dev->event_lock, flags);
134 /* TODO: we can't yet use the vblank time accounting,
135 * because omapdss lower layer is the one that knows
136 * the irq # and registers the handler, which more or
137 * less defeats how drm_irq works.. for now just fake
138 * the sequence number and use gettimeofday..
139 *
140 event->event.sequence = drm_vblank_count_and_time(
141 dev, omap_crtc->id, &now);
142 */
143 event->event.sequence = sequence++;
144 event->event.tv_sec = now.tv_sec;
145 event->event.tv_usec = now.tv_usec;
146 list_add_tail(&event->base.link,
147 &event->base.file_priv->event_list);
148 wake_up_interruptible(&event->base.file_priv->event_wait);
149 spin_unlock_irqrestore(&dev->event_lock, flags);
150 }
151} 270}
152 271
153static void page_flip_cb(void *arg) 272static void page_flip_worker(struct work_struct *work)
154{ 273{
155 struct drm_crtc *crtc = arg; 274 struct omap_crtc *omap_crtc =
156 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 275 container_of(work, struct omap_crtc, page_flip_work);
157 struct drm_framebuffer *old_fb = omap_crtc->old_fb; 276 struct drm_crtc *crtc = &omap_crtc->base;
277 struct drm_device *dev = crtc->dev;
278 struct drm_display_mode *mode = &crtc->mode;
158 struct drm_gem_object *bo; 279 struct drm_gem_object *bo;
159 280
160 omap_crtc->old_fb = NULL; 281 mutex_lock(&dev->mode_config.mutex);
161 282 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
162 omap_crtc_mode_set_base(crtc, crtc->x, crtc->y, old_fb); 283 0, 0, mode->hdisplay, mode->vdisplay,
163 284 crtc->x << 16, crtc->y << 16,
164 /* really we'd like to setup the callback atomically w/ setting the 285 mode->hdisplay << 16, mode->vdisplay << 16,
165 * new scanout buffer to avoid getting stuck waiting an extra vblank 286 vblank_cb, crtc);
166 * cycle.. for now go for correctness and later figure out speed.. 287 mutex_unlock(&dev->mode_config.mutex);
167 */
168 omap_plane_on_endwin(omap_crtc->plane, vblank_cb, crtc);
169 288
170 bo = omap_framebuffer_bo(crtc->fb, 0); 289 bo = omap_framebuffer_bo(crtc->fb, 0);
171 drm_gem_object_unreference_unlocked(bo); 290 drm_gem_object_unreference_unlocked(bo);
172} 291}
173 292
293static void page_flip_cb(void *arg)
294{
295 struct drm_crtc *crtc = arg;
296 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
297 struct omap_drm_private *priv = crtc->dev->dev_private;
298
299 /* avoid assumptions about what ctxt we are called from: */
300 queue_work(priv->wq, &omap_crtc->page_flip_work);
301}
302
174static int omap_crtc_page_flip_locked(struct drm_crtc *crtc, 303static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
175 struct drm_framebuffer *fb, 304 struct drm_framebuffer *fb,
176 struct drm_pending_vblank_event *event) 305 struct drm_pending_vblank_event *event)
@@ -179,14 +308,14 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
179 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 308 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
180 struct drm_gem_object *bo; 309 struct drm_gem_object *bo;
181 310
182 DBG("%d -> %d", crtc->fb ? crtc->fb->base.id : -1, fb->base.id); 311 DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
312 fb->base.id, event);
183 313
184 if (omap_crtc->event) { 314 if (omap_crtc->old_fb) {
185 dev_err(dev->dev, "already a pending flip\n"); 315 dev_err(dev->dev, "already a pending flip\n");
186 return -EINVAL; 316 return -EINVAL;
187 } 317 }
188 318
189 omap_crtc->old_fb = crtc->fb;
190 omap_crtc->event = event; 319 omap_crtc->event = event;
191 crtc->fb = fb; 320 crtc->fb = fb;
192 321
@@ -234,14 +363,244 @@ static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
234 .load_lut = omap_crtc_load_lut, 363 .load_lut = omap_crtc_load_lut,
235}; 364};
236 365
366const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
367{
368 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
369 return &omap_crtc->timings;
370}
371
372enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
373{
374 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
375 return omap_crtc->channel;
376}
377
378static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
379{
380 struct omap_crtc *omap_crtc =
381 container_of(irq, struct omap_crtc, error_irq);
382 struct drm_crtc *crtc = &omap_crtc->base;
383 DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
384 /* avoid getting in a flood, unregister the irq until next vblank */
385 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
386}
387
388static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
389{
390 struct omap_crtc *omap_crtc =
391 container_of(irq, struct omap_crtc, apply_irq);
392 struct drm_crtc *crtc = &omap_crtc->base;
393
394 if (!omap_crtc->error_irq.registered)
395 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
396
397 if (!dispc_mgr_go_busy(omap_crtc->channel)) {
398 struct omap_drm_private *priv =
399 crtc->dev->dev_private;
400 DBG("%s: apply done", omap_crtc->name);
401 omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
402 queue_work(priv->wq, &omap_crtc->apply_work);
403 }
404}
405
406static void apply_worker(struct work_struct *work)
407{
408 struct omap_crtc *omap_crtc =
409 container_of(work, struct omap_crtc, apply_work);
410 struct drm_crtc *crtc = &omap_crtc->base;
411 struct drm_device *dev = crtc->dev;
412 struct omap_drm_apply *apply, *n;
413 bool need_apply;
414
415 /*
416 * Synchronize everything on mode_config.mutex, to keep
417 * the callbacks and list modification all serialized
418 * with respect to modesetting ioctls from userspace.
419 */
420 mutex_lock(&dev->mode_config.mutex);
421 dispc_runtime_get();
422
423 /*
424 * If we are still pending a previous update, wait.. when the
425 * pending update completes, we get kicked again.
426 */
427 if (omap_crtc->apply_irq.registered)
428 goto out;
429
430 /* finish up previous apply's: */
431 list_for_each_entry_safe(apply, n,
432 &omap_crtc->pending_applies, pending_node) {
433 apply->post_apply(apply);
434 list_del(&apply->pending_node);
435 }
436
437 need_apply = !list_empty(&omap_crtc->queued_applies);
438
439 /* then handle the next round of of queued apply's: */
440 list_for_each_entry_safe(apply, n,
441 &omap_crtc->queued_applies, queued_node) {
442 apply->pre_apply(apply);
443 list_del(&apply->queued_node);
444 apply->queued = false;
445 list_add_tail(&apply->pending_node,
446 &omap_crtc->pending_applies);
447 }
448
449 if (need_apply) {
450 enum omap_channel channel = omap_crtc->channel;
451
452 DBG("%s: GO", omap_crtc->name);
453
454 if (dispc_mgr_is_enabled(channel)) {
455 omap_irq_register(dev, &omap_crtc->apply_irq);
456 dispc_mgr_go(channel);
457 } else {
458 struct omap_drm_private *priv = dev->dev_private;
459 queue_work(priv->wq, &omap_crtc->apply_work);
460 }
461 }
462
463out:
464 dispc_runtime_put();
465 mutex_unlock(&dev->mode_config.mutex);
466}
467
468int omap_crtc_apply(struct drm_crtc *crtc,
469 struct omap_drm_apply *apply)
470{
471 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
472 struct drm_device *dev = crtc->dev;
473
474 WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));
475
476 /* no need to queue it again if it is already queued: */
477 if (apply->queued)
478 return 0;
479
480 apply->queued = true;
481 list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
482
483 /*
484 * If there are no currently pending updates, then go ahead and
485 * kick the worker immediately, otherwise it will run again when
486 * the current update finishes.
487 */
488 if (list_empty(&omap_crtc->pending_applies)) {
489 struct omap_drm_private *priv = crtc->dev->dev_private;
490 queue_work(priv->wq, &omap_crtc->apply_work);
491 }
492
493 return 0;
494}
495
496/* called only from apply */
497static void set_enabled(struct drm_crtc *crtc, bool enable)
498{
499 struct drm_device *dev = crtc->dev;
500 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
501 enum omap_channel channel = omap_crtc->channel;
502 struct omap_irq_wait *wait = NULL;
503
504 if (dispc_mgr_is_enabled(channel) == enable)
505 return;
506
507 /* ignore sync-lost irqs during enable/disable */
508 omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
509
510 if (dispc_mgr_get_framedone_irq(channel)) {
511 if (!enable) {
512 wait = omap_irq_wait_init(dev,
513 dispc_mgr_get_framedone_irq(channel), 1);
514 }
515 } else {
516 /*
517 * When we disable digit output, we need to wait until fields
518 * are done. Otherwise the DSS is still working, and turning
519 * off the clocks prevents DSS from going to OFF mode. And when
520 * enabling, we need to wait for the extra sync losts
521 */
522 wait = omap_irq_wait_init(dev,
523 dispc_mgr_get_vsync_irq(channel), 2);
524 }
525
526 dispc_mgr_enable(channel, enable);
527
528 if (wait) {
529 int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
530 if (ret) {
531 dev_err(dev->dev, "%s: timeout waiting for %s\n",
532 omap_crtc->name, enable ? "enable" : "disable");
533 }
534 }
535
536 omap_irq_register(crtc->dev, &omap_crtc->error_irq);
537}
538
539static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
540{
541 struct omap_crtc *omap_crtc =
542 container_of(apply, struct omap_crtc, apply);
543 struct drm_crtc *crtc = &omap_crtc->base;
544 struct drm_encoder *encoder = NULL;
545
546 DBG("%s: enabled=%d, full=%d", omap_crtc->name,
547 omap_crtc->enabled, omap_crtc->full_update);
548
549 if (omap_crtc->full_update) {
550 struct omap_drm_private *priv = crtc->dev->dev_private;
551 int i;
552 for (i = 0; i < priv->num_encoders; i++) {
553 if (priv->encoders[i]->crtc == crtc) {
554 encoder = priv->encoders[i];
555 break;
556 }
557 }
558 }
559
560 if (!omap_crtc->enabled) {
561 set_enabled(&omap_crtc->base, false);
562 if (encoder)
563 omap_encoder_set_enabled(encoder, false);
564 } else {
565 if (encoder) {
566 omap_encoder_set_enabled(encoder, false);
567 omap_encoder_update(encoder, &omap_crtc->mgr,
568 &omap_crtc->timings);
569 omap_encoder_set_enabled(encoder, true);
570 omap_crtc->full_update = false;
571 }
572
573 dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
574 dispc_mgr_set_timings(omap_crtc->channel,
575 &omap_crtc->timings);
576 set_enabled(&omap_crtc->base, true);
577 }
578
579 omap_crtc->full_update = false;
580}
581
582static void omap_crtc_post_apply(struct omap_drm_apply *apply)
583{
584 /* nothing needed for post-apply */
585}
586
587static const char *channel_names[] = {
588 [OMAP_DSS_CHANNEL_LCD] = "lcd",
589 [OMAP_DSS_CHANNEL_DIGIT] = "tv",
590 [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
591};
592
237/* initialize crtc */ 593/* initialize crtc */
238struct drm_crtc *omap_crtc_init(struct drm_device *dev, 594struct drm_crtc *omap_crtc_init(struct drm_device *dev,
239 struct omap_overlay *ovl, int id) 595 struct drm_plane *plane, enum omap_channel channel, int id)
240{ 596{
241 struct drm_crtc *crtc = NULL; 597 struct drm_crtc *crtc = NULL;
242 struct omap_crtc *omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL); 598 struct omap_crtc *omap_crtc;
599 struct omap_overlay_manager_info *info;
600
601 DBG("%s", channel_names[channel]);
243 602
244 DBG("%s", ovl->name); 603 omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
245 604
246 if (!omap_crtc) { 605 if (!omap_crtc) {
247 dev_err(dev->dev, "could not allocate CRTC\n"); 606 dev_err(dev->dev, "could not allocate CRTC\n");
@@ -250,10 +609,40 @@ struct drm_crtc *omap_crtc_init(struct drm_device *dev,
250 609
251 crtc = &omap_crtc->base; 610 crtc = &omap_crtc->base;
252 611
253 omap_crtc->plane = omap_plane_init(dev, ovl, (1 << id), true); 612 INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
613 INIT_WORK(&omap_crtc->apply_work, apply_worker);
614
615 INIT_LIST_HEAD(&omap_crtc->pending_applies);
616 INIT_LIST_HEAD(&omap_crtc->queued_applies);
617
618 omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
619 omap_crtc->apply.post_apply = omap_crtc_post_apply;
620
621 omap_crtc->apply_irq.irqmask = pipe2vbl(id);
622 omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
623
624 omap_crtc->error_irq.irqmask =
625 dispc_mgr_get_sync_lost_irq(channel);
626 omap_crtc->error_irq.irq = omap_crtc_error_irq;
627 omap_irq_register(dev, &omap_crtc->error_irq);
628
629 omap_crtc->channel = channel;
630 omap_crtc->plane = plane;
254 omap_crtc->plane->crtc = crtc; 631 omap_crtc->plane->crtc = crtc;
255 omap_crtc->name = ovl->name; 632 omap_crtc->name = channel_names[channel];
256 omap_crtc->id = id; 633 omap_crtc->pipe = id;
634
635 /* temporary: */
636 omap_crtc->mgr.id = channel;
637
638 dss_install_mgr_ops(&mgr_ops);
639
640 /* TODO: fix hard-coded setup.. add properties! */
641 info = &omap_crtc->info;
642 info->default_color = 0x00000000;
643 info->trans_key = 0x00000000;
644 info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
645 info->trans_enabled = false;
257 646
258 drm_crtc_init(dev, crtc, &omap_crtc_funcs); 647 drm_crtc_init(dev, crtc, &omap_crtc_funcs);
259 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs); 648 drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
diff --git a/drivers/staging/omapdrm/omap_drv.c b/drivers/staging/omapdrm/omap_drv.c
index 84943e5ba1d..ae5ecc2efbc 100644
--- a/drivers/staging/omapdrm/omap_drv.c
+++ b/drivers/staging/omapdrm/omap_drv.c
@@ -74,320 +74,99 @@ static int get_connector_type(struct omap_dss_device *dssdev)
74 } 74 }
75} 75}
76 76
77#if 0 /* enable when dss2 supports hotplug */ 77static int omap_modeset_init(struct drm_device *dev)
78static int omap_drm_notifier(struct notifier_block *nb,
79 unsigned long evt, void *arg)
80{
81 switch (evt) {
82 case OMAP_DSS_SIZE_CHANGE:
83 case OMAP_DSS_HOTPLUG_CONNECT:
84 case OMAP_DSS_HOTPLUG_DISCONNECT: {
85 struct drm_device *dev = drm_device;
86 DBG("hotplug event: evt=%d, dev=%p", evt, dev);
87 if (dev)
88 drm_sysfs_hotplug_event(dev);
89
90 return NOTIFY_OK;
91 }
92 default: /* don't care about other events for now */
93 return NOTIFY_DONE;
94 }
95}
96#endif
97
98static void dump_video_chains(void)
99{
100 int i;
101
102 DBG("dumping video chains: ");
103 for (i = 0; i < omap_dss_get_num_overlays(); i++) {
104 struct omap_overlay *ovl = omap_dss_get_overlay(i);
105 struct omap_overlay_manager *mgr = ovl->manager;
106 struct omap_dss_device *dssdev = mgr ?
107 mgr->get_device(mgr) : NULL;
108 if (dssdev) {
109 DBG("%d: %s -> %s -> %s", i, ovl->name, mgr->name,
110 dssdev->name);
111 } else if (mgr) {
112 DBG("%d: %s -> %s", i, ovl->name, mgr->name);
113 } else {
114 DBG("%d: %s", i, ovl->name);
115 }
116 }
117}
118
119/* create encoders for each manager */
120static int create_encoder(struct drm_device *dev,
121 struct omap_overlay_manager *mgr)
122{
123 struct omap_drm_private *priv = dev->dev_private;
124 struct drm_encoder *encoder = omap_encoder_init(dev, mgr);
125
126 if (!encoder) {
127 dev_err(dev->dev, "could not create encoder: %s\n",
128 mgr->name);
129 return -ENOMEM;
130 }
131
132 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
133
134 priv->encoders[priv->num_encoders++] = encoder;
135
136 return 0;
137}
138
139/* create connectors for each display device */
140static int create_connector(struct drm_device *dev,
141 struct omap_dss_device *dssdev)
142{ 78{
143 struct omap_drm_private *priv = dev->dev_private; 79 struct omap_drm_private *priv = dev->dev_private;
144 static struct notifier_block *notifier; 80 struct omap_dss_device *dssdev = NULL;
145 struct drm_connector *connector; 81 int num_ovls = dss_feat_get_num_ovls();
146 int j; 82 int id;
147
148 if (!dssdev->driver) {
149 dev_warn(dev->dev, "%s has no driver.. skipping it\n",
150 dssdev->name);
151 return 0;
152 }
153 83
154 if (!(dssdev->driver->get_timings || 84 drm_mode_config_init(dev);
155 dssdev->driver->read_edid)) {
156 dev_warn(dev->dev, "%s driver does not support "
157 "get_timings or read_edid.. skipping it!\n",
158 dssdev->name);
159 return 0;
160 }
161 85
162 connector = omap_connector_init(dev, 86 omap_drm_irq_install(dev);
163 get_connector_type(dssdev), dssdev);
164 87
165 if (!connector) { 88 /*
166 dev_err(dev->dev, "could not create connector: %s\n", 89 * Create private planes and CRTCs for the last NUM_CRTCs overlay
167 dssdev->name); 90 * plus manager:
168 return -ENOMEM; 91 */
169 } 92 for (id = 0; id < min(num_crtc, num_ovls); id++) {
170 93 struct drm_plane *plane;
171 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors)); 94 struct drm_crtc *crtc;
172 95
173 priv->connectors[priv->num_connectors++] = connector; 96 plane = omap_plane_init(dev, id, true);
97 crtc = omap_crtc_init(dev, plane, pipe2chan(id), id);
174 98
175#if 0 /* enable when dss2 supports hotplug */ 99 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs));
176 notifier = kzalloc(sizeof(struct notifier_block), GFP_KERNEL); 100 priv->crtcs[id] = crtc;
177 notifier->notifier_call = omap_drm_notifier; 101 priv->num_crtcs++;
178 omap_dss_add_notify(dssdev, notifier);
179#else
180 notifier = NULL;
181#endif
182 102
183 for (j = 0; j < priv->num_encoders; j++) { 103 priv->planes[id] = plane;
184 struct omap_overlay_manager *mgr = 104 priv->num_planes++;
185 omap_encoder_get_manager(priv->encoders[j]);
186 if (mgr->get_device(mgr) == dssdev) {
187 drm_mode_connector_attach_encoder(connector,
188 priv->encoders[j]);
189 }
190 } 105 }
191 106
192 return 0; 107 /*
193} 108 * Create normal planes for the remaining overlays:
194
195/* create up to max_overlays CRTCs mapping to overlays.. by default,
196 * connect the overlays to different managers/encoders, giving priority
197 * to encoders connected to connectors with a detected connection
198 */
199static int create_crtc(struct drm_device *dev, struct omap_overlay *ovl,
200 int *j, unsigned int connected_connectors)
201{
202 struct omap_drm_private *priv = dev->dev_private;
203 struct omap_overlay_manager *mgr = NULL;
204 struct drm_crtc *crtc;
205
206 /* find next best connector, ones with detected connection first
207 */ 109 */
208 while (*j < priv->num_connectors && !mgr) { 110 for (; id < num_ovls; id++) {
209 if (connected_connectors & (1 << *j)) { 111 struct drm_plane *plane = omap_plane_init(dev, id, false);
210 struct drm_encoder *encoder =
211 omap_connector_attached_encoder(
212 priv->connectors[*j]);
213 if (encoder)
214 mgr = omap_encoder_get_manager(encoder);
215 112
216 } 113 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
217 (*j)++; 114 priv->planes[priv->num_planes++] = plane;
218 } 115 }
219 116
220 /* if we couldn't find another connected connector, lets start 117 for_each_dss_dev(dssdev) {
221 * looking at the unconnected connectors: 118 struct drm_connector *connector;
222 * 119 struct drm_encoder *encoder;
223 * note: it might not be immediately apparent, but thanks to
224 * the !mgr check in both this loop and the one above, the only
225 * way to enter this loop is with *j == priv->num_connectors,
226 * so idx can never go negative.
227 */
228 while (*j < 2 * priv->num_connectors && !mgr) {
229 int idx = *j - priv->num_connectors;
230 if (!(connected_connectors & (1 << idx))) {
231 struct drm_encoder *encoder =
232 omap_connector_attached_encoder(
233 priv->connectors[idx]);
234 if (encoder)
235 mgr = omap_encoder_get_manager(encoder);
236 120
121 if (!dssdev->driver) {
122 dev_warn(dev->dev, "%s has no driver.. skipping it\n",
123 dssdev->name);
124 return 0;
237 } 125 }
238 (*j)++;
239 }
240
241 crtc = omap_crtc_init(dev, ovl, priv->num_crtcs);
242
243 if (!crtc) {
244 dev_err(dev->dev, "could not create CRTC: %s\n",
245 ovl->name);
246 return -ENOMEM;
247 }
248 126
249 BUG_ON(priv->num_crtcs >= ARRAY_SIZE(priv->crtcs)); 127 if (!(dssdev->driver->get_timings ||
250 128 dssdev->driver->read_edid)) {
251 priv->crtcs[priv->num_crtcs++] = crtc; 129 dev_warn(dev->dev, "%s driver does not support "
252 130 "get_timings or read_edid.. skipping it!\n",
253 return 0; 131 dssdev->name);
254} 132 return 0;
255
256static int create_plane(struct drm_device *dev, struct omap_overlay *ovl,
257 unsigned int possible_crtcs)
258{
259 struct omap_drm_private *priv = dev->dev_private;
260 struct drm_plane *plane =
261 omap_plane_init(dev, ovl, possible_crtcs, false);
262
263 if (!plane) {
264 dev_err(dev->dev, "could not create plane: %s\n",
265 ovl->name);
266 return -ENOMEM;
267 }
268
269 BUG_ON(priv->num_planes >= ARRAY_SIZE(priv->planes));
270
271 priv->planes[priv->num_planes++] = plane;
272
273 return 0;
274}
275
276static int match_dev_name(struct omap_dss_device *dssdev, void *data)
277{
278 return !strcmp(dssdev->name, data);
279}
280
281static unsigned int detect_connectors(struct drm_device *dev)
282{
283 struct omap_drm_private *priv = dev->dev_private;
284 unsigned int connected_connectors = 0;
285 int i;
286
287 for (i = 0; i < priv->num_connectors; i++) {
288 struct drm_connector *connector = priv->connectors[i];
289 if (omap_connector_detect(connector, true) ==
290 connector_status_connected) {
291 connected_connectors |= (1 << i);
292 } 133 }
293 }
294
295 return connected_connectors;
296}
297 134
298static int omap_modeset_init(struct drm_device *dev) 135 encoder = omap_encoder_init(dev, dssdev);
299{
300 const struct omap_drm_platform_data *pdata = dev->dev->platform_data;
301 struct omap_kms_platform_data *kms_pdata = NULL;
302 struct omap_drm_private *priv = dev->dev_private;
303 struct omap_dss_device *dssdev = NULL;
304 int i, j;
305 unsigned int connected_connectors = 0;
306 136
307 drm_mode_config_init(dev); 137 if (!encoder) {
308 138 dev_err(dev->dev, "could not create encoder: %s\n",
309 if (pdata && pdata->kms_pdata) { 139 dssdev->name);
310 kms_pdata = pdata->kms_pdata; 140 return -ENOMEM;
311
312 /* if platform data is provided by the board file, use it to
313 * control which overlays, managers, and devices we own.
314 */
315 for (i = 0; i < kms_pdata->mgr_cnt; i++) {
316 struct omap_overlay_manager *mgr =
317 omap_dss_get_overlay_manager(
318 kms_pdata->mgr_ids[i]);
319 create_encoder(dev, mgr);
320 }
321
322 for (i = 0; i < kms_pdata->dev_cnt; i++) {
323 struct omap_dss_device *dssdev =
324 omap_dss_find_device(
325 (void *)kms_pdata->dev_names[i],
326 match_dev_name);
327 if (!dssdev) {
328 dev_warn(dev->dev, "no such dssdev: %s\n",
329 kms_pdata->dev_names[i]);
330 continue;
331 }
332 create_connector(dev, dssdev);
333 } 141 }
334 142
335 connected_connectors = detect_connectors(dev); 143 connector = omap_connector_init(dev,
144 get_connector_type(dssdev), dssdev, encoder);
336 145
337 j = 0; 146 if (!connector) {
338 for (i = 0; i < kms_pdata->ovl_cnt; i++) { 147 dev_err(dev->dev, "could not create connector: %s\n",
339 struct omap_overlay *ovl = 148 dssdev->name);
340 omap_dss_get_overlay(kms_pdata->ovl_ids[i]); 149 return -ENOMEM;
341 create_crtc(dev, ovl, &j, connected_connectors);
342 } 150 }
343 151
344 for (i = 0; i < kms_pdata->pln_cnt; i++) { 152 BUG_ON(priv->num_encoders >= ARRAY_SIZE(priv->encoders));
345 struct omap_overlay *ovl = 153 BUG_ON(priv->num_connectors >= ARRAY_SIZE(priv->connectors));
346 omap_dss_get_overlay(kms_pdata->pln_ids[i]);
347 create_plane(dev, ovl, (1 << priv->num_crtcs) - 1);
348 }
349 } else {
350 /* otherwise just grab up to CONFIG_DRM_OMAP_NUM_CRTCS and try
351 * to make educated guesses about everything else
352 */
353 int max_overlays = min(omap_dss_get_num_overlays(), num_crtc);
354 154
355 for (i = 0; i < omap_dss_get_num_overlay_managers(); i++) 155 priv->encoders[priv->num_encoders++] = encoder;
356 create_encoder(dev, omap_dss_get_overlay_manager(i)); 156 priv->connectors[priv->num_connectors++] = connector;
357
358 for_each_dss_dev(dssdev) {
359 create_connector(dev, dssdev);
360 }
361 157
362 connected_connectors = detect_connectors(dev); 158 drm_mode_connector_attach_encoder(connector, encoder);
363 159
364 j = 0; 160 /* figure out which crtc's we can connect the encoder to: */
365 for (i = 0; i < max_overlays; i++) { 161 encoder->possible_crtcs = 0;
366 create_crtc(dev, omap_dss_get_overlay(i), 162 for (id = 0; id < priv->num_crtcs; id++) {
367 &j, connected_connectors); 163 enum omap_dss_output_id supported_outputs =
368 } 164 dss_feat_get_supported_outputs(pipe2chan(id));
369 165 if (supported_outputs & dssdev->output->id)
370 /* use any remaining overlays as drm planes */ 166 encoder->possible_crtcs |= (1 << id);
371 for (; i < omap_dss_get_num_overlays(); i++) {
372 struct omap_overlay *ovl = omap_dss_get_overlay(i);
373 create_plane(dev, ovl, (1 << priv->num_crtcs) - 1);
374 } 167 }
375 } 168 }
376 169
377 /* for now keep the mapping of CRTCs and encoders static.. */
378 for (i = 0; i < priv->num_encoders; i++) {
379 struct drm_encoder *encoder = priv->encoders[i];
380 struct omap_overlay_manager *mgr =
381 omap_encoder_get_manager(encoder);
382
383 encoder->possible_crtcs = (1 << priv->num_crtcs) - 1;
384
385 DBG("%s: possible_crtcs=%08x", mgr->name,
386 encoder->possible_crtcs);
387 }
388
389 dump_video_chains();
390
391 dev->mode_config.min_width = 32; 170 dev->mode_config.min_width = 32;
392 dev->mode_config.min_height = 32; 171 dev->mode_config.min_height = 32;
393 172
@@ -450,7 +229,7 @@ static int ioctl_gem_new(struct drm_device *dev, void *data,
450 struct drm_file *file_priv) 229 struct drm_file *file_priv)
451{ 230{
452 struct drm_omap_gem_new *args = data; 231 struct drm_omap_gem_new *args = data;
453 DBG("%p:%p: size=0x%08x, flags=%08x", dev, file_priv, 232 VERB("%p:%p: size=0x%08x, flags=%08x", dev, file_priv,
454 args->size.bytes, args->flags); 233 args->size.bytes, args->flags);
455 return omap_gem_new_handle(dev, file_priv, args->size, 234 return omap_gem_new_handle(dev, file_priv, args->size,
456 args->flags, &args->handle); 235 args->flags, &args->handle);
@@ -510,7 +289,7 @@ static int ioctl_gem_info(struct drm_device *dev, void *data,
510 struct drm_gem_object *obj; 289 struct drm_gem_object *obj;
511 int ret = 0; 290 int ret = 0;
512 291
513 DBG("%p:%p: handle=%d", dev, file_priv, args->handle); 292 VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
514 293
515 obj = drm_gem_object_lookup(dev, file_priv, args->handle); 294 obj = drm_gem_object_lookup(dev, file_priv, args->handle);
516 if (!obj) 295 if (!obj)
@@ -565,14 +344,6 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
565 344
566 dev->dev_private = priv; 345 dev->dev_private = priv;
567 346
568 ret = omapdss_compat_init();
569 if (ret) {
570 dev_err(dev->dev, "coult not init omapdss\n");
571 dev->dev_private = NULL;
572 kfree(priv);
573 return ret;
574 }
575
576 priv->wq = alloc_ordered_workqueue("omapdrm", 0); 347 priv->wq = alloc_ordered_workqueue("omapdrm", 0);
577 348
578 INIT_LIST_HEAD(&priv->obj_list); 349 INIT_LIST_HEAD(&priv->obj_list);
@@ -584,10 +355,13 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
584 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret); 355 dev_err(dev->dev, "omap_modeset_init failed: ret=%d\n", ret);
585 dev->dev_private = NULL; 356 dev->dev_private = NULL;
586 kfree(priv); 357 kfree(priv);
587 omapdss_compat_uninit();
588 return ret; 358 return ret;
589 } 359 }
590 360
361 ret = drm_vblank_init(dev, priv->num_crtcs);
362 if (ret)
363 dev_warn(dev->dev, "could not init vblank\n");
364
591 priv->fbdev = omap_fbdev_init(dev); 365 priv->fbdev = omap_fbdev_init(dev);
592 if (!priv->fbdev) { 366 if (!priv->fbdev) {
593 dev_warn(dev->dev, "omap_fbdev_init failed\n"); 367 dev_warn(dev->dev, "omap_fbdev_init failed\n");
@@ -596,10 +370,6 @@ static int dev_load(struct drm_device *dev, unsigned long flags)
596 370
597 drm_kms_helper_poll_init(dev); 371 drm_kms_helper_poll_init(dev);
598 372
599 ret = drm_vblank_init(dev, priv->num_crtcs);
600 if (ret)
601 dev_warn(dev->dev, "could not init vblank\n");
602
603 return 0; 373 return 0;
604} 374}
605 375
@@ -609,8 +379,9 @@ static int dev_unload(struct drm_device *dev)
609 379
610 DBG("unload: dev=%p", dev); 380 DBG("unload: dev=%p", dev);
611 381
612 drm_vblank_cleanup(dev);
613 drm_kms_helper_poll_fini(dev); 382 drm_kms_helper_poll_fini(dev);
383 drm_vblank_cleanup(dev);
384 omap_drm_irq_uninstall(dev);
614 385
615 omap_fbdev_free(dev); 386 omap_fbdev_free(dev);
616 omap_modeset_free(dev); 387 omap_modeset_free(dev);
@@ -619,8 +390,6 @@ static int dev_unload(struct drm_device *dev)
619 flush_workqueue(priv->wq); 390 flush_workqueue(priv->wq);
620 destroy_workqueue(priv->wq); 391 destroy_workqueue(priv->wq);
621 392
622 omapdss_compat_uninit();
623
624 kfree(dev->dev_private); 393 kfree(dev->dev_private);
625 dev->dev_private = NULL; 394 dev->dev_private = NULL;
626 395
@@ -680,7 +449,9 @@ static void dev_lastclose(struct drm_device *dev)
680 } 449 }
681 } 450 }
682 451
452 mutex_lock(&dev->mode_config.mutex);
683 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev); 453 ret = drm_fb_helper_restore_fbdev_mode(priv->fbdev);
454 mutex_unlock(&dev->mode_config.mutex);
684 if (ret) 455 if (ret)
685 DBG("failed to restore crtc mode"); 456 DBG("failed to restore crtc mode");
686} 457}
@@ -695,60 +466,6 @@ static void dev_postclose(struct drm_device *dev, struct drm_file *file)
695 DBG("postclose: dev=%p, file=%p", dev, file); 466 DBG("postclose: dev=%p, file=%p", dev, file);
696} 467}
697 468
698/**
699 * enable_vblank - enable vblank interrupt events
700 * @dev: DRM device
701 * @crtc: which irq to enable
702 *
703 * Enable vblank interrupts for @crtc. If the device doesn't have
704 * a hardware vblank counter, this routine should be a no-op, since
705 * interrupts will have to stay on to keep the count accurate.
706 *
707 * RETURNS
708 * Zero on success, appropriate errno if the given @crtc's vblank
709 * interrupt cannot be enabled.
710 */
711static int dev_enable_vblank(struct drm_device *dev, int crtc)
712{
713 DBG("enable_vblank: dev=%p, crtc=%d", dev, crtc);
714 return 0;
715}
716
717/**
718 * disable_vblank - disable vblank interrupt events
719 * @dev: DRM device
720 * @crtc: which irq to enable
721 *
722 * Disable vblank interrupts for @crtc. If the device doesn't have
723 * a hardware vblank counter, this routine should be a no-op, since
724 * interrupts will have to stay on to keep the count accurate.
725 */
726static void dev_disable_vblank(struct drm_device *dev, int crtc)
727{
728 DBG("disable_vblank: dev=%p, crtc=%d", dev, crtc);
729}
730
731static irqreturn_t dev_irq_handler(DRM_IRQ_ARGS)
732{
733 return IRQ_HANDLED;
734}
735
736static void dev_irq_preinstall(struct drm_device *dev)
737{
738 DBG("irq_preinstall: dev=%p", dev);
739}
740
741static int dev_irq_postinstall(struct drm_device *dev)
742{
743 DBG("irq_postinstall: dev=%p", dev);
744 return 0;
745}
746
747static void dev_irq_uninstall(struct drm_device *dev)
748{
749 DBG("irq_uninstall: dev=%p", dev);
750}
751
752static const struct vm_operations_struct omap_gem_vm_ops = { 469static const struct vm_operations_struct omap_gem_vm_ops = {
753 .fault = omap_gem_fault, 470 .fault = omap_gem_fault,
754 .open = drm_gem_vm_open, 471 .open = drm_gem_vm_open,
@@ -778,12 +495,12 @@ static struct drm_driver omap_drm_driver = {
778 .preclose = dev_preclose, 495 .preclose = dev_preclose,
779 .postclose = dev_postclose, 496 .postclose = dev_postclose,
780 .get_vblank_counter = drm_vblank_count, 497 .get_vblank_counter = drm_vblank_count,
781 .enable_vblank = dev_enable_vblank, 498 .enable_vblank = omap_irq_enable_vblank,
782 .disable_vblank = dev_disable_vblank, 499 .disable_vblank = omap_irq_disable_vblank,
783 .irq_preinstall = dev_irq_preinstall, 500 .irq_preinstall = omap_irq_preinstall,
784 .irq_postinstall = dev_irq_postinstall, 501 .irq_postinstall = omap_irq_postinstall,
785 .irq_uninstall = dev_irq_uninstall, 502 .irq_uninstall = omap_irq_uninstall,
786 .irq_handler = dev_irq_handler, 503 .irq_handler = omap_irq_handler,
787#ifdef CONFIG_DEBUG_FS 504#ifdef CONFIG_DEBUG_FS
788 .debugfs_init = omap_debugfs_init, 505 .debugfs_init = omap_debugfs_init,
789 .debugfs_cleanup = omap_debugfs_cleanup, 506 .debugfs_cleanup = omap_debugfs_cleanup,
diff --git a/drivers/staging/omapdrm/omap_drv.h b/drivers/staging/omapdrm/omap_drv.h
index 1d4aea53b75..cd1f22b0b12 100644
--- a/drivers/staging/omapdrm/omap_drv.h
+++ b/drivers/staging/omapdrm/omap_drv.h
@@ -28,6 +28,7 @@
28#include <linux/platform_data/omap_drm.h> 28#include <linux/platform_data/omap_drm.h>
29#include "omap_drm.h" 29#include "omap_drm.h"
30 30
31
31#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__) 32#define DBG(fmt, ...) DRM_DEBUG(fmt"\n", ##__VA_ARGS__)
32#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */ 33#define VERB(fmt, ...) if (0) DRM_DEBUG(fmt, ##__VA_ARGS__) /* verbose debug */
33 34
@@ -39,6 +40,51 @@
39 */ 40 */
40#define MAX_MAPPERS 2 41#define MAX_MAPPERS 2
41 42
43/* parameters which describe (unrotated) coordinates of scanout within a fb: */
44struct omap_drm_window {
45 uint32_t rotation;
46 int32_t crtc_x, crtc_y; /* signed because can be offscreen */
47 uint32_t crtc_w, crtc_h;
48 uint32_t src_x, src_y;
49 uint32_t src_w, src_h;
50};
51
52/* Once GO bit is set, we can't make further updates to shadowed registers
53 * until the GO bit is cleared. So various parts in the kms code that need
54 * to update shadowed registers queue up a pair of callbacks, pre_apply
55 * which is called before setting GO bit, and post_apply that is called
56 * after GO bit is cleared. The crtc manages the queuing, and everyone
57 * else goes thru omap_crtc_apply() using these callbacks so that the
58 * code which has to deal w/ GO bit state is centralized.
59 */
60struct omap_drm_apply {
61 struct list_head pending_node, queued_node;
62 bool queued;
63 void (*pre_apply)(struct omap_drm_apply *apply);
64 void (*post_apply)(struct omap_drm_apply *apply);
65};
66
67/* For transiently registering for different DSS irqs that various parts
68 * of the KMS code need during setup/configuration. We these are not
69 * necessarily the same as what drm_vblank_get/put() are requesting, and
70 * the hysteresis in drm_vblank_put() is not necessarily desirable for
71 * internal housekeeping related irq usage.
72 */
73struct omap_drm_irq {
74 struct list_head node;
75 uint32_t irqmask;
76 bool registered;
77 void (*irq)(struct omap_drm_irq *irq, uint32_t irqstatus);
78};
79
80/* For KMS code that needs to wait for a certain # of IRQs:
81 */
82struct omap_irq_wait;
83struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
84 uint32_t irqmask, int count);
85int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
86 unsigned long timeout);
87
42struct omap_drm_private { 88struct omap_drm_private {
43 uint32_t omaprev; 89 uint32_t omaprev;
44 90
@@ -58,6 +104,7 @@ struct omap_drm_private {
58 104
59 struct workqueue_struct *wq; 105 struct workqueue_struct *wq;
60 106
107 /* list of GEM objects: */
61 struct list_head obj_list; 108 struct list_head obj_list;
62 109
63 bool has_dmm; 110 bool has_dmm;
@@ -65,6 +112,11 @@ struct omap_drm_private {
65 /* properties: */ 112 /* properties: */
66 struct drm_property *rotation_prop; 113 struct drm_property *rotation_prop;
67 struct drm_property *zorder_prop; 114 struct drm_property *zorder_prop;
115
116 /* irq handling: */
117 struct list_head irq_list; /* list of omap_drm_irq */
118 uint32_t vblank_mask; /* irq bits set for userspace vblank */
119 struct omap_drm_irq error_handler;
68}; 120};
69 121
70/* this should probably be in drm-core to standardize amongst drivers */ 122/* this should probably be in drm-core to standardize amongst drivers */
@@ -75,15 +127,6 @@ struct omap_drm_private {
75#define DRM_REFLECT_X 4 127#define DRM_REFLECT_X 4
76#define DRM_REFLECT_Y 5 128#define DRM_REFLECT_Y 5
77 129
78/* parameters which describe (unrotated) coordinates of scanout within a fb: */
79struct omap_drm_window {
80 uint32_t rotation;
81 int32_t crtc_x, crtc_y; /* signed because can be offscreen */
82 uint32_t crtc_w, crtc_h;
83 uint32_t src_x, src_y;
84 uint32_t src_w, src_h;
85};
86
87#ifdef CONFIG_DEBUG_FS 130#ifdef CONFIG_DEBUG_FS
88int omap_debugfs_init(struct drm_minor *minor); 131int omap_debugfs_init(struct drm_minor *minor);
89void omap_debugfs_cleanup(struct drm_minor *minor); 132void omap_debugfs_cleanup(struct drm_minor *minor);
@@ -92,23 +135,36 @@ void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
92void omap_gem_describe_objects(struct list_head *list, struct seq_file *m); 135void omap_gem_describe_objects(struct list_head *list, struct seq_file *m);
93#endif 136#endif
94 137
138int omap_irq_enable_vblank(struct drm_device *dev, int crtc);
139void omap_irq_disable_vblank(struct drm_device *dev, int crtc);
140irqreturn_t omap_irq_handler(DRM_IRQ_ARGS);
141void omap_irq_preinstall(struct drm_device *dev);
142int omap_irq_postinstall(struct drm_device *dev);
143void omap_irq_uninstall(struct drm_device *dev);
144void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq);
145void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq);
146int omap_drm_irq_uninstall(struct drm_device *dev);
147int omap_drm_irq_install(struct drm_device *dev);
148
95struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev); 149struct drm_fb_helper *omap_fbdev_init(struct drm_device *dev);
96void omap_fbdev_free(struct drm_device *dev); 150void omap_fbdev_free(struct drm_device *dev);
97 151
152const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc);
153enum omap_channel omap_crtc_channel(struct drm_crtc *crtc);
154int omap_crtc_apply(struct drm_crtc *crtc,
155 struct omap_drm_apply *apply);
98struct drm_crtc *omap_crtc_init(struct drm_device *dev, 156struct drm_crtc *omap_crtc_init(struct drm_device *dev,
99 struct omap_overlay *ovl, int id); 157 struct drm_plane *plane, enum omap_channel channel, int id);
100 158
101struct drm_plane *omap_plane_init(struct drm_device *dev, 159struct drm_plane *omap_plane_init(struct drm_device *dev,
102 struct omap_overlay *ovl, unsigned int possible_crtcs, 160 int plane_id, bool private_plane);
103 bool priv);
104int omap_plane_dpms(struct drm_plane *plane, int mode); 161int omap_plane_dpms(struct drm_plane *plane, int mode);
105int omap_plane_mode_set(struct drm_plane *plane, 162int omap_plane_mode_set(struct drm_plane *plane,
106 struct drm_crtc *crtc, struct drm_framebuffer *fb, 163 struct drm_crtc *crtc, struct drm_framebuffer *fb,
107 int crtc_x, int crtc_y, 164 int crtc_x, int crtc_y,
108 unsigned int crtc_w, unsigned int crtc_h, 165 unsigned int crtc_w, unsigned int crtc_h,
109 uint32_t src_x, uint32_t src_y, 166 uint32_t src_x, uint32_t src_y,
110 uint32_t src_w, uint32_t src_h); 167 uint32_t src_w, uint32_t src_h,
111void omap_plane_on_endwin(struct drm_plane *plane,
112 void (*fxn)(void *), void *arg); 168 void (*fxn)(void *), void *arg);
113void omap_plane_install_properties(struct drm_plane *plane, 169void omap_plane_install_properties(struct drm_plane *plane,
114 struct drm_mode_object *obj); 170 struct drm_mode_object *obj);
@@ -116,21 +172,25 @@ int omap_plane_set_property(struct drm_plane *plane,
116 struct drm_property *property, uint64_t val); 172 struct drm_property *property, uint64_t val);
117 173
118struct drm_encoder *omap_encoder_init(struct drm_device *dev, 174struct drm_encoder *omap_encoder_init(struct drm_device *dev,
119 struct omap_overlay_manager *mgr); 175 struct omap_dss_device *dssdev);
120struct omap_overlay_manager *omap_encoder_get_manager( 176int omap_encoder_set_enabled(struct drm_encoder *encoder, bool enabled);
177int omap_encoder_update(struct drm_encoder *encoder,
178 struct omap_overlay_manager *mgr,
179 struct omap_video_timings *timings);
180
181struct drm_connector *omap_connector_init(struct drm_device *dev,
182 int connector_type, struct omap_dss_device *dssdev,
121 struct drm_encoder *encoder); 183 struct drm_encoder *encoder);
122struct drm_encoder *omap_connector_attached_encoder( 184struct drm_encoder *omap_connector_attached_encoder(
123 struct drm_connector *connector); 185 struct drm_connector *connector);
124enum drm_connector_status omap_connector_detect(
125 struct drm_connector *connector, bool force);
126
127struct drm_connector *omap_connector_init(struct drm_device *dev,
128 int connector_type, struct omap_dss_device *dssdev);
129void omap_connector_mode_set(struct drm_connector *connector,
130 struct drm_display_mode *mode);
131void omap_connector_flush(struct drm_connector *connector, 186void omap_connector_flush(struct drm_connector *connector,
132 int x, int y, int w, int h); 187 int x, int y, int w, int h);
133 188
189void copy_timings_omap_to_drm(struct drm_display_mode *mode,
190 struct omap_video_timings *timings);
191void copy_timings_drm_to_omap(struct omap_video_timings *timings,
192 struct drm_display_mode *mode);
193
134uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats, 194uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
135 uint32_t max_formats, enum omap_color_mode supported_modes); 195 uint32_t max_formats, enum omap_color_mode supported_modes);
136struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev, 196struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
@@ -207,6 +267,40 @@ static inline int align_pitch(int pitch, int width, int bpp)
207 return ALIGN(pitch, 8 * bytespp); 267 return ALIGN(pitch, 8 * bytespp);
208} 268}
209 269
270static inline enum omap_channel pipe2chan(int pipe)
271{
272 int num_mgrs = dss_feat_get_num_mgrs();
273
274 /*
275 * We usually don't want to create a CRTC for each manager,
276 * at least not until we have a way to expose private planes
277 * to userspace. Otherwise there would not be enough video
278 * pipes left for drm planes. The higher #'d managers tend
279 * to have more features so start in reverse order.
280 */
281 return num_mgrs - pipe - 1;
282}
283
284/* map crtc to vblank mask */
285static inline uint32_t pipe2vbl(int crtc)
286{
287 enum omap_channel channel = pipe2chan(crtc);
288 return dispc_mgr_get_vsync_irq(channel);
289}
290
291static inline int crtc2pipe(struct drm_device *dev, struct drm_crtc *crtc)
292{
293 struct omap_drm_private *priv = dev->dev_private;
294 int i;
295
296 for (i = 0; i < ARRAY_SIZE(priv->crtcs); i++)
297 if (priv->crtcs[i] == crtc)
298 return i;
299
300 BUG(); /* bogus CRTC ptr */
301 return -1;
302}
303
210/* should these be made into common util helpers? 304/* should these be made into common util helpers?
211 */ 305 */
212 306
diff --git a/drivers/staging/omapdrm/omap_encoder.c b/drivers/staging/omapdrm/omap_encoder.c
index 5341d5e3e31..e053160d2db 100644
--- a/drivers/staging/omapdrm/omap_encoder.c
+++ b/drivers/staging/omapdrm/omap_encoder.c
@@ -22,37 +22,56 @@
22#include "drm_crtc.h" 22#include "drm_crtc.h"
23#include "drm_crtc_helper.h" 23#include "drm_crtc_helper.h"
24 24
25#include <linux/list.h>
26
27
25/* 28/*
26 * encoder funcs 29 * encoder funcs
27 */ 30 */
28 31
29#define to_omap_encoder(x) container_of(x, struct omap_encoder, base) 32#define to_omap_encoder(x) container_of(x, struct omap_encoder, base)
30 33
34/* The encoder and connector both map to same dssdev.. the encoder
35 * handles the 'active' parts, ie. anything the modifies the state
36 * of the hw, and the connector handles the 'read-only' parts, like
37 * detecting connection and reading edid.
38 */
31struct omap_encoder { 39struct omap_encoder {
32 struct drm_encoder base; 40 struct drm_encoder base;
33 struct omap_overlay_manager *mgr; 41 struct omap_dss_device *dssdev;
34}; 42};
35 43
36static void omap_encoder_destroy(struct drm_encoder *encoder) 44static void omap_encoder_destroy(struct drm_encoder *encoder)
37{ 45{
38 struct omap_encoder *omap_encoder = to_omap_encoder(encoder); 46 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
39 DBG("%s", omap_encoder->mgr->name);
40 drm_encoder_cleanup(encoder); 47 drm_encoder_cleanup(encoder);
41 kfree(omap_encoder); 48 kfree(omap_encoder);
42} 49}
43 50
51static const struct drm_encoder_funcs omap_encoder_funcs = {
52 .destroy = omap_encoder_destroy,
53};
54
55/*
56 * The CRTC drm_crtc_helper_set_mode() doesn't really give us the right
57 * order.. the easiest way to work around this for now is to make all
58 * the encoder-helper's no-op's and have the omap_crtc code take care
59 * of the sequencing and call us in the right points.
60 *
61 * Eventually to handle connecting CRTCs to different encoders properly,
62 * either the CRTC helpers need to change or we need to replace
63 * drm_crtc_helper_set_mode(), but lets wait until atomic-modeset for
64 * that.
65 */
66
44static void omap_encoder_dpms(struct drm_encoder *encoder, int mode) 67static void omap_encoder_dpms(struct drm_encoder *encoder, int mode)
45{ 68{
46 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
47 DBG("%s: %d", omap_encoder->mgr->name, mode);
48} 69}
49 70
50static bool omap_encoder_mode_fixup(struct drm_encoder *encoder, 71static bool omap_encoder_mode_fixup(struct drm_encoder *encoder,
51 const struct drm_display_mode *mode, 72 const struct drm_display_mode *mode,
52 struct drm_display_mode *adjusted_mode) 73 struct drm_display_mode *adjusted_mode)
53{ 74{
54 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
55 DBG("%s", omap_encoder->mgr->name);
56 return true; 75 return true;
57} 76}
58 77
@@ -60,47 +79,16 @@ static void omap_encoder_mode_set(struct drm_encoder *encoder,
60 struct drm_display_mode *mode, 79 struct drm_display_mode *mode,
61 struct drm_display_mode *adjusted_mode) 80 struct drm_display_mode *adjusted_mode)
62{ 81{
63 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
64 struct drm_device *dev = encoder->dev;
65 struct omap_drm_private *priv = dev->dev_private;
66 int i;
67
68 mode = adjusted_mode;
69
70 DBG("%s: set mode: %dx%d", omap_encoder->mgr->name,
71 mode->hdisplay, mode->vdisplay);
72
73 for (i = 0; i < priv->num_connectors; i++) {
74 struct drm_connector *connector = priv->connectors[i];
75 if (connector->encoder == encoder)
76 omap_connector_mode_set(connector, mode);
77
78 }
79} 82}
80 83
81static void omap_encoder_prepare(struct drm_encoder *encoder) 84static void omap_encoder_prepare(struct drm_encoder *encoder)
82{ 85{
83 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
84 struct drm_encoder_helper_funcs *encoder_funcs =
85 encoder->helper_private;
86 DBG("%s", omap_encoder->mgr->name);
87 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_OFF);
88} 86}
89 87
90static void omap_encoder_commit(struct drm_encoder *encoder) 88static void omap_encoder_commit(struct drm_encoder *encoder)
91{ 89{
92 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
93 struct drm_encoder_helper_funcs *encoder_funcs =
94 encoder->helper_private;
95 DBG("%s", omap_encoder->mgr->name);
96 omap_encoder->mgr->apply(omap_encoder->mgr);
97 encoder_funcs->dpms(encoder, DRM_MODE_DPMS_ON);
98} 90}
99 91
100static const struct drm_encoder_funcs omap_encoder_funcs = {
101 .destroy = omap_encoder_destroy,
102};
103
104static const struct drm_encoder_helper_funcs omap_encoder_helper_funcs = { 92static const struct drm_encoder_helper_funcs omap_encoder_helper_funcs = {
105 .dpms = omap_encoder_dpms, 93 .dpms = omap_encoder_dpms,
106 .mode_fixup = omap_encoder_mode_fixup, 94 .mode_fixup = omap_encoder_mode_fixup,
@@ -109,23 +97,54 @@ static const struct drm_encoder_helper_funcs omap_encoder_helper_funcs = {
109 .commit = omap_encoder_commit, 97 .commit = omap_encoder_commit,
110}; 98};
111 99
112struct omap_overlay_manager *omap_encoder_get_manager( 100/*
113 struct drm_encoder *encoder) 101 * Instead of relying on the helpers for modeset, the omap_crtc code
102 * calls these functions in the proper sequence.
103 */
104
105int omap_encoder_set_enabled(struct drm_encoder *encoder, bool enabled)
114{ 106{
115 struct omap_encoder *omap_encoder = to_omap_encoder(encoder); 107 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
116 return omap_encoder->mgr; 108 struct omap_dss_device *dssdev = omap_encoder->dssdev;
109 struct omap_dss_driver *dssdrv = dssdev->driver;
110
111 if (enabled) {
112 return dssdrv->enable(dssdev);
113 } else {
114 dssdrv->disable(dssdev);
115 return 0;
116 }
117}
118
119int omap_encoder_update(struct drm_encoder *encoder,
120 struct omap_overlay_manager *mgr,
121 struct omap_video_timings *timings)
122{
123 struct drm_device *dev = encoder->dev;
124 struct omap_encoder *omap_encoder = to_omap_encoder(encoder);
125 struct omap_dss_device *dssdev = omap_encoder->dssdev;
126 struct omap_dss_driver *dssdrv = dssdev->driver;
127 int ret;
128
129 dssdev->output->manager = mgr;
130
131 ret = dssdrv->check_timings(dssdev, timings);
132 if (ret) {
133 dev_err(dev->dev, "could not set timings: %d\n", ret);
134 return ret;
135 }
136
137 dssdrv->set_timings(dssdev, timings);
138
139 return 0;
117} 140}
118 141
119/* initialize encoder */ 142/* initialize encoder */
120struct drm_encoder *omap_encoder_init(struct drm_device *dev, 143struct drm_encoder *omap_encoder_init(struct drm_device *dev,
121 struct omap_overlay_manager *mgr) 144 struct omap_dss_device *dssdev)
122{ 145{
123 struct drm_encoder *encoder = NULL; 146 struct drm_encoder *encoder = NULL;
124 struct omap_encoder *omap_encoder; 147 struct omap_encoder *omap_encoder;
125 struct omap_overlay_manager_info info;
126 int ret;
127
128 DBG("%s", mgr->name);
129 148
130 omap_encoder = kzalloc(sizeof(*omap_encoder), GFP_KERNEL); 149 omap_encoder = kzalloc(sizeof(*omap_encoder), GFP_KERNEL);
131 if (!omap_encoder) { 150 if (!omap_encoder) {
@@ -133,33 +152,14 @@ struct drm_encoder *omap_encoder_init(struct drm_device *dev,
133 goto fail; 152 goto fail;
134 } 153 }
135 154
136 omap_encoder->mgr = mgr; 155 omap_encoder->dssdev = dssdev;
156
137 encoder = &omap_encoder->base; 157 encoder = &omap_encoder->base;
138 158
139 drm_encoder_init(dev, encoder, &omap_encoder_funcs, 159 drm_encoder_init(dev, encoder, &omap_encoder_funcs,
140 DRM_MODE_ENCODER_TMDS); 160 DRM_MODE_ENCODER_TMDS);
141 drm_encoder_helper_add(encoder, &omap_encoder_helper_funcs); 161 drm_encoder_helper_add(encoder, &omap_encoder_helper_funcs);
142 162
143 mgr->get_manager_info(mgr, &info);
144
145 /* TODO: fix hard-coded setup.. */
146 info.default_color = 0x00000000;
147 info.trans_key = 0x00000000;
148 info.trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
149 info.trans_enabled = false;
150
151 ret = mgr->set_manager_info(mgr, &info);
152 if (ret) {
153 dev_err(dev->dev, "could not set manager info\n");
154 goto fail;
155 }
156
157 ret = mgr->apply(mgr);
158 if (ret) {
159 dev_err(dev->dev, "could not apply\n");
160 goto fail;
161 }
162
163 return encoder; 163 return encoder;
164 164
165fail: 165fail:
diff --git a/drivers/staging/omapdrm/omap_gem_dmabuf.c b/drivers/staging/omapdrm/omap_gem_dmabuf.c
index ea384003825..b6c5b5c6c8c 100644
--- a/drivers/staging/omapdrm/omap_gem_dmabuf.c
+++ b/drivers/staging/omapdrm/omap_gem_dmabuf.c
@@ -194,7 +194,7 @@ struct dma_buf_ops omap_dmabuf_ops = {
194struct dma_buf *omap_gem_prime_export(struct drm_device *dev, 194struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
195 struct drm_gem_object *obj, int flags) 195 struct drm_gem_object *obj, int flags)
196{ 196{
197 return dma_buf_export(obj, &omap_dmabuf_ops, obj->size, 0600); 197 return dma_buf_export(obj, &omap_dmabuf_ops, obj->size, flags);
198} 198}
199 199
200struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev, 200struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
diff --git a/drivers/staging/omapdrm/omap_irq.c b/drivers/staging/omapdrm/omap_irq.c
new file mode 100644
index 00000000000..2629ba7be6c
--- /dev/null
+++ b/drivers/staging/omapdrm/omap_irq.c
@@ -0,0 +1,322 @@
1/*
2 * drivers/staging/omapdrm/omap_irq.c
3 *
4 * Copyright (C) 2012 Texas Instruments
5 * Author: Rob Clark <rob.clark@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "omap_drv.h"
21
22static DEFINE_SPINLOCK(list_lock);
23
24static void omap_irq_error_handler(struct omap_drm_irq *irq,
25 uint32_t irqstatus)
26{
27 DRM_ERROR("errors: %08x\n", irqstatus);
28}
29
30/* call with list_lock and dispc runtime held */
31static void omap_irq_update(struct drm_device *dev)
32{
33 struct omap_drm_private *priv = dev->dev_private;
34 struct omap_drm_irq *irq;
35 uint32_t irqmask = priv->vblank_mask;
36
37 BUG_ON(!spin_is_locked(&list_lock));
38
39 list_for_each_entry(irq, &priv->irq_list, node)
40 irqmask |= irq->irqmask;
41
42 DBG("irqmask=%08x", irqmask);
43
44 dispc_write_irqenable(irqmask);
45 dispc_read_irqenable(); /* flush posted write */
46}
47
48void omap_irq_register(struct drm_device *dev, struct omap_drm_irq *irq)
49{
50 struct omap_drm_private *priv = dev->dev_private;
51 unsigned long flags;
52
53 dispc_runtime_get();
54 spin_lock_irqsave(&list_lock, flags);
55
56 if (!WARN_ON(irq->registered)) {
57 irq->registered = true;
58 list_add(&irq->node, &priv->irq_list);
59 omap_irq_update(dev);
60 }
61
62 spin_unlock_irqrestore(&list_lock, flags);
63 dispc_runtime_put();
64}
65
66void omap_irq_unregister(struct drm_device *dev, struct omap_drm_irq *irq)
67{
68 unsigned long flags;
69
70 dispc_runtime_get();
71 spin_lock_irqsave(&list_lock, flags);
72
73 if (!WARN_ON(!irq->registered)) {
74 irq->registered = false;
75 list_del(&irq->node);
76 omap_irq_update(dev);
77 }
78
79 spin_unlock_irqrestore(&list_lock, flags);
80 dispc_runtime_put();
81}
82
83struct omap_irq_wait {
84 struct omap_drm_irq irq;
85 int count;
86};
87
88static DECLARE_WAIT_QUEUE_HEAD(wait_event);
89
90static void wait_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
91{
92 struct omap_irq_wait *wait =
93 container_of(irq, struct omap_irq_wait, irq);
94 wait->count--;
95 wake_up_all(&wait_event);
96}
97
98struct omap_irq_wait * omap_irq_wait_init(struct drm_device *dev,
99 uint32_t irqmask, int count)
100{
101 struct omap_irq_wait *wait = kzalloc(sizeof(*wait), GFP_KERNEL);
102 wait->irq.irq = wait_irq;
103 wait->irq.irqmask = irqmask;
104 wait->count = count;
105 omap_irq_register(dev, &wait->irq);
106 return wait;
107}
108
109int omap_irq_wait(struct drm_device *dev, struct omap_irq_wait *wait,
110 unsigned long timeout)
111{
112 int ret = wait_event_timeout(wait_event, (wait->count <= 0), timeout);
113 omap_irq_unregister(dev, &wait->irq);
114 kfree(wait);
115 if (ret == 0)
116 return -1;
117 return 0;
118}
119
120/**
121 * enable_vblank - enable vblank interrupt events
122 * @dev: DRM device
123 * @crtc: which irq to enable
124 *
125 * Enable vblank interrupts for @crtc. If the device doesn't have
126 * a hardware vblank counter, this routine should be a no-op, since
127 * interrupts will have to stay on to keep the count accurate.
128 *
129 * RETURNS
130 * Zero on success, appropriate errno if the given @crtc's vblank
131 * interrupt cannot be enabled.
132 */
133int omap_irq_enable_vblank(struct drm_device *dev, int crtc)
134{
135 struct omap_drm_private *priv = dev->dev_private;
136 unsigned long flags;
137
138 DBG("dev=%p, crtc=%d", dev, crtc);
139
140 dispc_runtime_get();
141 spin_lock_irqsave(&list_lock, flags);
142 priv->vblank_mask |= pipe2vbl(crtc);
143 omap_irq_update(dev);
144 spin_unlock_irqrestore(&list_lock, flags);
145 dispc_runtime_put();
146
147 return 0;
148}
149
150/**
151 * disable_vblank - disable vblank interrupt events
152 * @dev: DRM device
153 * @crtc: which irq to enable
154 *
155 * Disable vblank interrupts for @crtc. If the device doesn't have
156 * a hardware vblank counter, this routine should be a no-op, since
157 * interrupts will have to stay on to keep the count accurate.
158 */
159void omap_irq_disable_vblank(struct drm_device *dev, int crtc)
160{
161 struct omap_drm_private *priv = dev->dev_private;
162 unsigned long flags;
163
164 DBG("dev=%p, crtc=%d", dev, crtc);
165
166 dispc_runtime_get();
167 spin_lock_irqsave(&list_lock, flags);
168 priv->vblank_mask &= ~pipe2vbl(crtc);
169 omap_irq_update(dev);
170 spin_unlock_irqrestore(&list_lock, flags);
171 dispc_runtime_put();
172}
173
174irqreturn_t omap_irq_handler(DRM_IRQ_ARGS)
175{
176 struct drm_device *dev = (struct drm_device *) arg;
177 struct omap_drm_private *priv = dev->dev_private;
178 struct omap_drm_irq *handler, *n;
179 unsigned long flags;
180 unsigned int id;
181 u32 irqstatus;
182
183 irqstatus = dispc_read_irqstatus();
184 dispc_clear_irqstatus(irqstatus);
185 dispc_read_irqstatus(); /* flush posted write */
186
187 VERB("irqs: %08x", irqstatus);
188
189 for (id = 0; id < priv->num_crtcs; id++)
190 if (irqstatus & pipe2vbl(id))
191 drm_handle_vblank(dev, id);
192
193 spin_lock_irqsave(&list_lock, flags);
194 list_for_each_entry_safe(handler, n, &priv->irq_list, node) {
195 if (handler->irqmask & irqstatus) {
196 spin_unlock_irqrestore(&list_lock, flags);
197 handler->irq(handler, handler->irqmask & irqstatus);
198 spin_lock_irqsave(&list_lock, flags);
199 }
200 }
201 spin_unlock_irqrestore(&list_lock, flags);
202
203 return IRQ_HANDLED;
204}
205
206void omap_irq_preinstall(struct drm_device *dev)
207{
208 DBG("dev=%p", dev);
209 dispc_runtime_get();
210 dispc_clear_irqstatus(0xffffffff);
211 dispc_runtime_put();
212}
213
214int omap_irq_postinstall(struct drm_device *dev)
215{
216 struct omap_drm_private *priv = dev->dev_private;
217 struct omap_drm_irq *error_handler = &priv->error_handler;
218
219 DBG("dev=%p", dev);
220
221 INIT_LIST_HEAD(&priv->irq_list);
222
223 error_handler->irq = omap_irq_error_handler;
224 error_handler->irqmask = DISPC_IRQ_OCP_ERR;
225
226 /* for now ignore DISPC_IRQ_SYNC_LOST_DIGIT.. really I think
227 * we just need to ignore it while enabling tv-out
228 */
229 error_handler->irqmask &= ~DISPC_IRQ_SYNC_LOST_DIGIT;
230
231 omap_irq_register(dev, error_handler);
232
233 return 0;
234}
235
236void omap_irq_uninstall(struct drm_device *dev)
237{
238 DBG("dev=%p", dev);
239 // TODO prolly need to call drm_irq_uninstall() somewhere too
240}
241
242/*
243 * We need a special version, instead of just using drm_irq_install(),
244 * because we need to register the irq via omapdss. Once omapdss and
245 * omapdrm are merged together we can assign the dispc hwmod data to
246 * ourselves and drop these and just use drm_irq_{install,uninstall}()
247 */
248
249int omap_drm_irq_install(struct drm_device *dev)
250{
251 int ret;
252
253 mutex_lock(&dev->struct_mutex);
254
255 if (dev->irq_enabled) {
256 mutex_unlock(&dev->struct_mutex);
257 return -EBUSY;
258 }
259 dev->irq_enabled = 1;
260 mutex_unlock(&dev->struct_mutex);
261
262 /* Before installing handler */
263 if (dev->driver->irq_preinstall)
264 dev->driver->irq_preinstall(dev);
265
266 ret = dispc_request_irq(dev->driver->irq_handler, dev);
267
268 if (ret < 0) {
269 mutex_lock(&dev->struct_mutex);
270 dev->irq_enabled = 0;
271 mutex_unlock(&dev->struct_mutex);
272 return ret;
273 }
274
275 /* After installing handler */
276 if (dev->driver->irq_postinstall)
277 ret = dev->driver->irq_postinstall(dev);
278
279 if (ret < 0) {
280 mutex_lock(&dev->struct_mutex);
281 dev->irq_enabled = 0;
282 mutex_unlock(&dev->struct_mutex);
283 dispc_free_irq(dev);
284 }
285
286 return ret;
287}
288
289int omap_drm_irq_uninstall(struct drm_device *dev)
290{
291 unsigned long irqflags;
292 int irq_enabled, i;
293
294 mutex_lock(&dev->struct_mutex);
295 irq_enabled = dev->irq_enabled;
296 dev->irq_enabled = 0;
297 mutex_unlock(&dev->struct_mutex);
298
299 /*
300 * Wake up any waiters so they don't hang.
301 */
302 if (dev->num_crtcs) {
303 spin_lock_irqsave(&dev->vbl_lock, irqflags);
304 for (i = 0; i < dev->num_crtcs; i++) {
305 DRM_WAKEUP(&dev->vbl_queue[i]);
306 dev->vblank_enabled[i] = 0;
307 dev->last_vblank[i] =
308 dev->driver->get_vblank_counter(dev, i);
309 }
310 spin_unlock_irqrestore(&dev->vbl_lock, irqflags);
311 }
312
313 if (!irq_enabled)
314 return -EINVAL;
315
316 if (dev->driver->irq_uninstall)
317 dev->driver->irq_uninstall(dev);
318
319 dispc_free_irq(dev);
320
321 return 0;
322}
diff --git a/drivers/staging/omapdrm/omap_plane.c b/drivers/staging/omapdrm/omap_plane.c
index 2a8e5bab49c..bb989d7f026 100644
--- a/drivers/staging/omapdrm/omap_plane.c
+++ b/drivers/staging/omapdrm/omap_plane.c
@@ -41,12 +41,14 @@ struct callback {
41 41
42struct omap_plane { 42struct omap_plane {
43 struct drm_plane base; 43 struct drm_plane base;
44 struct omap_overlay *ovl; 44 int id; /* TODO rename omap_plane -> omap_plane_id in omapdss so I can use the enum */
45 const char *name;
45 struct omap_overlay_info info; 46 struct omap_overlay_info info;
47 struct omap_drm_apply apply;
46 48
47 /* position/orientation of scanout within the fb: */ 49 /* position/orientation of scanout within the fb: */
48 struct omap_drm_window win; 50 struct omap_drm_window win;
49 51 bool enabled;
50 52
51 /* last fb that we pinned: */ 53 /* last fb that we pinned: */
52 struct drm_framebuffer *pinned_fb; 54 struct drm_framebuffer *pinned_fb;
@@ -54,189 +56,15 @@ struct omap_plane {
54 uint32_t nformats; 56 uint32_t nformats;
55 uint32_t formats[32]; 57 uint32_t formats[32];
56 58
57 /* for synchronizing access to unpins fifo */ 59 struct omap_drm_irq error_irq;
58 struct mutex unpin_mutex;
59 60
60 /* set of bo's pending unpin until next END_WIN irq */ 61 /* set of bo's pending unpin until next post_apply() */
61 DECLARE_KFIFO_PTR(unpin_fifo, struct drm_gem_object *); 62 DECLARE_KFIFO_PTR(unpin_fifo, struct drm_gem_object *);
62 int num_unpins, pending_num_unpins;
63
64 /* for deferred unpin when we need to wait for scanout complete irq */
65 struct work_struct work;
66
67 /* callback on next endwin irq */
68 struct callback endwin;
69};
70 63
71/* map from ovl->id to the irq we are interested in for scanout-done */ 64 // XXX maybe get rid of this and handle vblank in crtc too?
72static const uint32_t id2irq[] = { 65 struct callback apply_done_cb;
73 [OMAP_DSS_GFX] = DISPC_IRQ_GFX_END_WIN,
74 [OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_END_WIN,
75 [OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_END_WIN,
76 [OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_END_WIN,
77}; 66};
78 67
79static void dispc_isr(void *arg, uint32_t mask)
80{
81 struct drm_plane *plane = arg;
82 struct omap_plane *omap_plane = to_omap_plane(plane);
83 struct omap_drm_private *priv = plane->dev->dev_private;
84
85 omap_dispc_unregister_isr(dispc_isr, plane,
86 id2irq[omap_plane->ovl->id]);
87
88 queue_work(priv->wq, &omap_plane->work);
89}
90
91static void unpin_worker(struct work_struct *work)
92{
93 struct omap_plane *omap_plane =
94 container_of(work, struct omap_plane, work);
95 struct callback endwin;
96
97 mutex_lock(&omap_plane->unpin_mutex);
98 DBG("unpinning %d of %d", omap_plane->num_unpins,
99 omap_plane->num_unpins + omap_plane->pending_num_unpins);
100 while (omap_plane->num_unpins > 0) {
101 struct drm_gem_object *bo = NULL;
102 int ret = kfifo_get(&omap_plane->unpin_fifo, &bo);
103 WARN_ON(!ret);
104 omap_gem_put_paddr(bo);
105 drm_gem_object_unreference_unlocked(bo);
106 omap_plane->num_unpins--;
107 }
108 endwin = omap_plane->endwin;
109 omap_plane->endwin.fxn = NULL;
110 mutex_unlock(&omap_plane->unpin_mutex);
111
112 if (endwin.fxn)
113 endwin.fxn(endwin.arg);
114}
115
116static void install_irq(struct drm_plane *plane)
117{
118 struct omap_plane *omap_plane = to_omap_plane(plane);
119 struct omap_overlay *ovl = omap_plane->ovl;
120 int ret;
121
122 ret = omap_dispc_register_isr(dispc_isr, plane, id2irq[ovl->id]);
123
124 /*
125 * omapdss has upper limit on # of registered irq handlers,
126 * which we shouldn't hit.. but if we do the limit should
127 * be raised or bad things happen:
128 */
129 WARN_ON(ret == -EBUSY);
130}
131
132/* push changes down to dss2 */
133static int commit(struct drm_plane *plane)
134{
135 struct drm_device *dev = plane->dev;
136 struct omap_plane *omap_plane = to_omap_plane(plane);
137 struct omap_overlay *ovl = omap_plane->ovl;
138 struct omap_overlay_info *info = &omap_plane->info;
139 int ret;
140
141 DBG("%s", ovl->name);
142 DBG("%dx%d -> %dx%d (%d)", info->width, info->height, info->out_width,
143 info->out_height, info->screen_width);
144 DBG("%d,%d %08x %08x", info->pos_x, info->pos_y,
145 info->paddr, info->p_uv_addr);
146
147 /* NOTE: do we want to do this at all here, or just wait
148 * for dpms(ON) since other CRTC's may not have their mode
149 * set yet, so fb dimensions may still change..
150 */
151 ret = ovl->set_overlay_info(ovl, info);
152 if (ret) {
153 dev_err(dev->dev, "could not set overlay info\n");
154 return ret;
155 }
156
157 mutex_lock(&omap_plane->unpin_mutex);
158 omap_plane->num_unpins += omap_plane->pending_num_unpins;
159 omap_plane->pending_num_unpins = 0;
160 mutex_unlock(&omap_plane->unpin_mutex);
161
162 /* our encoder doesn't necessarily get a commit() after this, in
163 * particular in the dpms() and mode_set_base() cases, so force the
164 * manager to update:
165 *
166 * could this be in the encoder somehow?
167 */
168 if (ovl->manager) {
169 ret = ovl->manager->apply(ovl->manager);
170 if (ret) {
171 dev_err(dev->dev, "could not apply settings\n");
172 return ret;
173 }
174
175 /*
176 * NOTE: really this should be atomic w/ mgr->apply() but
177 * omapdss does not expose such an API
178 */
179 if (omap_plane->num_unpins > 0)
180 install_irq(plane);
181
182 } else {
183 struct omap_drm_private *priv = dev->dev_private;
184 queue_work(priv->wq, &omap_plane->work);
185 }
186
187
188 if (ovl->is_enabled(ovl)) {
189 omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y,
190 info->out_width, info->out_height);
191 }
192
193 return 0;
194}
195
196/* when CRTC that we are attached to has potentially changed, this checks
197 * if we are attached to proper manager, and if necessary updates.
198 */
199static void update_manager(struct drm_plane *plane)
200{
201 struct omap_drm_private *priv = plane->dev->dev_private;
202 struct omap_plane *omap_plane = to_omap_plane(plane);
203 struct omap_overlay *ovl = omap_plane->ovl;
204 struct omap_overlay_manager *mgr = NULL;
205 int i;
206
207 if (plane->crtc) {
208 for (i = 0; i < priv->num_encoders; i++) {
209 struct drm_encoder *encoder = priv->encoders[i];
210 if (encoder->crtc == plane->crtc) {
211 mgr = omap_encoder_get_manager(encoder);
212 break;
213 }
214 }
215 }
216
217 if (ovl->manager != mgr) {
218 bool enabled = ovl->is_enabled(ovl);
219
220 /* don't switch things around with enabled overlays: */
221 if (enabled)
222 omap_plane_dpms(plane, DRM_MODE_DPMS_OFF);
223
224 if (ovl->manager) {
225 DBG("disconnecting %s from %s", ovl->name,
226 ovl->manager->name);
227 ovl->unset_manager(ovl);
228 }
229
230 if (mgr) {
231 DBG("connecting %s to %s", ovl->name, mgr->name);
232 ovl->set_manager(ovl, mgr);
233 }
234
235 if (enabled && mgr)
236 omap_plane_dpms(plane, DRM_MODE_DPMS_ON);
237 }
238}
239
240static void unpin(void *arg, struct drm_gem_object *bo) 68static void unpin(void *arg, struct drm_gem_object *bo)
241{ 69{
242 struct drm_plane *plane = arg; 70 struct drm_plane *plane = arg;
@@ -244,7 +72,6 @@ static void unpin(void *arg, struct drm_gem_object *bo)
244 72
245 if (kfifo_put(&omap_plane->unpin_fifo, 73 if (kfifo_put(&omap_plane->unpin_fifo,
246 (const struct drm_gem_object **)&bo)) { 74 (const struct drm_gem_object **)&bo)) {
247 omap_plane->pending_num_unpins++;
248 /* also hold a ref so it isn't free'd while pinned */ 75 /* also hold a ref so it isn't free'd while pinned */
249 drm_gem_object_reference(bo); 76 drm_gem_object_reference(bo);
250 } else { 77 } else {
@@ -264,13 +91,19 @@ static int update_pin(struct drm_plane *plane, struct drm_framebuffer *fb)
264 91
265 DBG("%p -> %p", pinned_fb, fb); 92 DBG("%p -> %p", pinned_fb, fb);
266 93
267 mutex_lock(&omap_plane->unpin_mutex); 94 if (fb)
95 drm_framebuffer_reference(fb);
96
268 ret = omap_framebuffer_replace(pinned_fb, fb, plane, unpin); 97 ret = omap_framebuffer_replace(pinned_fb, fb, plane, unpin);
269 mutex_unlock(&omap_plane->unpin_mutex); 98
99 if (pinned_fb)
100 drm_framebuffer_unreference(pinned_fb);
270 101
271 if (ret) { 102 if (ret) {
272 dev_err(plane->dev->dev, "could not swap %p -> %p\n", 103 dev_err(plane->dev->dev, "could not swap %p -> %p\n",
273 omap_plane->pinned_fb, fb); 104 omap_plane->pinned_fb, fb);
105 if (fb)
106 drm_framebuffer_unreference(fb);
274 omap_plane->pinned_fb = NULL; 107 omap_plane->pinned_fb = NULL;
275 return ret; 108 return ret;
276 } 109 }
@@ -281,31 +114,90 @@ static int update_pin(struct drm_plane *plane, struct drm_framebuffer *fb)
281 return 0; 114 return 0;
282} 115}
283 116
284/* update parameters that are dependent on the framebuffer dimensions and 117static void omap_plane_pre_apply(struct omap_drm_apply *apply)
285 * position within the fb that this plane scans out from. This is called
286 * when framebuffer or x,y base may have changed.
287 */
288static void update_scanout(struct drm_plane *plane)
289{ 118{
290 struct omap_plane *omap_plane = to_omap_plane(plane); 119 struct omap_plane *omap_plane =
291 struct omap_overlay_info *info = &omap_plane->info; 120 container_of(apply, struct omap_plane, apply);
292 struct omap_drm_window *win = &omap_plane->win; 121 struct omap_drm_window *win = &omap_plane->win;
122 struct drm_plane *plane = &omap_plane->base;
123 struct drm_device *dev = plane->dev;
124 struct omap_overlay_info *info = &omap_plane->info;
125 struct drm_crtc *crtc = plane->crtc;
126 enum omap_channel channel;
127 bool enabled = omap_plane->enabled && crtc;
128 bool ilace, replication;
293 int ret; 129 int ret;
294 130
295 ret = update_pin(plane, plane->fb); 131 DBG("%s, enabled=%d", omap_plane->name, enabled);
296 if (ret) { 132
297 dev_err(plane->dev->dev, 133 /* if fb has changed, pin new fb: */
298 "could not pin fb: %d\n", ret); 134 update_pin(plane, enabled ? plane->fb : NULL);
299 omap_plane_dpms(plane, DRM_MODE_DPMS_OFF); 135
136 if (!enabled) {
137 dispc_ovl_enable(omap_plane->id, false);
300 return; 138 return;
301 } 139 }
302 140
141 channel = omap_crtc_channel(crtc);
142
143 /* update scanout: */
303 omap_framebuffer_update_scanout(plane->fb, win, info); 144 omap_framebuffer_update_scanout(plane->fb, win, info);
304 145
305 DBG("%s: %d,%d: %08x %08x (%d)", omap_plane->ovl->name, 146 DBG("%dx%d -> %dx%d (%d)", info->width, info->height,
306 win->src_x, win->src_y, 147 info->out_width, info->out_height,
307 (u32)info->paddr, (u32)info->p_uv_addr,
308 info->screen_width); 148 info->screen_width);
149 DBG("%d,%d %08x %08x", info->pos_x, info->pos_y,
150 info->paddr, info->p_uv_addr);
151
152 /* TODO: */
153 ilace = false;
154 replication = false;
155
156 /* and finally, update omapdss: */
157 ret = dispc_ovl_setup(omap_plane->id, info,
158 replication, omap_crtc_timings(crtc), false);
159 if (ret) {
160 dev_err(dev->dev, "dispc_ovl_setup failed: %d\n", ret);
161 return;
162 }
163
164 dispc_ovl_enable(omap_plane->id, true);
165 dispc_ovl_set_channel_out(omap_plane->id, channel);
166}
167
168static void omap_plane_post_apply(struct omap_drm_apply *apply)
169{
170 struct omap_plane *omap_plane =
171 container_of(apply, struct omap_plane, apply);
172 struct drm_plane *plane = &omap_plane->base;
173 struct omap_overlay_info *info = &omap_plane->info;
174 struct drm_gem_object *bo = NULL;
175 struct callback cb;
176
177 cb = omap_plane->apply_done_cb;
178 omap_plane->apply_done_cb.fxn = NULL;
179
180 while (kfifo_get(&omap_plane->unpin_fifo, &bo)) {
181 omap_gem_put_paddr(bo);
182 drm_gem_object_unreference_unlocked(bo);
183 }
184
185 if (cb.fxn)
186 cb.fxn(cb.arg);
187
188 if (omap_plane->enabled) {
189 omap_framebuffer_flush(plane->fb, info->pos_x, info->pos_y,
190 info->out_width, info->out_height);
191 }
192}
193
194static int apply(struct drm_plane *plane)
195{
196 if (plane->crtc) {
197 struct omap_plane *omap_plane = to_omap_plane(plane);
198 return omap_crtc_apply(plane->crtc, &omap_plane->apply);
199 }
200 return 0;
309} 201}
310 202
311int omap_plane_mode_set(struct drm_plane *plane, 203int omap_plane_mode_set(struct drm_plane *plane,
@@ -313,7 +205,8 @@ int omap_plane_mode_set(struct drm_plane *plane,
313 int crtc_x, int crtc_y, 205 int crtc_x, int crtc_y,
314 unsigned int crtc_w, unsigned int crtc_h, 206 unsigned int crtc_w, unsigned int crtc_h,
315 uint32_t src_x, uint32_t src_y, 207 uint32_t src_x, uint32_t src_y,
316 uint32_t src_w, uint32_t src_h) 208 uint32_t src_w, uint32_t src_h,
209 void (*fxn)(void *), void *arg)
317{ 210{
318 struct omap_plane *omap_plane = to_omap_plane(plane); 211 struct omap_plane *omap_plane = to_omap_plane(plane);
319 struct omap_drm_window *win = &omap_plane->win; 212 struct omap_drm_window *win = &omap_plane->win;
@@ -329,17 +222,20 @@ int omap_plane_mode_set(struct drm_plane *plane,
329 win->src_w = src_w >> 16; 222 win->src_w = src_w >> 16;
330 win->src_h = src_h >> 16; 223 win->src_h = src_h >> 16;
331 224
332 /* note: this is done after this fxn returns.. but if we need 225 if (fxn) {
333 * to do a commit/update_scanout, etc before this returns we 226 /* omap_crtc should ensure that a new page flip
334 * need the current value. 227 * isn't permitted while there is one pending:
335 */ 228 */
229 BUG_ON(omap_plane->apply_done_cb.fxn);
230
231 omap_plane->apply_done_cb.fxn = fxn;
232 omap_plane->apply_done_cb.arg = arg;
233 }
234
336 plane->fb = fb; 235 plane->fb = fb;
337 plane->crtc = crtc; 236 plane->crtc = crtc;
338 237
339 update_scanout(plane); 238 return apply(plane);
340 update_manager(plane);
341
342 return 0;
343} 239}
344 240
345static int omap_plane_update(struct drm_plane *plane, 241static int omap_plane_update(struct drm_plane *plane,
@@ -349,9 +245,12 @@ static int omap_plane_update(struct drm_plane *plane,
349 uint32_t src_x, uint32_t src_y, 245 uint32_t src_x, uint32_t src_y,
350 uint32_t src_w, uint32_t src_h) 246 uint32_t src_w, uint32_t src_h)
351{ 247{
352 omap_plane_mode_set(plane, crtc, fb, crtc_x, crtc_y, crtc_w, crtc_h, 248 struct omap_plane *omap_plane = to_omap_plane(plane);
353 src_x, src_y, src_w, src_h); 249 omap_plane->enabled = true;
354 return omap_plane_dpms(plane, DRM_MODE_DPMS_ON); 250 return omap_plane_mode_set(plane, crtc, fb,
251 crtc_x, crtc_y, crtc_w, crtc_h,
252 src_x, src_y, src_w, src_h,
253 NULL, NULL);
355} 254}
356 255
357static int omap_plane_disable(struct drm_plane *plane) 256static int omap_plane_disable(struct drm_plane *plane)
@@ -364,48 +263,32 @@ static int omap_plane_disable(struct drm_plane *plane)
364static void omap_plane_destroy(struct drm_plane *plane) 263static void omap_plane_destroy(struct drm_plane *plane)
365{ 264{
366 struct omap_plane *omap_plane = to_omap_plane(plane); 265 struct omap_plane *omap_plane = to_omap_plane(plane);
367 DBG("%s", omap_plane->ovl->name); 266
267 DBG("%s", omap_plane->name);
268
269 omap_irq_unregister(plane->dev, &omap_plane->error_irq);
270
368 omap_plane_disable(plane); 271 omap_plane_disable(plane);
369 drm_plane_cleanup(plane); 272 drm_plane_cleanup(plane);
370 WARN_ON(omap_plane->pending_num_unpins + omap_plane->num_unpins > 0); 273
274 WARN_ON(!kfifo_is_empty(&omap_plane->unpin_fifo));
371 kfifo_free(&omap_plane->unpin_fifo); 275 kfifo_free(&omap_plane->unpin_fifo);
276
372 kfree(omap_plane); 277 kfree(omap_plane);
373} 278}
374 279
375int omap_plane_dpms(struct drm_plane *plane, int mode) 280int omap_plane_dpms(struct drm_plane *plane, int mode)
376{ 281{
377 struct omap_plane *omap_plane = to_omap_plane(plane); 282 struct omap_plane *omap_plane = to_omap_plane(plane);
378 struct omap_overlay *ovl = omap_plane->ovl; 283 bool enabled = (mode == DRM_MODE_DPMS_ON);
379 int r; 284 int ret = 0;
380 285
381 DBG("%s: %d", omap_plane->ovl->name, mode); 286 if (enabled != omap_plane->enabled) {
382 287 omap_plane->enabled = enabled;
383 if (mode == DRM_MODE_DPMS_ON) { 288 ret = apply(plane);
384 update_scanout(plane);
385 r = commit(plane);
386 if (!r)
387 r = ovl->enable(ovl);
388 } else {
389 struct omap_drm_private *priv = plane->dev->dev_private;
390 r = ovl->disable(ovl);
391 update_pin(plane, NULL);
392 queue_work(priv->wq, &omap_plane->work);
393 } 289 }
394 290
395 return r; 291 return ret;
396}
397
398void omap_plane_on_endwin(struct drm_plane *plane,
399 void (*fxn)(void *), void *arg)
400{
401 struct omap_plane *omap_plane = to_omap_plane(plane);
402
403 mutex_lock(&omap_plane->unpin_mutex);
404 omap_plane->endwin.fxn = fxn;
405 omap_plane->endwin.arg = arg;
406 mutex_unlock(&omap_plane->unpin_mutex);
407
408 install_irq(plane);
409} 292}
410 293
411/* helper to install properties which are common to planes and crtcs */ 294/* helper to install properties which are common to planes and crtcs */
@@ -454,25 +337,13 @@ int omap_plane_set_property(struct drm_plane *plane,
454 int ret = -EINVAL; 337 int ret = -EINVAL;
455 338
456 if (property == priv->rotation_prop) { 339 if (property == priv->rotation_prop) {
457 struct omap_overlay *ovl = omap_plane->ovl; 340 DBG("%s: rotation: %02x", omap_plane->name, (uint32_t)val);
458
459 DBG("%s: rotation: %02x", ovl->name, (uint32_t)val);
460 omap_plane->win.rotation = val; 341 omap_plane->win.rotation = val;
461 342 ret = apply(plane);
462 if (ovl->is_enabled(ovl))
463 ret = omap_plane_dpms(plane, DRM_MODE_DPMS_ON);
464 else
465 ret = 0;
466 } else if (property == priv->zorder_prop) { 343 } else if (property == priv->zorder_prop) {
467 struct omap_overlay *ovl = omap_plane->ovl; 344 DBG("%s: zorder: %02x", omap_plane->name, (uint32_t)val);
468
469 DBG("%s: zorder: %d", ovl->name, (uint32_t)val);
470 omap_plane->info.zorder = val; 345 omap_plane->info.zorder = val;
471 346 ret = apply(plane);
472 if (ovl->is_enabled(ovl))
473 ret = omap_plane_dpms(plane, DRM_MODE_DPMS_ON);
474 else
475 ret = 0;
476 } 347 }
477 348
478 return ret; 349 return ret;
@@ -485,20 +356,38 @@ static const struct drm_plane_funcs omap_plane_funcs = {
485 .set_property = omap_plane_set_property, 356 .set_property = omap_plane_set_property,
486}; 357};
487 358
359static void omap_plane_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
360{
361 struct omap_plane *omap_plane =
362 container_of(irq, struct omap_plane, error_irq);
363 DRM_ERROR("%s: errors: %08x\n", omap_plane->name, irqstatus);
364}
365
366static const char *plane_names[] = {
367 [OMAP_DSS_GFX] = "gfx",
368 [OMAP_DSS_VIDEO1] = "vid1",
369 [OMAP_DSS_VIDEO2] = "vid2",
370 [OMAP_DSS_VIDEO3] = "vid3",
371};
372
373static const uint32_t error_irqs[] = {
374 [OMAP_DSS_GFX] = DISPC_IRQ_GFX_FIFO_UNDERFLOW,
375 [OMAP_DSS_VIDEO1] = DISPC_IRQ_VID1_FIFO_UNDERFLOW,
376 [OMAP_DSS_VIDEO2] = DISPC_IRQ_VID2_FIFO_UNDERFLOW,
377 [OMAP_DSS_VIDEO3] = DISPC_IRQ_VID3_FIFO_UNDERFLOW,
378};
379
488/* initialize plane */ 380/* initialize plane */
489struct drm_plane *omap_plane_init(struct drm_device *dev, 381struct drm_plane *omap_plane_init(struct drm_device *dev,
490 struct omap_overlay *ovl, unsigned int possible_crtcs, 382 int id, bool private_plane)
491 bool priv)
492{ 383{
384 struct omap_drm_private *priv = dev->dev_private;
493 struct drm_plane *plane = NULL; 385 struct drm_plane *plane = NULL;
494 struct omap_plane *omap_plane; 386 struct omap_plane *omap_plane;
387 struct omap_overlay_info *info;
495 int ret; 388 int ret;
496 389
497 DBG("%s: possible_crtcs=%08x, priv=%d", ovl->name, 390 DBG("%s: priv=%d", plane_names[id], private_plane);
498 possible_crtcs, priv);
499
500 /* friendly reminder to update table for future hw: */
501 WARN_ON(ovl->id >= ARRAY_SIZE(id2irq));
502 391
503 omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL); 392 omap_plane = kzalloc(sizeof(*omap_plane), GFP_KERNEL);
504 if (!omap_plane) { 393 if (!omap_plane) {
@@ -506,47 +395,50 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
506 goto fail; 395 goto fail;
507 } 396 }
508 397
509 mutex_init(&omap_plane->unpin_mutex);
510
511 ret = kfifo_alloc(&omap_plane->unpin_fifo, 16, GFP_KERNEL); 398 ret = kfifo_alloc(&omap_plane->unpin_fifo, 16, GFP_KERNEL);
512 if (ret) { 399 if (ret) {
513 dev_err(dev->dev, "could not allocate unpin FIFO\n"); 400 dev_err(dev->dev, "could not allocate unpin FIFO\n");
514 goto fail; 401 goto fail;
515 } 402 }
516 403
517 INIT_WORK(&omap_plane->work, unpin_worker);
518
519 omap_plane->nformats = omap_framebuffer_get_formats( 404 omap_plane->nformats = omap_framebuffer_get_formats(
520 omap_plane->formats, ARRAY_SIZE(omap_plane->formats), 405 omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
521 ovl->supported_modes); 406 dss_feat_get_supported_color_modes(id));
522 omap_plane->ovl = ovl; 407 omap_plane->id = id;
408 omap_plane->name = plane_names[id];
409
523 plane = &omap_plane->base; 410 plane = &omap_plane->base;
524 411
525 drm_plane_init(dev, plane, possible_crtcs, &omap_plane_funcs, 412 omap_plane->apply.pre_apply = omap_plane_pre_apply;
526 omap_plane->formats, omap_plane->nformats, priv); 413 omap_plane->apply.post_apply = omap_plane_post_apply;
414
415 omap_plane->error_irq.irqmask = error_irqs[id];
416 omap_plane->error_irq.irq = omap_plane_error_irq;
417 omap_irq_register(dev, &omap_plane->error_irq);
418
419 drm_plane_init(dev, plane, (1 << priv->num_crtcs) - 1, &omap_plane_funcs,
420 omap_plane->formats, omap_plane->nformats, private_plane);
527 421
528 omap_plane_install_properties(plane, &plane->base); 422 omap_plane_install_properties(plane, &plane->base);
529 423
530 /* get our starting configuration, set defaults for parameters 424 /* get our starting configuration, set defaults for parameters
531 * we don't currently use, etc: 425 * we don't currently use, etc:
532 */ 426 */
533 ovl->get_overlay_info(ovl, &omap_plane->info); 427 info = &omap_plane->info;
534 omap_plane->info.rotation_type = OMAP_DSS_ROT_DMA; 428 info->rotation_type = OMAP_DSS_ROT_DMA;
535 omap_plane->info.rotation = OMAP_DSS_ROT_0; 429 info->rotation = OMAP_DSS_ROT_0;
536 omap_plane->info.global_alpha = 0xff; 430 info->global_alpha = 0xff;
537 omap_plane->info.mirror = 0; 431 info->mirror = 0;
538 432
539 /* Set defaults depending on whether we are a CRTC or overlay 433 /* Set defaults depending on whether we are a CRTC or overlay
540 * layer. 434 * layer.
541 * TODO add ioctl to give userspace an API to change this.. this 435 * TODO add ioctl to give userspace an API to change this.. this
542 * will come in a subsequent patch. 436 * will come in a subsequent patch.
543 */ 437 */
544 if (priv) 438 if (private_plane)
545 omap_plane->info.zorder = 0; 439 omap_plane->info.zorder = 0;
546 else 440 else
547 omap_plane->info.zorder = ovl->id; 441 omap_plane->info.zorder = id;
548
549 update_manager(plane);
550 442
551 return plane; 443 return plane;
552 444
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 09:14:55 -0400