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path: root/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
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Diffstat (limited to 'drivers/staging/cx25821/cx25821-video-upstream-ch2.c')
-rw-r--r--drivers/staging/cx25821/cx25821-video-upstream-ch2.c658
1 files changed, 329 insertions, 329 deletions
diff --git a/drivers/staging/cx25821/cx25821-video-upstream-ch2.c b/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
index ca91b832b01..720729efc31 100644
--- a/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
+++ b/drivers/staging/cx25821/cx25821-video-upstream-ch2.c
@@ -44,97 +44,97 @@ static int _intr_msk = FLD_VID_SRC_RISC1 | FLD_VID_SRC_UF | FLD_VID_SRC_SYNC | F
44 44
45 45
46static __le32 *cx25821_update_riscprogram_ch2( struct cx25821_dev *dev, 46static __le32 *cx25821_update_riscprogram_ch2( struct cx25821_dev *dev,
47 __le32 *rp, unsigned int offset, unsigned int bpl, 47 __le32 *rp, unsigned int offset, unsigned int bpl,
48 u32 sync_line, unsigned int lines, int fifo_enable, int field_type) 48 u32 sync_line, unsigned int lines, int fifo_enable, int field_type)
49{ 49{
50 unsigned int line, i; 50 unsigned int line, i;
51 int dist_betwn_starts = bpl * 2; 51 int dist_betwn_starts = bpl * 2;
52 52
53 53
54 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); 54 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
55 55
56 56
57 if( USE_RISC_NOOP_VIDEO ) 57 if( USE_RISC_NOOP_VIDEO )
58 { 58 {
59 for( i = 0; i < NUM_NO_OPS; i++ ) 59 for( i = 0; i < NUM_NO_OPS; i++ )
60 { 60 {
61 *(rp++) = cpu_to_le32(RISC_NOOP); 61 *(rp++) = cpu_to_le32(RISC_NOOP);
62 } 62 }
63 } 63 }
64 64
65 /* scan lines */ 65 /* scan lines */
66 for (line = 0; line < lines; line++) 66 for (line = 0; line < lines; line++)
67 { 67 {
68 *(rp++) = cpu_to_le32(RISC_READ|RISC_SOL|RISC_EOL|bpl); 68 *(rp++) = cpu_to_le32(RISC_READ|RISC_SOL|RISC_EOL|bpl);
69 *(rp++) = cpu_to_le32(dev->_data_buf_phys_addr_ch2+offset); 69 *(rp++) = cpu_to_le32(dev->_data_buf_phys_addr_ch2+offset);
70 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 70 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
71 71
72 if ( (lines <= NTSC_FIELD_HEIGHT) || (line < (NTSC_FIELD_HEIGHT-1)) || !(dev->_isNTSC_ch2) ) 72 if ( (lines <= NTSC_FIELD_HEIGHT) || (line < (NTSC_FIELD_HEIGHT-1)) || !(dev->_isNTSC_ch2) )
73 { 73 {
74 offset += dist_betwn_starts; 74 offset += dist_betwn_starts;
75 } 75 }
76 } 76 }
77 77
78 return rp; 78 return rp;
79} 79}
80 80
81static __le32 *cx25821_risc_field_upstream_ch2( struct cx25821_dev *dev, 81static __le32 *cx25821_risc_field_upstream_ch2( struct cx25821_dev *dev,
82 __le32 *rp, 82 __le32 *rp,
83 dma_addr_t databuf_phys_addr, 83 dma_addr_t databuf_phys_addr,
84 unsigned int offset, u32 sync_line, unsigned int bpl, 84 unsigned int offset, u32 sync_line, unsigned int bpl,
85 unsigned int lines, int fifo_enable, int field_type) 85 unsigned int lines, int fifo_enable, int field_type)
86{ 86{
87 unsigned int line, i; 87 unsigned int line, i;
88 struct sram_channel *sram_ch = &dev->sram_channels[dev->_channel2_upstream_select]; 88 struct sram_channel *sram_ch = &dev->sram_channels[dev->_channel2_upstream_select];
89 int dist_betwn_starts = bpl * 2; 89 int dist_betwn_starts = bpl * 2;
90 90
91 91
92 /* sync instruction */ 92 /* sync instruction */
93 if (sync_line != NO_SYNC_LINE) 93 if (sync_line != NO_SYNC_LINE)
94 { 94 {
95 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line); 95 *(rp++) = cpu_to_le32(RISC_RESYNC | sync_line);
96 } 96 }
97 97
98 98
99 if( USE_RISC_NOOP_VIDEO ) 99 if( USE_RISC_NOOP_VIDEO )
100 { 100 {
101 for( i = 0; i < NUM_NO_OPS; i++ ) 101 for( i = 0; i < NUM_NO_OPS; i++ )
102 { 102 {
103 *(rp++) = cpu_to_le32(RISC_NOOP); 103 *(rp++) = cpu_to_le32(RISC_NOOP);
104 } 104 }
105 } 105 }
106 106
107 /* scan lines */ 107 /* scan lines */
108 for (line = 0; line < lines; line++) 108 for (line = 0; line < lines; line++)
109 { 109 {
110 *(rp++) = cpu_to_le32(RISC_READ|RISC_SOL|RISC_EOL|bpl); 110 *(rp++) = cpu_to_le32(RISC_READ|RISC_SOL|RISC_EOL|bpl);
111 *(rp++) = cpu_to_le32(databuf_phys_addr+offset); 111 *(rp++) = cpu_to_le32(databuf_phys_addr+offset);
112 *(rp++) = cpu_to_le32(0); /* bits 63-32 */ 112 *(rp++) = cpu_to_le32(0); /* bits 63-32 */
113 113
114 114
115 if ( (lines <= NTSC_FIELD_HEIGHT) || (line < (NTSC_FIELD_HEIGHT-1)) || !(dev->_isNTSC_ch2) ) 115 if ( (lines <= NTSC_FIELD_HEIGHT) || (line < (NTSC_FIELD_HEIGHT-1)) || !(dev->_isNTSC_ch2) )
116 { 116 {
117 offset += dist_betwn_starts; 117 offset += dist_betwn_starts;
118 } 118 }
119 119
120 120
121 // check if we need to enable the FIFO after the first 4 lines 121 // check if we need to enable the FIFO after the first 4 lines
122 // For the upstream video channel, the risc engine will enable the FIFO. 122 // For the upstream video channel, the risc engine will enable the FIFO.
123 if ( fifo_enable && line == 3 ) 123 if ( fifo_enable && line == 3 )
124 { 124 {
125 *(rp++) = RISC_WRITECR; 125 *(rp++) = RISC_WRITECR;
126 *(rp++) = sram_ch->dma_ctl; 126 *(rp++) = sram_ch->dma_ctl;
127 *(rp++) = FLD_VID_FIFO_EN; 127 *(rp++) = FLD_VID_FIFO_EN;
128 *(rp++) = 0x00000001; 128 *(rp++) = 0x00000001;
129 } 129 }
130 } 130 }
131 131
132 return rp; 132 return rp;
133} 133}
134 134
135int cx25821_risc_buffer_upstream_ch2( struct cx25821_dev *dev, struct pci_dev *pci, 135int cx25821_risc_buffer_upstream_ch2( struct cx25821_dev *dev, struct pci_dev *pci,
136 unsigned int top_offset, 136 unsigned int top_offset,
137 unsigned int bpl, unsigned int lines) 137 unsigned int bpl, unsigned int lines)
138{ 138{
139 __le32 *rp; 139 __le32 *rp;
140 int fifo_enable = 0; 140 int fifo_enable = 0;
@@ -148,57 +148,57 @@ int cx25821_risc_buffer_upstream_ch2( struct cx25821_dev *dev, struct pci_dev *p
148 unsigned int bottom_offset = bpl; 148 unsigned int bottom_offset = bpl;
149 dma_addr_t risc_phys_jump_addr; 149 dma_addr_t risc_phys_jump_addr;
150 150
151 151
152 if( dev->_isNTSC_ch2 ) 152 if( dev->_isNTSC_ch2 )
153 { 153 {
154 odd_num_lines = singlefield_lines + 1; 154 odd_num_lines = singlefield_lines + 1;
155 risc_program_size = FRAME1_VID_PROG_SIZE; 155 risc_program_size = FRAME1_VID_PROG_SIZE;
156 frame_size = (bpl == Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422; 156 frame_size = (bpl == Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422;
157 } 157 }
158 else 158 else
159 { 159 {
160 risc_program_size = PAL_VID_PROG_SIZE; 160 risc_program_size = PAL_VID_PROG_SIZE;
161 frame_size = (bpl == Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422; 161 frame_size = (bpl == Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
162 } 162 }
163 163
164 164
165 /* Virtual address of Risc buffer program */ 165 /* Virtual address of Risc buffer program */
166 rp = dev->_dma_virt_addr_ch2; 166 rp = dev->_dma_virt_addr_ch2;
167 167
168 for( frame = 0; frame < NUM_FRAMES; frame++ ) 168 for( frame = 0; frame < NUM_FRAMES; frame++ )
169 { 169 {
170 databuf_offset = frame_size * frame; 170 databuf_offset = frame_size * frame;
171 171
172 172
173 if (UNSET != top_offset) 173 if (UNSET != top_offset)
174 { 174 {
175 fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE; 175 fifo_enable = (frame == 0) ? FIFO_ENABLE : FIFO_DISABLE;
176 rp = cx25821_risc_field_upstream_ch2(dev, rp, dev->_data_buf_phys_addr_ch2 + databuf_offset, top_offset, 0, bpl, odd_num_lines, fifo_enable, ODD_FIELD); 176 rp = cx25821_risc_field_upstream_ch2(dev, rp, dev->_data_buf_phys_addr_ch2 + databuf_offset, top_offset, 0, bpl, odd_num_lines, fifo_enable, ODD_FIELD);
177 } 177 }
178 178
179 fifo_enable = FIFO_DISABLE; 179 fifo_enable = FIFO_DISABLE;
180 180
181 181
182 //Even field 182 //Even field
183 rp = cx25821_risc_field_upstream_ch2(dev, rp, dev->_data_buf_phys_addr_ch2 + databuf_offset, bottom_offset, 0x200, bpl, singlefield_lines, fifo_enable, EVEN_FIELD); 183 rp = cx25821_risc_field_upstream_ch2(dev, rp, dev->_data_buf_phys_addr_ch2 + databuf_offset, bottom_offset, 0x200, bpl, singlefield_lines, fifo_enable, EVEN_FIELD);
184 184
185 185
186 if( frame == 0 ) 186 if( frame == 0 )
187 { 187 {
188 risc_flag = RISC_CNT_RESET; 188 risc_flag = RISC_CNT_RESET;
189 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2 + risc_program_size; 189 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2 + risc_program_size;
190 } 190 }
191 else 191 else
192 { 192 {
193 risc_flag = RISC_CNT_INC; 193 risc_flag = RISC_CNT_INC;
194 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2; 194 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2;
195 } 195 }
196 196
197 197
198 // Loop to 2ndFrameRISC or to Start of Risc program & generate IRQ 198 // Loop to 2ndFrameRISC or to Start of Risc program & generate IRQ
199 *(rp++) = cpu_to_le32(RISC_JUMP|RISC_IRQ1|risc_flag); 199 *(rp++) = cpu_to_le32(RISC_JUMP|RISC_IRQ1|risc_flag);
200 *(rp++) = cpu_to_le32(risc_phys_jump_addr); 200 *(rp++) = cpu_to_le32(risc_phys_jump_addr);
201 *(rp++) = cpu_to_le32(0); 201 *(rp++) = cpu_to_le32(0);
202 } 202 }
203 203
204 return 0; 204 return 0;
@@ -212,8 +212,8 @@ void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev)
212 212
213 if( !dev->_is_running_ch2 ) 213 if( !dev->_is_running_ch2 )
214 { 214 {
215 printk("cx25821: No video file is currently running so return!\n"); 215 printk("cx25821: No video file is currently running so return!\n");
216 return; 216 return;
217 } 217 }
218 218
219 //Disable RISC interrupts 219 //Disable RISC interrupts
@@ -226,8 +226,8 @@ void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev)
226 226
227 //Clear data buffer memory 227 //Clear data buffer memory
228 if( dev->_data_buf_virt_addr_ch2 ) 228 if( dev->_data_buf_virt_addr_ch2 )
229 memset( dev->_data_buf_virt_addr_ch2, 0, dev->_data_buf_size_ch2 ); 229 memset( dev->_data_buf_virt_addr_ch2, 0, dev->_data_buf_size_ch2 );
230 230
231 dev->_is_running_ch2 = 0; 231 dev->_is_running_ch2 = 0;
232 dev->_is_first_frame_ch2 = 0; 232 dev->_is_first_frame_ch2 = 0;
233 dev->_frame_count_ch2 = 0; 233 dev->_frame_count_ch2 = 0;
@@ -235,12 +235,12 @@ void cx25821_stop_upstream_video_ch2(struct cx25821_dev *dev)
235 235
236 if( dev->_irq_queues_ch2 ) 236 if( dev->_irq_queues_ch2 )
237 { 237 {
238 kfree(dev->_irq_queues_ch2); 238 kfree(dev->_irq_queues_ch2);
239 dev->_irq_queues_ch2 = NULL; 239 dev->_irq_queues_ch2 = NULL;
240 } 240 }
241 241
242 if( dev->_filename_ch2 != NULL ) 242 if( dev->_filename_ch2 != NULL )
243 kfree(dev->_filename_ch2); 243 kfree(dev->_filename_ch2);
244 244
245 tmp = cx_read( VID_CH_MODE_SEL ); 245 tmp = cx_read( VID_CH_MODE_SEL );
246 cx_write( VID_CH_MODE_SEL, tmp & 0xFFFFFE00); 246 cx_write( VID_CH_MODE_SEL, tmp & 0xFFFFFE00);
@@ -250,19 +250,19 @@ void cx25821_free_mem_upstream_ch2(struct cx25821_dev *dev)
250{ 250{
251 if( dev->_is_running_ch2 ) 251 if( dev->_is_running_ch2 )
252 { 252 {
253 cx25821_stop_upstream_video_ch2(dev); 253 cx25821_stop_upstream_video_ch2(dev);
254 } 254 }
255 255
256 if (dev->_dma_virt_addr_ch2) 256 if (dev->_dma_virt_addr_ch2)
257 { 257 {
258 pci_free_consistent(dev->pci, dev->_risc_size_ch2, dev->_dma_virt_addr_ch2, dev->_dma_phys_addr_ch2); 258 pci_free_consistent(dev->pci, dev->_risc_size_ch2, dev->_dma_virt_addr_ch2, dev->_dma_phys_addr_ch2);
259 dev->_dma_virt_addr_ch2 = NULL; 259 dev->_dma_virt_addr_ch2 = NULL;
260 } 260 }
261 261
262 if (dev->_data_buf_virt_addr_ch2) 262 if (dev->_data_buf_virt_addr_ch2)
263 { 263 {
264 pci_free_consistent(dev->pci, dev->_data_buf_size_ch2, dev->_data_buf_virt_addr_ch2, dev->_data_buf_phys_addr_ch2); 264 pci_free_consistent(dev->pci, dev->_data_buf_size_ch2, dev->_data_buf_virt_addr_ch2, dev->_data_buf_phys_addr_ch2);
265 dev->_data_buf_virt_addr_ch2 = NULL; 265 dev->_data_buf_virt_addr_ch2 = NULL;
266 } 266 }
267} 267}
268 268
@@ -280,84 +280,84 @@ int cx25821_get_frame_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch
280 loff_t file_offset; 280 loff_t file_offset;
281 loff_t pos; 281 loff_t pos;
282 mm_segment_t old_fs; 282 mm_segment_t old_fs;
283 283
284 284
285 if( dev->_file_status_ch2 == END_OF_FILE ) 285 if( dev->_file_status_ch2 == END_OF_FILE )
286 return 0; 286 return 0;
287 287
288 if( dev->_isNTSC_ch2 ) 288 if( dev->_isNTSC_ch2 )
289 { 289 {
290 frame_size = (line_size == Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422; 290 frame_size = (line_size == Y411_LINE_SZ) ? FRAME_SIZE_NTSC_Y411 : FRAME_SIZE_NTSC_Y422;
291 } 291 }
292 else 292 else
293 { 293 {
294 frame_size = (line_size == Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422; 294 frame_size = (line_size == Y411_LINE_SZ) ? FRAME_SIZE_PAL_Y411 : FRAME_SIZE_PAL_Y422;
295 } 295 }
296 296
297 frame_offset = (frame_index_temp > 0) ? frame_size : 0; 297 frame_offset = (frame_index_temp > 0) ? frame_size : 0;
298 file_offset = dev->_frame_count_ch2 * frame_size; 298 file_offset = dev->_frame_count_ch2 * frame_size;
299 299
300 300
301 myfile = filp_open( dev->_filename_ch2, O_RDONLY | O_LARGEFILE, 0 ); 301 myfile = filp_open( dev->_filename_ch2, O_RDONLY | O_LARGEFILE, 0 );
302 302
303 303
304 if (IS_ERR(myfile)) 304 if (IS_ERR(myfile))
305 { 305 {
306 const int open_errno = -PTR_ERR(myfile); 306 const int open_errno = -PTR_ERR(myfile);
307 printk("%s(): ERROR opening file(%s) with errno = %d! \n", __func__, dev->_filename_ch2, open_errno); 307 printk("%s(): ERROR opening file(%s) with errno = %d! \n", __func__, dev->_filename_ch2, open_errno);
308 return PTR_ERR(myfile); 308 return PTR_ERR(myfile);
309 } 309 }
310 else 310 else
311 { 311 {
312 if( !(myfile->f_op) ) 312 if( !(myfile->f_op) )
313 { 313 {
314 printk("%s: File has no file operations registered!", __func__); 314 printk("%s: File has no file operations registered!", __func__);
315 filp_close(myfile, NULL); 315 filp_close(myfile, NULL);
316 return -EIO; 316 return -EIO;
317 } 317 }
318 318
319 319
320 if( !myfile->f_op->read ) 320 if( !myfile->f_op->read )
321 { 321 {
322 printk("%s: File has no READ operations registered!", __func__); 322 printk("%s: File has no READ operations registered!", __func__);
323 filp_close(myfile, NULL); 323 filp_close(myfile, NULL);
324 return -EIO; 324 return -EIO;
325 } 325 }
326 326
327 pos = myfile->f_pos; 327 pos = myfile->f_pos;
328 old_fs = get_fs(); 328 old_fs = get_fs();
329 set_fs(KERNEL_DS); 329 set_fs(KERNEL_DS);
330 330
331 331
332 for( i = 0; i < dev->_lines_count_ch2; i++ ) 332 for( i = 0; i < dev->_lines_count_ch2; i++ )
333 { 333 {
334 pos = file_offset; 334 pos = file_offset;
335 335
336 vfs_read_retval = vfs_read(myfile, mybuf, line_size, &pos); 336 vfs_read_retval = vfs_read(myfile, mybuf, line_size, &pos);
337 337
338 if( vfs_read_retval > 0 && vfs_read_retval == line_size && dev->_data_buf_virt_addr_ch2 != NULL ) 338 if( vfs_read_retval > 0 && vfs_read_retval == line_size && dev->_data_buf_virt_addr_ch2 != NULL )
339 { 339 {
340 memcpy( (void*)(dev->_data_buf_virt_addr_ch2+frame_offset/4), mybuf, vfs_read_retval); 340 memcpy( (void*)(dev->_data_buf_virt_addr_ch2+frame_offset/4), mybuf, vfs_read_retval);
341 } 341 }
342 342
343 file_offset += vfs_read_retval; 343 file_offset += vfs_read_retval;
344 frame_offset += vfs_read_retval; 344 frame_offset += vfs_read_retval;
345 345
346 if( vfs_read_retval < line_size ) 346 if( vfs_read_retval < line_size )
347 { 347 {
348 printk(KERN_INFO "Done: exit %s() since no more bytes to read from Video file.\n", __func__ ); 348 printk(KERN_INFO "Done: exit %s() since no more bytes to read from Video file.\n", __func__ );
349 break; 349 break;
350 } 350 }
351 } 351 }
352 352
353 if( i > 0 ) 353 if( i > 0 )
354 dev->_frame_count_ch2++; 354 dev->_frame_count_ch2++;
355 355
356 dev->_file_status_ch2 = (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 356 dev->_file_status_ch2 = (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE;
357 357
358 358
359 set_fs(old_fs); 359 set_fs(old_fs);
360 filp_close(myfile, NULL); 360 filp_close(myfile, NULL);
361 } 361 }
362 362
363 return 0; 363 return 0;
@@ -369,8 +369,8 @@ static void cx25821_vidups_handler_ch2(struct work_struct *work)
369 369
370 if( !dev ) 370 if( !dev )
371 { 371 {
372 printk("ERROR %s(): since container_of(work_struct) FAILED! \n", __func__ ); 372 printk("ERROR %s(): since container_of(work_struct) FAILED! \n", __func__ );
373 return; 373 return;
374 } 374 }
375 375
376 cx25821_get_frame_ch2( dev, &dev->sram_channels[dev->_channel2_upstream_select] ); 376 cx25821_get_frame_ch2( dev, &dev->sram_channels[dev->_channel2_upstream_select] );
@@ -387,76 +387,76 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
387 loff_t pos; 387 loff_t pos;
388 loff_t offset = (unsigned long)0; 388 loff_t offset = (unsigned long)0;
389 mm_segment_t old_fs; 389 mm_segment_t old_fs;
390 390
391 391
392 myfile = filp_open( dev->_filename_ch2, O_RDONLY | O_LARGEFILE, 0 ); 392 myfile = filp_open( dev->_filename_ch2, O_RDONLY | O_LARGEFILE, 0 );
393 393
394 394
395 if (IS_ERR(myfile)) 395 if (IS_ERR(myfile))
396 { 396 {
397 const int open_errno = -PTR_ERR(myfile); 397 const int open_errno = -PTR_ERR(myfile);
398 printk("%s(): ERROR opening file(%s) with errno = %d! \n", __func__, dev->_filename_ch2, open_errno); 398 printk("%s(): ERROR opening file(%s) with errno = %d! \n", __func__, dev->_filename_ch2, open_errno);
399 return PTR_ERR(myfile); 399 return PTR_ERR(myfile);
400 } 400 }
401 else 401 else
402 { 402 {
403 if( !(myfile->f_op) ) 403 if( !(myfile->f_op) )
404 { 404 {
405 printk("%s: File has no file operations registered!", __func__); 405 printk("%s: File has no file operations registered!", __func__);
406 filp_close(myfile, NULL); 406 filp_close(myfile, NULL);
407 return -EIO; 407 return -EIO;
408 } 408 }
409 409
410 410
411 if( !myfile->f_op->read ) 411 if( !myfile->f_op->read )
412 { 412 {
413 printk("%s: File has no READ operations registered! Returning.", __func__); 413 printk("%s: File has no READ operations registered! Returning.", __func__);
414 filp_close(myfile, NULL); 414 filp_close(myfile, NULL);
415 return -EIO; 415 return -EIO;
416 } 416 }
417 417
418 pos = myfile->f_pos; 418 pos = myfile->f_pos;
419 old_fs = get_fs(); 419 old_fs = get_fs();
420 set_fs(KERNEL_DS); 420 set_fs(KERNEL_DS);
421 421
422 422
423 for( j = 0; j < NUM_FRAMES; j++ ) 423 for( j = 0; j < NUM_FRAMES; j++ )
424 { 424 {
425 for( i = 0; i < dev->_lines_count_ch2; i++ ) 425 for( i = 0; i < dev->_lines_count_ch2; i++ )
426 { 426 {
427 pos = offset; 427 pos = offset;
428 428
429 vfs_read_retval = vfs_read(myfile, mybuf, line_size, &pos); 429 vfs_read_retval = vfs_read(myfile, mybuf, line_size, &pos);
430 430
431 if( vfs_read_retval > 0 && vfs_read_retval == line_size && dev->_data_buf_virt_addr_ch2 != NULL ) 431 if( vfs_read_retval > 0 && vfs_read_retval == line_size && dev->_data_buf_virt_addr_ch2 != NULL )
432 { 432 {
433 memcpy( (void*)(dev->_data_buf_virt_addr_ch2+offset/4), mybuf, vfs_read_retval); 433 memcpy( (void*)(dev->_data_buf_virt_addr_ch2+offset/4), mybuf, vfs_read_retval);
434 } 434 }
435 435
436 436
437 offset += vfs_read_retval; 437 offset += vfs_read_retval;
438 438
439 if( vfs_read_retval < line_size ) 439 if( vfs_read_retval < line_size )
440 { 440 {
441 printk(KERN_INFO "Done: exit %s() since no more bytes to read from Video file.\n", __func__ ); 441 printk(KERN_INFO "Done: exit %s() since no more bytes to read from Video file.\n", __func__ );
442 break; 442 break;
443 } 443 }
444 } 444 }
445 445
446 if( i > 0 ) 446 if( i > 0 )
447 dev->_frame_count_ch2++; 447 dev->_frame_count_ch2++;
448 448
449 if( vfs_read_retval < line_size ) 449 if( vfs_read_retval < line_size )
450 { 450 {
451 break; 451 break;
452 } 452 }
453 } 453 }
454 454
455 dev->_file_status_ch2 = (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE; 455 dev->_file_status_ch2 = (vfs_read_retval == line_size) ? IN_PROGRESS : END_OF_FILE;
456 456
457 set_fs(old_fs); 457 set_fs(old_fs);
458 myfile->f_pos = 0; 458 myfile->f_pos = 0;
459 filp_close(myfile, NULL); 459 filp_close(myfile, NULL);
460 } 460 }
461 461
462 return 0; 462 return 0;
@@ -464,17 +464,17 @@ int cx25821_openfile_ch2(struct cx25821_dev *dev, struct sram_channel *sram_ch)
464 464
465 465
466static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev, 466static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
467 struct sram_channel *sram_ch, 467 struct sram_channel *sram_ch,
468 int bpl) 468 int bpl)
469{ 469{
470 int ret = 0; 470 int ret = 0;
471 dma_addr_t dma_addr; 471 dma_addr_t dma_addr;
472 dma_addr_t data_dma_addr; 472 dma_addr_t data_dma_addr;
473 473
474 474
475 if( dev->_dma_virt_addr_ch2 != NULL ) 475 if( dev->_dma_virt_addr_ch2 != NULL )
476 { 476 {
477 pci_free_consistent(dev->pci, dev->upstream_riscbuf_size_ch2, dev->_dma_virt_addr_ch2, dev->_dma_phys_addr_ch2); 477 pci_free_consistent(dev->pci, dev->upstream_riscbuf_size_ch2, dev->_dma_virt_addr_ch2, dev->_dma_phys_addr_ch2);
478 } 478 }
479 479
480 dev->_dma_virt_addr_ch2 = pci_alloc_consistent(dev->pci, dev->upstream_riscbuf_size_ch2, &dma_addr); 480 dev->_dma_virt_addr_ch2 = pci_alloc_consistent(dev->pci, dev->upstream_riscbuf_size_ch2, &dma_addr);
@@ -486,8 +486,8 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
486 486
487 if (!dev->_dma_virt_addr_ch2) 487 if (!dev->_dma_virt_addr_ch2)
488 { 488 {
489 printk("cx25821: FAILED to allocate memory for Risc buffer! Returning.\n"); 489 printk("cx25821: FAILED to allocate memory for Risc buffer! Returning.\n");
490 return -ENOMEM; 490 return -ENOMEM;
491 } 491 }
492 492
493 493
@@ -497,7 +497,7 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
497 497
498 if( dev->_data_buf_virt_addr_ch2 != NULL ) 498 if( dev->_data_buf_virt_addr_ch2 != NULL )
499 { 499 {
500 pci_free_consistent(dev->pci, dev->upstream_databuf_size_ch2, dev->_data_buf_virt_addr_ch2, dev->_data_buf_phys_addr_ch2); 500 pci_free_consistent(dev->pci, dev->upstream_databuf_size_ch2, dev->_data_buf_virt_addr_ch2, dev->_data_buf_phys_addr_ch2);
501 } 501 }
502 502
503 //For Video Data buffer allocation 503 //For Video Data buffer allocation
@@ -507,8 +507,8 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
507 507
508 if (!dev->_data_buf_virt_addr_ch2) 508 if (!dev->_data_buf_virt_addr_ch2)
509 { 509 {
510 printk("cx25821: FAILED to allocate memory for data buffer! Returning.\n"); 510 printk("cx25821: FAILED to allocate memory for data buffer! Returning.\n");
511 return -ENOMEM; 511 return -ENOMEM;
512 } 512 }
513 513
514 514
@@ -518,15 +518,15 @@ static int cx25821_upstream_buffer_prepare_ch2(struct cx25821_dev *dev,
518 518
519 ret = cx25821_openfile_ch2(dev, sram_ch); 519 ret = cx25821_openfile_ch2(dev, sram_ch);
520 if( ret < 0 ) 520 if( ret < 0 )
521 return ret; 521 return ret;
522 522
523 523
524 //Creating RISC programs 524 //Creating RISC programs
525 ret = cx25821_risc_buffer_upstream_ch2(dev, dev->pci, 0, bpl, dev->_lines_count_ch2 ); 525 ret = cx25821_risc_buffer_upstream_ch2(dev, dev->pci, 0, bpl, dev->_lines_count_ch2 );
526 if (ret < 0) 526 if (ret < 0)
527 { 527 {
528 printk(KERN_INFO "cx25821: Failed creating Video Upstream Risc programs! \n"); 528 printk(KERN_INFO "cx25821: Failed creating Video Upstream Risc programs! \n");
529 goto error; 529 goto error;
530 } 530 }
531 531
532 return 0; 532 return 0;
@@ -549,59 +549,59 @@ int cx25821_video_upstream_irq_ch2(struct cx25821_dev *dev, int chan_num, u32 st
549 549
550 if (status & FLD_VID_SRC_RISC1) 550 if (status & FLD_VID_SRC_RISC1)
551 { 551 {
552 // We should only process one program per call 552 // We should only process one program per call
553 u32 prog_cnt = cx_read( channel->gpcnt ); 553 u32 prog_cnt = cx_read( channel->gpcnt );
554 554
555 //Since we've identified our IRQ, clear our bits from the interrupt mask and interrupt status registers 555 //Since we've identified our IRQ, clear our bits from the interrupt mask and interrupt status registers
556 int_msk_tmp = cx_read(channel->int_msk); 556 int_msk_tmp = cx_read(channel->int_msk);
557 cx_write(channel->int_msk, int_msk_tmp & ~_intr_msk); 557 cx_write(channel->int_msk, int_msk_tmp & ~_intr_msk);
558 cx_write( channel->int_stat, _intr_msk ); 558 cx_write( channel->int_stat, _intr_msk );
559 559
560 spin_lock(&dev->slock); 560 spin_lock(&dev->slock);
561 561
562 dev->_frame_index_ch2 = prog_cnt; 562 dev->_frame_index_ch2 = prog_cnt;
563 563
564 queue_work(dev->_irq_queues_ch2, &dev->_irq_work_entry_ch2); 564 queue_work(dev->_irq_queues_ch2, &dev->_irq_work_entry_ch2);
565 565
566 566
567 if ( dev->_is_first_frame_ch2 ) 567 if ( dev->_is_first_frame_ch2 )
568 { 568 {
569 dev->_is_first_frame_ch2 = 0; 569 dev->_is_first_frame_ch2 = 0;
570 570
571 if( dev->_isNTSC_ch2 ) 571 if( dev->_isNTSC_ch2 )
572 { 572 {
573 singlefield_lines += 1; 573 singlefield_lines += 1;
574 odd_risc_prog_size = ODD_FLD_NTSC_PROG_SIZE; 574 odd_risc_prog_size = ODD_FLD_NTSC_PROG_SIZE;
575 } 575 }
576 else 576 else
577 { 577 {
578 singlefield_lines = PAL_FIELD_HEIGHT; 578 singlefield_lines = PAL_FIELD_HEIGHT;
579 odd_risc_prog_size = ODD_FLD_PAL_PROG_SIZE; 579 odd_risc_prog_size = ODD_FLD_PAL_PROG_SIZE;
580 } 580 }
581 581
582 582
583 if( dev->_dma_virt_start_addr_ch2 != NULL ) 583 if( dev->_dma_virt_start_addr_ch2 != NULL )
584 { 584 {
585 line_size_in_bytes = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ; 585 line_size_in_bytes = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? Y411_LINE_SZ : Y422_LINE_SZ;
586 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2 + odd_risc_prog_size; 586 risc_phys_jump_addr = dev->_dma_phys_start_addr_ch2 + odd_risc_prog_size;
587 587
588 rp = cx25821_update_riscprogram_ch2(dev, dev->_dma_virt_start_addr_ch2, TOP_OFFSET, line_size_in_bytes, 0x0, singlefield_lines, FIFO_DISABLE, ODD_FIELD); 588 rp = cx25821_update_riscprogram_ch2(dev, dev->_dma_virt_start_addr_ch2, TOP_OFFSET, line_size_in_bytes, 0x0, singlefield_lines, FIFO_DISABLE, ODD_FIELD);
589 589
590 // Jump to Even Risc program of 1st Frame 590 // Jump to Even Risc program of 1st Frame
591 *(rp++) = cpu_to_le32(RISC_JUMP); 591 *(rp++) = cpu_to_le32(RISC_JUMP);
592 *(rp++) = cpu_to_le32(risc_phys_jump_addr); 592 *(rp++) = cpu_to_le32(risc_phys_jump_addr);
593 *(rp++) = cpu_to_le32(0); 593 *(rp++) = cpu_to_le32(0);
594 } 594 }
595 } 595 }
596 596
597 spin_unlock(&dev->slock); 597 spin_unlock(&dev->slock);
598 } 598 }
599 599
600 600
601 if( dev->_file_status_ch2 == END_OF_FILE ) 601 if( dev->_file_status_ch2 == END_OF_FILE )
602 { 602 {
603 printk("cx25821: EOF Channel 2 Framecount = %d\n", dev->_frame_count_ch2 ); 603 printk("cx25821: EOF Channel 2 Framecount = %d\n", dev->_frame_count_ch2 );
604 return -1; 604 return -1;
605 } 605 }
606 606
607 //ElSE, set the interrupt mask register, re-enable irq. 607 //ElSE, set the interrupt mask register, re-enable irq.
@@ -621,10 +621,10 @@ static irqreturn_t cx25821_upstream_irq_ch2(int irq, void *dev_id)
621 621
622 622
623 if( !dev ) 623 if( !dev )
624 return -1; 624 return -1;
625 625
626 channel_num = VID_UPSTREAM_SRAM_CHANNEL_J; 626 channel_num = VID_UPSTREAM_SRAM_CHANNEL_J;
627 627
628 sram_ch = &dev->sram_channels[channel_num]; 628 sram_ch = &dev->sram_channels[channel_num];
629 629
630 msk_stat = cx_read(sram_ch->int_mstat); 630 msk_stat = cx_read(sram_ch->int_mstat);
@@ -633,17 +633,17 @@ static irqreturn_t cx25821_upstream_irq_ch2(int irq, void *dev_id)
633 // Only deal with our interrupt 633 // Only deal with our interrupt
634 if(vid_status) 634 if(vid_status)
635 { 635 {
636 handled = cx25821_video_upstream_irq_ch2(dev, channel_num, vid_status); 636 handled = cx25821_video_upstream_irq_ch2(dev, channel_num, vid_status);
637 } 637 }
638 638
639 639
640 if( handled < 0 ) 640 if( handled < 0 )
641 { 641 {
642 cx25821_stop_upstream_video_ch2(dev); 642 cx25821_stop_upstream_video_ch2(dev);
643 } 643 }
644 else 644 else
645 { 645 {
646 handled += handled; 646 handled += handled;
647 } 647 }
648 648
649 return IRQ_RETVAL(handled); 649 return IRQ_RETVAL(handled);
@@ -658,7 +658,7 @@ static void cx25821_set_pixelengine_ch2(struct cx25821_dev *dev, struct sram_cha
658 u32 value; 658 u32 value;
659 int vip_mode = PIXEL_ENGINE_VIP1; 659 int vip_mode = PIXEL_ENGINE_VIP1;
660 660
661 661
662 value = ( (pix_format & 0x3) << 12 ) | ( vip_mode & 0x7 ); 662 value = ( (pix_format & 0x3) << 12 ) | ( vip_mode & 0x7 );
663 value &= 0xFFFFFFEF; 663 value &= 0xFFFFFFEF;
664 value |= dev->_isNTSC_ch2 ? 0 : 0x10; 664 value |= dev->_isNTSC_ch2 ? 0 : 0x10;
@@ -672,7 +672,7 @@ static void cx25821_set_pixelengine_ch2(struct cx25821_dev *dev, struct sram_cha
672 672
673 if(dev->_isNTSC_ch2) 673 if(dev->_isNTSC_ch2)
674 { 674 {
675 odd_num_lines += 1; 675 odd_num_lines += 1;
676 } 676 }
677 677
678 value = (num_lines << 16) | odd_num_lines; 678 value = (num_lines << 16) | odd_num_lines;
@@ -685,7 +685,7 @@ static void cx25821_set_pixelengine_ch2(struct cx25821_dev *dev, struct sram_cha
685 685
686 686
687int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev, 687int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev,
688 struct sram_channel *sram_ch) 688 struct sram_channel *sram_ch)
689{ 689{
690 u32 tmp = 0; 690 u32 tmp = 0;
691 int err = 0; 691 int err = 0;
@@ -716,8 +716,8 @@ int cx25821_start_video_dma_upstream_ch2(struct cx25821_dev *dev,
716 err = request_irq(dev->pci->irq, cx25821_upstream_irq_ch2, IRQF_SHARED | IRQF_DISABLED, dev->name, dev); 716 err = request_irq(dev->pci->irq, cx25821_upstream_irq_ch2, IRQF_SHARED | IRQF_DISABLED, dev->name, dev);
717 if (err < 0) 717 if (err < 0)
718 { 718 {
719 printk(KERN_ERR "%s: can't get upstream IRQ %d\n", dev->name, dev->pci->irq); 719 printk(KERN_ERR "%s: can't get upstream IRQ %d\n", dev->name, dev->pci->irq);
720 goto fail_irq; 720 goto fail_irq;
721 } 721 }
722 722
723 // Start the DMA engine 723 // Start the DMA engine
@@ -748,8 +748,8 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select, in
748 748
749 if( dev->_is_running_ch2 ) 749 if( dev->_is_running_ch2 )
750 { 750 {
751 printk("Video Channel is still running so return!\n"); 751 printk("Video Channel is still running so return!\n");
752 return 0; 752 return 0;
753 } 753 }
754 754
755 dev->_channel2_upstream_select = channel_select; 755 dev->_channel2_upstream_select = channel_select;
@@ -761,15 +761,15 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select, in
761 761
762 if(!dev->_irq_queues_ch2) 762 if(!dev->_irq_queues_ch2)
763 { 763 {
764 printk("cx25821: create_singlethread_workqueue() for Video FAILED!\n"); 764 printk("cx25821: create_singlethread_workqueue() for Video FAILED!\n");
765 return -ENOMEM; 765 return -ENOMEM;
766 } 766 }
767 767
768 // 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for channel A-C 768 // 656/VIP SRC Upstream Channel I & J and 7 - Host Bus Interface for channel A-C
769 tmp = cx_read( VID_CH_MODE_SEL ); 769 tmp = cx_read( VID_CH_MODE_SEL );
770 cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF); 770 cx_write( VID_CH_MODE_SEL, tmp | 0x1B0001FF);
771 771
772 772
773 dev->_is_running_ch2 = 0; 773 dev->_is_running_ch2 = 0;
774 dev->_frame_count_ch2 = 0; 774 dev->_frame_count_ch2 = 0;
775 dev->_file_status_ch2 = RESET_STATUS; 775 dev->_file_status_ch2 = RESET_STATUS;
@@ -779,43 +779,43 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select, in
779 data_frame_size = dev->_isNTSC_ch2 ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ; 779 data_frame_size = dev->_isNTSC_ch2 ? NTSC_DATA_BUF_SZ : PAL_DATA_BUF_SZ;
780 risc_buffer_size = dev->_isNTSC_ch2 ? NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE; 780 risc_buffer_size = dev->_isNTSC_ch2 ? NTSC_RISC_BUF_SIZE : PAL_RISC_BUF_SIZE;
781 781
782 782
783 if( dev->input_filename_ch2 ) 783 if( dev->input_filename_ch2 )
784 { 784 {
785 str_length = strlen(dev->input_filename_ch2); 785 str_length = strlen(dev->input_filename_ch2);
786 dev->_filename_ch2 = (char *) kmalloc(str_length + 1, GFP_KERNEL); 786 dev->_filename_ch2 = (char *) kmalloc(str_length + 1, GFP_KERNEL);
787 787
788 if( !dev->_filename_ch2 ) 788 if( !dev->_filename_ch2 )
789 goto error; 789 goto error;
790 790
791 memcpy(dev->_filename_ch2, dev->input_filename_ch2, str_length + 1); 791 memcpy(dev->_filename_ch2, dev->input_filename_ch2, str_length + 1);
792 } 792 }
793 else 793 else
794 { 794 {
795 str_length = strlen(dev->_defaultname_ch2); 795 str_length = strlen(dev->_defaultname_ch2);
796 dev->_filename_ch2 = (char *) kmalloc(str_length + 1, GFP_KERNEL); 796 dev->_filename_ch2 = (char *) kmalloc(str_length + 1, GFP_KERNEL);
797 797
798 if( !dev->_filename_ch2 ) 798 if( !dev->_filename_ch2 )
799 goto error; 799 goto error;
800 800
801 memcpy(dev->_filename_ch2, dev->_defaultname_ch2, str_length + 1); 801 memcpy(dev->_filename_ch2, dev->_defaultname_ch2, str_length + 1);
802 } 802 }
803 803
804 804
805 //Default if filename is empty string 805 //Default if filename is empty string
806 if( strcmp(dev->input_filename_ch2,"") == 0) 806 if( strcmp(dev->input_filename_ch2,"") == 0)
807 { 807 {
808 if( dev->_isNTSC_ch2 ) 808 if( dev->_isNTSC_ch2 )
809 { 809 {
810 dev->_filename_ch2 = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? "/root/vid411.yuv" : "/root/vidtest.yuv"; 810 dev->_filename_ch2 = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? "/root/vid411.yuv" : "/root/vidtest.yuv";
811 } 811 }
812 else 812 else
813 { 813 {
814 dev->_filename_ch2 = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? "/root/pal411.yuv" : "/root/pal422.yuv"; 814 dev->_filename_ch2 = (dev->_pixel_format_ch2 == PIXEL_FRMT_411) ? "/root/pal411.yuv" : "/root/pal422.yuv";
815 } 815 }
816 } 816 }
817 817
818 818
819 retval = cx25821_sram_channel_setup_upstream(dev, sram_ch, dev->_line_size_ch2, 0); 819 retval = cx25821_sram_channel_setup_upstream(dev, sram_ch, dev->_line_size_ch2, 0);
820 820
821 821
@@ -830,8 +830,8 @@ int cx25821_vidupstream_init_ch2(struct cx25821_dev *dev, int channel_select, in
830 retval = cx25821_upstream_buffer_prepare_ch2(dev, sram_ch, dev->_line_size_ch2); 830 retval = cx25821_upstream_buffer_prepare_ch2(dev, sram_ch, dev->_line_size_ch2);
831 if (retval < 0) 831 if (retval < 0)
832 { 832 {
833 printk(KERN_ERR "%s: Failed to set up Video upstream buffers!\n", dev->name); 833 printk(KERN_ERR "%s: Failed to set up Video upstream buffers!\n", dev->name);
834 goto error; 834 goto error;
835 } 835 }
836 836
837 837
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 14:51:17 -0400