diff options
Diffstat (limited to 'drivers/staging/crystalhd')
-rw-r--r-- | drivers/staging/crystalhd/bc_dts_defs.h | 68 | ||||
-rw-r--r-- | drivers/staging/crystalhd/bc_dts_glob_lnx.h | 117 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_cmds.c | 160 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_cmds.h | 21 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_fw_if.h | 60 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_hw.c | 183 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_hw.h | 121 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_lnx.c | 34 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_lnx.h | 6 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_misc.c | 80 | ||||
-rw-r--r-- | drivers/staging/crystalhd/crystalhd_misc.h | 54 |
11 files changed, 442 insertions, 462 deletions
diff --git a/drivers/staging/crystalhd/bc_dts_defs.h b/drivers/staging/crystalhd/bc_dts_defs.h index f9dd0e3e240..778e76af052 100644 --- a/drivers/staging/crystalhd/bc_dts_defs.h +++ b/drivers/staging/crystalhd/bc_dts_defs.h | |||
@@ -26,12 +26,10 @@ | |||
26 | #ifndef _BC_DTS_DEFS_H_ | 26 | #ifndef _BC_DTS_DEFS_H_ |
27 | #define _BC_DTS_DEFS_H_ | 27 | #define _BC_DTS_DEFS_H_ |
28 | 28 | ||
29 | #include "bc_dts_types.h" | ||
30 | |||
31 | /* BIT Mask */ | 29 | /* BIT Mask */ |
32 | #define BC_BIT(_x) (1 << (_x)) | 30 | #define BC_BIT(_x) (1 << (_x)) |
33 | 31 | ||
34 | typedef enum _BC_STATUS { | 32 | enum BC_STATUS { |
35 | BC_STS_SUCCESS = 0, | 33 | BC_STS_SUCCESS = 0, |
36 | BC_STS_INV_ARG = 1, | 34 | BC_STS_INV_ARG = 1, |
37 | BC_STS_BUSY = 2, | 35 | BC_STS_BUSY = 2, |
@@ -62,7 +60,7 @@ typedef enum _BC_STATUS { | |||
62 | 60 | ||
63 | /* Must be the last one.*/ | 61 | /* Must be the last one.*/ |
64 | BC_STS_ERROR = -1 | 62 | BC_STS_ERROR = -1 |
65 | } BC_STATUS; | 63 | }; |
66 | 64 | ||
67 | /*------------------------------------------------------* | 65 | /*------------------------------------------------------* |
68 | * Registry Key Definitions * | 66 | * Registry Key Definitions * |
@@ -81,14 +79,14 @@ typedef enum _BC_STATUS { | |||
81 | * | 79 | * |
82 | */ | 80 | */ |
83 | 81 | ||
84 | typedef enum _BC_SW_OPTIONS { | 82 | enum BC_SW_OPTIONS { |
85 | BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3), | 83 | BC_OPT_DOSER_OUT_ENCRYPT = BC_BIT(3), |
86 | BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29), | 84 | BC_OPT_LINK_OUT_ENCRYPT = BC_BIT(29), |
87 | } BC_SW_OPTIONS; | 85 | }; |
88 | 86 | ||
89 | typedef struct _BC_REG_CONFIG{ | 87 | struct BC_REG_CONFIG{ |
90 | uint32_t DbgOptions; | 88 | uint32_t DbgOptions; |
91 | } BC_REG_CONFIG; | 89 | }; |
92 | 90 | ||
93 | #if defined(__KERNEL__) || defined(__LINUX_USER__) | 91 | #if defined(__KERNEL__) || defined(__LINUX_USER__) |
94 | #else | 92 | #else |
@@ -108,7 +106,7 @@ typedef struct _BC_REG_CONFIG{ | |||
108 | */ | 106 | */ |
109 | 107 | ||
110 | /* To allow multiple apps to open the device. */ | 108 | /* To allow multiple apps to open the device. */ |
111 | enum _DtsDeviceOpenMode { | 109 | enum DtsDeviceOpenMode { |
112 | DTS_PLAYBACK_MODE = 0, | 110 | DTS_PLAYBACK_MODE = 0, |
113 | DTS_DIAG_MODE, | 111 | DTS_DIAG_MODE, |
114 | DTS_MONITOR_MODE, | 112 | DTS_MONITOR_MODE, |
@@ -116,7 +114,7 @@ enum _DtsDeviceOpenMode { | |||
116 | }; | 114 | }; |
117 | 115 | ||
118 | /* To enable the filter to selectively enable/disable fixes or erratas */ | 116 | /* To enable the filter to selectively enable/disable fixes or erratas */ |
119 | enum _DtsDeviceFixMode { | 117 | enum DtsDeviceFixMode { |
120 | DTS_LOAD_NEW_FW = BC_BIT(8), | 118 | DTS_LOAD_NEW_FW = BC_BIT(8), |
121 | DTS_LOAD_FILE_PLAY_FW = BC_BIT(9), | 119 | DTS_LOAD_FILE_PLAY_FW = BC_BIT(9), |
122 | DTS_DISK_FMT_BD = BC_BIT(10), | 120 | DTS_DISK_FMT_BD = BC_BIT(10), |
@@ -133,7 +131,7 @@ enum _DtsDeviceFixMode { | |||
133 | #define DTS_DFLT_CLOCK(x) (x<<19) | 131 | #define DTS_DFLT_CLOCK(x) (x<<19) |
134 | 132 | ||
135 | /* F/W File Version corresponding to S/W Releases */ | 133 | /* F/W File Version corresponding to S/W Releases */ |
136 | enum _FW_FILE_VER { | 134 | enum FW_FILE_VER { |
137 | /* S/W release: 02.04.02 F/W release 2.12.2.0 */ | 135 | /* S/W release: 02.04.02 F/W release 2.12.2.0 */ |
138 | BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0)) | 136 | BC_FW_VER_020402 = ((12<<16) | (2<<8) | (0)) |
139 | }; | 137 | }; |
@@ -141,7 +139,7 @@ enum _FW_FILE_VER { | |||
141 | /*------------------------------------------------------* | 139 | /*------------------------------------------------------* |
142 | * Stream Types for DtsOpenDecoder() * | 140 | * Stream Types for DtsOpenDecoder() * |
143 | *------------------------------------------------------*/ | 141 | *------------------------------------------------------*/ |
144 | enum _DtsOpenDecStreamTypes { | 142 | enum DtsOpenDecStreamTypes { |
145 | BC_STREAM_TYPE_ES = 0, | 143 | BC_STREAM_TYPE_ES = 0, |
146 | BC_STREAM_TYPE_PES = 1, | 144 | BC_STREAM_TYPE_PES = 1, |
147 | BC_STREAM_TYPE_TS = 2, | 145 | BC_STREAM_TYPE_TS = 2, |
@@ -151,7 +149,7 @@ enum _DtsOpenDecStreamTypes { | |||
151 | /*------------------------------------------------------* | 149 | /*------------------------------------------------------* |
152 | * Video Algorithms for DtsSetVideoParams() * | 150 | * Video Algorithms for DtsSetVideoParams() * |
153 | *------------------------------------------------------*/ | 151 | *------------------------------------------------------*/ |
154 | enum _DtsSetVideoParamsAlgo { | 152 | enum DtsSetVideoParamsAlgo { |
155 | BC_VID_ALGO_H264 = 0, | 153 | BC_VID_ALGO_H264 = 0, |
156 | BC_VID_ALGO_MPEG2 = 1, | 154 | BC_VID_ALGO_MPEG2 = 1, |
157 | BC_VID_ALGO_VC1 = 4, | 155 | BC_VID_ALGO_VC1 = 4, |
@@ -163,7 +161,7 @@ enum _DtsSetVideoParamsAlgo { | |||
163 | *------------------------------------------------------*/ | 161 | *------------------------------------------------------*/ |
164 | #define BC_MPEG_VALID_PANSCAN (1) | 162 | #define BC_MPEG_VALID_PANSCAN (1) |
165 | 163 | ||
166 | typedef struct _BC_PIB_EXT_MPEG { | 164 | struct BC_PIB_EXT_MPEG { |
167 | uint32_t valid; | 165 | uint32_t valid; |
168 | /* Always valid, defaults to picture size if no | 166 | /* Always valid, defaults to picture size if no |
169 | * sequence display extension in the stream. */ | 167 | * sequence display extension in the stream. */ |
@@ -175,8 +173,7 @@ typedef struct _BC_PIB_EXT_MPEG { | |||
175 | uint32_t offset_count; | 173 | uint32_t offset_count; |
176 | int32_t horizontal_offset[3]; | 174 | int32_t horizontal_offset[3]; |
177 | int32_t vertical_offset[3]; | 175 | int32_t vertical_offset[3]; |
178 | 176 | }; | |
179 | } BC_PIB_EXT_MPEG; | ||
180 | 177 | ||
181 | /*------------------------------------------------------* | 178 | /*------------------------------------------------------* |
182 | * H.264 Extension to the PPB * | 179 | * H.264 Extension to the PPB * |
@@ -186,7 +183,7 @@ typedef struct _BC_PIB_EXT_MPEG { | |||
186 | #define H264_VALID_SPS_CROP (2) | 183 | #define H264_VALID_SPS_CROP (2) |
187 | #define H264_VALID_VUI (4) | 184 | #define H264_VALID_VUI (4) |
188 | 185 | ||
189 | typedef struct _BC_PIB_EXT_H264 { | 186 | struct BC_PIB_EXT_H264 { |
190 | /* 'valid' specifies which fields (or sets of | 187 | /* 'valid' specifies which fields (or sets of |
191 | * fields) below are valid. If the corresponding | 188 | * fields) below are valid. If the corresponding |
192 | * bit in 'valid' is NOT set then that field(s) | 189 | * bit in 'valid' is NOT set then that field(s) |
@@ -209,15 +206,14 @@ typedef struct _BC_PIB_EXT_H264 { | |||
209 | /* H264_VALID_VUI */ | 206 | /* H264_VALID_VUI */ |
210 | uint32_t chroma_top; | 207 | uint32_t chroma_top; |
211 | uint32_t chroma_bottom; | 208 | uint32_t chroma_bottom; |
212 | 209 | }; | |
213 | } BC_PIB_EXT_H264; | ||
214 | 210 | ||
215 | /*------------------------------------------------------* | 211 | /*------------------------------------------------------* |
216 | * VC1 Extension to the PPB * | 212 | * VC1 Extension to the PPB * |
217 | *------------------------------------------------------*/ | 213 | *------------------------------------------------------*/ |
218 | #define VC1_VALID_PANSCAN (1) | 214 | #define VC1_VALID_PANSCAN (1) |
219 | 215 | ||
220 | typedef struct _BC_PIB_EXT_VC1 { | 216 | struct BC_PIB_EXT_VC1 { |
221 | uint32_t valid; | 217 | uint32_t valid; |
222 | 218 | ||
223 | /* Always valid, defaults to picture size if no | 219 | /* Always valid, defaults to picture size if no |
@@ -231,9 +227,7 @@ typedef struct _BC_PIB_EXT_VC1 { | |||
231 | int32_t ps_vert_offset[4]; | 227 | int32_t ps_vert_offset[4]; |
232 | int32_t ps_width[4]; | 228 | int32_t ps_width[4]; |
233 | int32_t ps_height[4]; | 229 | int32_t ps_height[4]; |
234 | 230 | }; | |
235 | } BC_PIB_EXT_VC1; | ||
236 | |||
237 | 231 | ||
238 | /*------------------------------------------------------* | 232 | /*------------------------------------------------------* |
239 | * Picture Information Block * | 233 | * Picture Information Block * |
@@ -366,7 +360,7 @@ enum _BC_OUTPUT_FORMAT { | |||
366 | MODE422_UYVY = 0x2, | 360 | MODE422_UYVY = 0x2, |
367 | }; | 361 | }; |
368 | 362 | ||
369 | typedef struct _BC_PIC_INFO_BLOCK { | 363 | struct BC_PIC_INFO_BLOCK { |
370 | /* Common fields. */ | 364 | /* Common fields. */ |
371 | uint64_t timeStamp; /* Timestamp */ | 365 | uint64_t timeStamp; /* Timestamp */ |
372 | uint32_t picture_number; /* Ordinal display number */ | 366 | uint32_t picture_number; /* Ordinal display number */ |
@@ -386,18 +380,18 @@ typedef struct _BC_PIC_INFO_BLOCK { | |||
386 | 380 | ||
387 | /* Protocol-specific extensions. */ | 381 | /* Protocol-specific extensions. */ |
388 | union { | 382 | union { |
389 | BC_PIB_EXT_H264 h264; | 383 | struct BC_PIB_EXT_H264 h264; |
390 | BC_PIB_EXT_MPEG mpeg; | 384 | struct BC_PIB_EXT_MPEG mpeg; |
391 | BC_PIB_EXT_VC1 vc1; | 385 | struct BC_PIB_EXT_VC1 vc1; |
392 | } other; | 386 | } other; |
393 | 387 | ||
394 | } BC_PIC_INFO_BLOCK, *PBC_PIC_INFO_BLOCK; | 388 | }; |
395 | 389 | ||
396 | /*------------------------------------------------------* | 390 | /*------------------------------------------------------* |
397 | * ProcOut Info * | 391 | * ProcOut Info * |
398 | *------------------------------------------------------*/ | 392 | *------------------------------------------------------*/ |
399 | /* Optional flags for ProcOut Interface.*/ | 393 | /* Optional flags for ProcOut Interface.*/ |
400 | enum _POUT_OPTIONAL_IN_FLAGS_{ | 394 | enum POUT_OPTIONAL_IN_FLAGS_{ |
401 | /* Flags from App to Device */ | 395 | /* Flags from App to Device */ |
402 | BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */ | 396 | BC_POUT_FLAGS_YV12 = 0x01, /* Copy Data in YV12 format */ |
403 | BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */ | 397 | BC_POUT_FLAGS_STRIDE = 0x02, /* Stride size is valid. */ |
@@ -412,17 +406,13 @@ enum _POUT_OPTIONAL_IN_FLAGS_{ | |||
412 | BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */ | 406 | BC_POUT_FLAGS_FLD_BOT = 0x80000, /* Bottom Field data */ |
413 | }; | 407 | }; |
414 | 408 | ||
415 | #if defined(__KERNEL__) || defined(__LINUX_USER__) | 409 | typedef enum BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut); |
416 | typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, void *pOut); | ||
417 | #else | ||
418 | typedef BC_STATUS(*dts_pout_callback)(void *shnd, uint32_t width, uint32_t height, uint32_t stride, struct _BC_DTS_PROC_OUT *pOut); | ||
419 | #endif | ||
420 | 410 | ||
421 | /* Line 21 Closed Caption */ | 411 | /* Line 21 Closed Caption */ |
422 | /* User Data */ | 412 | /* User Data */ |
423 | #define MAX_UD_SIZE 1792 /* 1920 - 128 */ | 413 | #define MAX_UD_SIZE 1792 /* 1920 - 128 */ |
424 | 414 | ||
425 | typedef struct _BC_DTS_PROC_OUT { | 415 | struct BC_DTS_PROC_OUT { |
426 | uint8_t *Ybuff; /* Caller Supplied buffer for Y data */ | 416 | uint8_t *Ybuff; /* Caller Supplied buffer for Y data */ |
427 | uint32_t YbuffSz; /* Caller Supplied Y buffer size */ | 417 | uint32_t YbuffSz; /* Caller Supplied Y buffer size */ |
428 | uint32_t YBuffDoneSz; /* Transferred Y datasize */ | 418 | uint32_t YBuffDoneSz; /* Transferred Y datasize */ |
@@ -436,7 +426,7 @@ typedef struct _BC_DTS_PROC_OUT { | |||
436 | 426 | ||
437 | uint32_t discCnt; /* Picture discontinuity count */ | 427 | uint32_t discCnt; /* Picture discontinuity count */ |
438 | 428 | ||
439 | BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */ | 429 | struct BC_PIC_INFO_BLOCK PicInfo; /* Picture Information Block Data */ |
440 | 430 | ||
441 | /* Line 21 Closed Caption */ | 431 | /* Line 21 Closed Caption */ |
442 | /* User Data */ | 432 | /* User Data */ |
@@ -450,9 +440,9 @@ typedef struct _BC_DTS_PROC_OUT { | |||
450 | uint8_t bPibEnc; /* PIB encrypted */ | 440 | uint8_t bPibEnc; /* PIB encrypted */ |
451 | uint8_t bRevertScramble; | 441 | uint8_t bRevertScramble; |
452 | 442 | ||
453 | } BC_DTS_PROC_OUT; | 443 | }; |
454 | 444 | ||
455 | typedef struct _BC_DTS_STATUS { | 445 | struct BC_DTS_STATUS { |
456 | uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */ | 446 | uint8_t ReadyListCount; /* Number of frames in ready list (reported by driver) */ |
457 | uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */ | 447 | uint8_t FreeListCount; /* Number of frame buffers free. (reported by driver) */ |
458 | uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */ | 448 | uint8_t PowerStateChange; /* Number of active state power transitions (reported by driver) */ |
@@ -479,7 +469,7 @@ typedef struct _BC_DTS_STATUS { | |||
479 | * back from the driver */ | 469 | * back from the driver */ |
480 | uint8_t reserved__[16]; | 470 | uint8_t reserved__[16]; |
481 | 471 | ||
482 | } BC_DTS_STATUS; | 472 | }; |
483 | 473 | ||
484 | #define BC_SWAP32(_v) \ | 474 | #define BC_SWAP32(_v) \ |
485 | ((((_v) & 0xFF000000)>>24)| \ | 475 | ((((_v) & 0xFF000000)>>24)| \ |
diff --git a/drivers/staging/crystalhd/bc_dts_glob_lnx.h b/drivers/staging/crystalhd/bc_dts_glob_lnx.h index 0fd34e20dc8..80b7a73a9d4 100644 --- a/drivers/staging/crystalhd/bc_dts_glob_lnx.h +++ b/drivers/staging/crystalhd/bc_dts_glob_lnx.h | |||
@@ -58,7 +58,7 @@ | |||
58 | * These are SW stack tunable parameters shared | 58 | * These are SW stack tunable parameters shared |
59 | * between the driver and the application. | 59 | * between the driver and the application. |
60 | */ | 60 | */ |
61 | enum _BC_DTS_GLOBALS { | 61 | enum BC_DTS_GLOBALS { |
62 | BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */ | 62 | BC_MAX_FW_CMD_BUFF_SZ = 0x40, /* FW passthrough cmd/rsp buffer size */ |
63 | PCI_CFG_SIZE = 256, /* PCI config size buffer */ | 63 | PCI_CFG_SIZE = 256, /* PCI config size buffer */ |
64 | BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */ | 64 | BC_IOCTL_DATA_POOL_SIZE = 8, /* BC_IOCTL_DATA Pool size */ |
@@ -70,62 +70,62 @@ enum _BC_DTS_GLOBALS { | |||
70 | BC_INFIFO_THRESHOLD = 0x10000, | 70 | BC_INFIFO_THRESHOLD = 0x10000, |
71 | }; | 71 | }; |
72 | 72 | ||
73 | typedef struct _BC_CMD_REG_ACC { | 73 | struct BC_CMD_REG_ACC { |
74 | uint32_t Offset; | 74 | uint32_t Offset; |
75 | uint32_t Value; | 75 | uint32_t Value; |
76 | } BC_CMD_REG_ACC; | 76 | }; |
77 | 77 | ||
78 | typedef struct _BC_CMD_DEV_MEM { | 78 | struct BC_CMD_DEV_MEM { |
79 | uint32_t StartOff; | 79 | uint32_t StartOff; |
80 | uint32_t NumDwords; | 80 | uint32_t NumDwords; |
81 | uint32_t Rsrd; | 81 | uint32_t Rsrd; |
82 | } BC_CMD_DEV_MEM; | 82 | }; |
83 | 83 | ||
84 | /* FW Passthrough command structure */ | 84 | /* FW Passthrough command structure */ |
85 | enum _bc_fw_cmd_flags { | 85 | enum bc_fw_cmd_flags { |
86 | BC_FW_CMD_FLAGS_NONE = 0, | 86 | BC_FW_CMD_FLAGS_NONE = 0, |
87 | BC_FW_CMD_PIB_QS = 0x01, | 87 | BC_FW_CMD_PIB_QS = 0x01, |
88 | }; | 88 | }; |
89 | 89 | ||
90 | typedef struct _BC_FW_CMD { | 90 | struct BC_FW_CMD { |
91 | uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ]; | 91 | uint32_t cmd[BC_MAX_FW_CMD_BUFF_SZ]; |
92 | uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ]; | 92 | uint32_t rsp[BC_MAX_FW_CMD_BUFF_SZ]; |
93 | uint32_t flags; | 93 | uint32_t flags; |
94 | uint32_t add_data; | 94 | uint32_t add_data; |
95 | } BC_FW_CMD, *PBC_FW_CMD; | 95 | }; |
96 | 96 | ||
97 | typedef struct _BC_HW_TYPE { | 97 | struct BC_HW_TYPE { |
98 | uint16_t PciDevId; | 98 | uint16_t PciDevId; |
99 | uint16_t PciVenId; | 99 | uint16_t PciVenId; |
100 | uint8_t HwRev; | 100 | uint8_t HwRev; |
101 | uint8_t Align[3]; | 101 | uint8_t Align[3]; |
102 | } BC_HW_TYPE; | 102 | }; |
103 | 103 | ||
104 | typedef struct _BC_PCI_CFG { | 104 | struct BC_PCI_CFG { |
105 | uint32_t Size; | 105 | uint32_t Size; |
106 | uint32_t Offset; | 106 | uint32_t Offset; |
107 | uint8_t pci_cfg_space[PCI_CFG_SIZE]; | 107 | uint8_t pci_cfg_space[PCI_CFG_SIZE]; |
108 | } BC_PCI_CFG; | 108 | }; |
109 | 109 | ||
110 | typedef struct _BC_VERSION_INFO_ { | 110 | struct BC_VERSION_INFO { |
111 | uint8_t DriverMajor; | 111 | uint8_t DriverMajor; |
112 | uint8_t DriverMinor; | 112 | uint8_t DriverMinor; |
113 | uint16_t DriverRevision; | 113 | uint16_t DriverRevision; |
114 | } BC_VERSION_INFO; | 114 | }; |
115 | 115 | ||
116 | typedef struct _BC_START_RX_CAP_ { | 116 | struct BC_START_RX_CAP { |
117 | uint32_t Rsrd; | 117 | uint32_t Rsrd; |
118 | uint32_t StartDeliveryThsh; | 118 | uint32_t StartDeliveryThsh; |
119 | uint32_t PauseThsh; | 119 | uint32_t PauseThsh; |
120 | uint32_t ResumeThsh; | 120 | uint32_t ResumeThsh; |
121 | } BC_START_RX_CAP; | 121 | }; |
122 | 122 | ||
123 | typedef struct _BC_FLUSH_RX_CAP_ { | 123 | struct BC_FLUSH_RX_CAP { |
124 | uint32_t Rsrd; | 124 | uint32_t Rsrd; |
125 | uint32_t bDiscardOnly; | 125 | uint32_t bDiscardOnly; |
126 | } BC_FLUSH_RX_CAP; | 126 | }; |
127 | 127 | ||
128 | typedef struct _BC_DTS_STATS { | 128 | struct BC_DTS_STATS { |
129 | uint8_t drvRLL; | 129 | uint8_t drvRLL; |
130 | uint8_t drvFLL; | 130 | uint8_t drvFLL; |
131 | uint8_t eosDetected; | 131 | uint8_t eosDetected; |
@@ -154,18 +154,18 @@ typedef struct _BC_DTS_STATS { | |||
154 | uint32_t DrvRepeatedFrms; | 154 | uint32_t DrvRepeatedFrms; |
155 | uint32_t res1[13]; | 155 | uint32_t res1[13]; |
156 | 156 | ||
157 | } BC_DTS_STATS; | 157 | }; |
158 | 158 | ||
159 | typedef struct _BC_PROC_INPUT_ { | 159 | struct BC_PROC_INPUT { |
160 | uint8_t *pDmaBuff; | 160 | uint8_t *pDmaBuff; |
161 | uint32_t BuffSz; | 161 | uint32_t BuffSz; |
162 | uint8_t Mapped; | 162 | uint8_t Mapped; |
163 | uint8_t Encrypted; | 163 | uint8_t Encrypted; |
164 | uint8_t Rsrd[2]; | 164 | uint8_t Rsrd[2]; |
165 | uint32_t DramOffset; /* For debug use only */ | 165 | uint32_t DramOffset; /* For debug use only */ |
166 | } BC_PROC_INPUT, *PBC_PROC_INPUT; | 166 | }; |
167 | 167 | ||
168 | typedef struct _BC_DEC_YUV_BUFFS { | 168 | struct BC_DEC_YUV_BUFFS { |
169 | uint32_t b422Mode; | 169 | uint32_t b422Mode; |
170 | uint8_t *YuvBuff; | 170 | uint8_t *YuvBuff; |
171 | uint32_t YuvBuffSz; | 171 | uint32_t YuvBuffSz; |
@@ -173,9 +173,9 @@ typedef struct _BC_DEC_YUV_BUFFS { | |||
173 | uint32_t YBuffDoneSz; | 173 | uint32_t YBuffDoneSz; |
174 | uint32_t UVBuffDoneSz; | 174 | uint32_t UVBuffDoneSz; |
175 | uint32_t RefCnt; | 175 | uint32_t RefCnt; |
176 | } BC_DEC_YUV_BUFFS; | 176 | }; |
177 | 177 | ||
178 | enum _DECOUT_COMPLETION_FLAGS{ | 178 | enum DECOUT_COMPLETION_FLAGS{ |
179 | COMP_FLAG_NO_INFO = 0x00, | 179 | COMP_FLAG_NO_INFO = 0x00, |
180 | COMP_FLAG_FMT_CHANGE = 0x01, | 180 | COMP_FLAG_FMT_CHANGE = 0x01, |
181 | COMP_FLAG_PIB_VALID = 0x02, | 181 | COMP_FLAG_PIB_VALID = 0x02, |
@@ -184,47 +184,47 @@ enum _DECOUT_COMPLETION_FLAGS{ | |||
184 | COMP_FLAG_DATA_BOT = 0x10, | 184 | COMP_FLAG_DATA_BOT = 0x10, |
185 | }; | 185 | }; |
186 | 186 | ||
187 | typedef struct _BC_DEC_OUT_BUFF{ | 187 | struct BC_DEC_OUT_BUFF{ |
188 | BC_DEC_YUV_BUFFS OutPutBuffs; | 188 | struct BC_DEC_YUV_BUFFS OutPutBuffs; |
189 | BC_PIC_INFO_BLOCK PibInfo; | 189 | struct BC_PIC_INFO_BLOCK PibInfo; |
190 | uint32_t Flags; | 190 | uint32_t Flags; |
191 | uint32_t BadFrCnt; | 191 | uint32_t BadFrCnt; |
192 | } BC_DEC_OUT_BUFF; | 192 | }; |
193 | 193 | ||
194 | typedef struct _BC_NOTIFY_MODE { | 194 | struct BC_NOTIFY_MODE { |
195 | uint32_t Mode; | 195 | uint32_t Mode; |
196 | uint32_t Rsvr[3]; | 196 | uint32_t Rsvr[3]; |
197 | } BC_NOTIFY_MODE; | 197 | }; |
198 | 198 | ||
199 | typedef struct _BC_CLOCK { | 199 | struct BC_CLOCK { |
200 | uint32_t clk; | 200 | uint32_t clk; |
201 | uint32_t Rsvr[3]; | 201 | uint32_t Rsvr[3]; |
202 | } BC_CLOCK; | 202 | }; |
203 | 203 | ||
204 | typedef struct _BC_IOCTL_DATA { | 204 | struct BC_IOCTL_DATA { |
205 | BC_STATUS RetSts; | 205 | enum BC_STATUS RetSts; |
206 | uint32_t IoctlDataSz; | 206 | uint32_t IoctlDataSz; |
207 | uint32_t Timeout; | 207 | uint32_t Timeout; |
208 | union { | 208 | union { |
209 | BC_CMD_REG_ACC regAcc; | 209 | struct BC_CMD_REG_ACC regAcc; |
210 | BC_CMD_DEV_MEM devMem; | 210 | struct BC_CMD_DEV_MEM devMem; |
211 | BC_FW_CMD fwCmd; | 211 | struct BC_FW_CMD fwCmd; |
212 | BC_HW_TYPE hwType; | 212 | struct BC_HW_TYPE hwType; |
213 | BC_PCI_CFG pciCfg; | 213 | struct BC_PCI_CFG pciCfg; |
214 | BC_VERSION_INFO VerInfo; | 214 | struct BC_VERSION_INFO VerInfo; |
215 | BC_PROC_INPUT ProcInput; | 215 | struct BC_PROC_INPUT ProcInput; |
216 | BC_DEC_YUV_BUFFS RxBuffs; | 216 | struct BC_DEC_YUV_BUFFS RxBuffs; |
217 | BC_DEC_OUT_BUFF DecOutData; | 217 | struct BC_DEC_OUT_BUFF DecOutData; |
218 | BC_START_RX_CAP RxCap; | 218 | struct BC_START_RX_CAP RxCap; |
219 | BC_FLUSH_RX_CAP FlushRxCap; | 219 | struct BC_FLUSH_RX_CAP FlushRxCap; |
220 | BC_DTS_STATS drvStat; | 220 | struct BC_DTS_STATS drvStat; |
221 | BC_NOTIFY_MODE NotifyMode; | 221 | struct BC_NOTIFY_MODE NotifyMode; |
222 | BC_CLOCK clockValue; | 222 | struct BC_CLOCK clockValue; |
223 | } u; | 223 | } u; |
224 | struct _BC_IOCTL_DATA *next; | 224 | struct _BC_IOCTL_DATA *next; |
225 | } BC_IOCTL_DATA; | 225 | }; |
226 | 226 | ||
227 | typedef enum _BC_DRV_CMD{ | 227 | enum BC_DRV_CMD { |
228 | DRV_CMD_VERSION = 0, /* Get SW version */ | 228 | DRV_CMD_VERSION = 0, /* Get SW version */ |
229 | DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */ | 229 | DRV_CMD_GET_HWTYPE, /* Get HW version and type Dozer/Tank */ |
230 | DRV_CMD_REG_RD, /* Read Device Register */ | 230 | DRV_CMD_REG_RD, /* Read Device Register */ |
@@ -249,12 +249,12 @@ typedef enum _BC_DRV_CMD{ | |||
249 | 249 | ||
250 | /* MUST be the last one.. */ | 250 | /* MUST be the last one.. */ |
251 | DRV_CMD_END, /* End of the List.. */ | 251 | DRV_CMD_END, /* End of the List.. */ |
252 | } BC_DRV_CMD; | 252 | }; |
253 | 253 | ||
254 | #define BC_IOC_BASE 'b' | 254 | #define BC_IOC_BASE 'b' |
255 | #define BC_IOC_VOID _IOC_NONE | 255 | #define BC_IOC_VOID _IOC_NONE |
256 | #define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type) | 256 | #define BC_IOC_IOWR(nr, type) _IOWR(BC_IOC_BASE, nr, type) |
257 | #define BC_IOCTL_MB BC_IOCTL_DATA | 257 | #define BC_IOCTL_MB struct BC_IOCTL_DATA |
258 | 258 | ||
259 | #define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB) | 259 | #define BCM_IOC_GET_VERSION BC_IOC_IOWR(DRV_CMD_VERSION, BC_IOCTL_MB) |
260 | #define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB) | 260 | #define BCM_IOC_GET_HWTYPE BC_IOC_IOWR(DRV_CMD_GET_HWTYPE, BC_IOCTL_MB) |
@@ -280,17 +280,16 @@ typedef enum _BC_DRV_CMD{ | |||
280 | #define BCM_IOC_END BC_IOC_VOID | 280 | #define BCM_IOC_END BC_IOC_VOID |
281 | 281 | ||
282 | /* Wrapper for main IOCTL data */ | 282 | /* Wrapper for main IOCTL data */ |
283 | typedef struct _crystalhd_ioctl_data { | 283 | struct crystalhd_ioctl_data { |
284 | BC_IOCTL_DATA udata; /* IOCTL from App..*/ | 284 | struct BC_IOCTL_DATA udata; /* IOCTL from App..*/ |
285 | uint32_t u_id; /* Driver specific user ID */ | 285 | uint32_t u_id; /* Driver specific user ID */ |
286 | uint32_t cmd; /* Cmd ID for driver's use. */ | 286 | uint32_t cmd; /* Cmd ID for driver's use. */ |
287 | void *add_cdata; /* Additional command specific data..*/ | 287 | void *add_cdata; /* Additional command specific data..*/ |
288 | uint32_t add_cdata_sz; /* Additional command specific data size */ | 288 | uint32_t add_cdata_sz; /* Additional command specific data size */ |
289 | struct _crystalhd_ioctl_data *next; /* List/Fifo management */ | 289 | struct crystalhd_ioctl_data *next; /* List/Fifo management */ |
290 | } crystalhd_ioctl_data; | 290 | }; |
291 | |||
292 | 291 | ||
293 | enum _crystalhd_kmod_ver{ | 292 | enum crystalhd_kmod_ver{ |
294 | crystalhd_kmod_major = 0, | 293 | crystalhd_kmod_major = 0, |
295 | crystalhd_kmod_minor = 9, | 294 | crystalhd_kmod_minor = 9, |
296 | crystalhd_kmod_rev = 27, | 295 | crystalhd_kmod_rev = 27, |
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c b/drivers/staging/crystalhd/crystalhd_cmds.c index 1a7ca8ba7f8..1429608544d 100644 --- a/drivers/staging/crystalhd/crystalhd_cmds.c +++ b/drivers/staging/crystalhd/crystalhd_cmds.c | |||
@@ -69,8 +69,8 @@ static void bc_cproc_mark_pwr_state(struct crystalhd_cmd *ctx) | |||
69 | } | 69 | } |
70 | } | 70 | } |
71 | 71 | ||
72 | static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, | 72 | static enum BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, |
73 | crystalhd_ioctl_data *idata) | 73 | struct crystalhd_ioctl_data *idata) |
74 | { | 74 | { |
75 | int rc = 0, i = 0; | 75 | int rc = 0, i = 0; |
76 | 76 | ||
@@ -111,8 +111,8 @@ static BC_STATUS bc_cproc_notify_mode(struct crystalhd_cmd *ctx, | |||
111 | return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx); | 111 | return crystalhd_hw_setup_dma_rings(&ctx->hw_ctx); |
112 | } | 112 | } |
113 | 113 | ||
114 | static BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx, | 114 | static enum BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx, |
115 | crystalhd_ioctl_data *idata) | 115 | struct crystalhd_ioctl_data *idata) |
116 | { | 116 | { |
117 | 117 | ||
118 | if (!ctx || !idata) { | 118 | if (!ctx || !idata) { |
@@ -126,7 +126,8 @@ static BC_STATUS bc_cproc_get_version(struct crystalhd_cmd *ctx, | |||
126 | } | 126 | } |
127 | 127 | ||
128 | 128 | ||
129 | static BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | 129 | static enum BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, |
130 | struct crystalhd_ioctl_data *idata) | ||
130 | { | 131 | { |
131 | if (!ctx || !idata) { | 132 | if (!ctx || !idata) { |
132 | BCMLOG_ERR("Invalid Arg!!\n"); | 133 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -143,8 +144,8 @@ static BC_STATUS bc_cproc_get_hwtype(struct crystalhd_cmd *ctx, crystalhd_ioctl_ | |||
143 | return BC_STS_SUCCESS; | 144 | return BC_STS_SUCCESS; |
144 | } | 145 | } |
145 | 146 | ||
146 | static BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx, | 147 | static enum BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx, |
147 | crystalhd_ioctl_data *idata) | 148 | struct crystalhd_ioctl_data *idata) |
148 | { | 149 | { |
149 | if (!ctx || !idata) | 150 | if (!ctx || !idata) |
150 | return BC_STS_INV_ARG; | 151 | return BC_STS_INV_ARG; |
@@ -153,8 +154,8 @@ static BC_STATUS bc_cproc_reg_rd(struct crystalhd_cmd *ctx, | |||
153 | return BC_STS_SUCCESS; | 154 | return BC_STS_SUCCESS; |
154 | } | 155 | } |
155 | 156 | ||
156 | static BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx, | 157 | static enum BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx, |
157 | crystalhd_ioctl_data *idata) | 158 | struct crystalhd_ioctl_data *idata) |
158 | { | 159 | { |
159 | if (!ctx || !idata) | 160 | if (!ctx || !idata) |
160 | return BC_STS_INV_ARG; | 161 | return BC_STS_INV_ARG; |
@@ -165,8 +166,8 @@ static BC_STATUS bc_cproc_reg_wr(struct crystalhd_cmd *ctx, | |||
165 | return BC_STS_SUCCESS; | 166 | return BC_STS_SUCCESS; |
166 | } | 167 | } |
167 | 168 | ||
168 | static BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx, | 169 | static enum BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx, |
169 | crystalhd_ioctl_data *idata) | 170 | struct crystalhd_ioctl_data *idata) |
170 | { | 171 | { |
171 | if (!ctx || !idata) | 172 | if (!ctx || !idata) |
172 | return BC_STS_INV_ARG; | 173 | return BC_STS_INV_ARG; |
@@ -176,8 +177,8 @@ static BC_STATUS bc_cproc_link_reg_rd(struct crystalhd_cmd *ctx, | |||
176 | return BC_STS_SUCCESS; | 177 | return BC_STS_SUCCESS; |
177 | } | 178 | } |
178 | 179 | ||
179 | static BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx, | 180 | static enum BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx, |
180 | crystalhd_ioctl_data *idata) | 181 | struct crystalhd_ioctl_data *idata) |
181 | { | 182 | { |
182 | if (!ctx || !idata) | 183 | if (!ctx || !idata) |
183 | return BC_STS_INV_ARG; | 184 | return BC_STS_INV_ARG; |
@@ -188,10 +189,10 @@ static BC_STATUS bc_cproc_link_reg_wr(struct crystalhd_cmd *ctx, | |||
188 | return BC_STS_SUCCESS; | 189 | return BC_STS_SUCCESS; |
189 | } | 190 | } |
190 | 191 | ||
191 | static BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx, | 192 | static enum BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx, |
192 | crystalhd_ioctl_data *idata) | 193 | struct crystalhd_ioctl_data *idata) |
193 | { | 194 | { |
194 | BC_STATUS sts = BC_STS_SUCCESS; | 195 | enum BC_STATUS sts = BC_STS_SUCCESS; |
195 | 196 | ||
196 | if (!ctx || !idata || !idata->add_cdata) | 197 | if (!ctx || !idata || !idata->add_cdata) |
197 | return BC_STS_INV_ARG; | 198 | return BC_STS_INV_ARG; |
@@ -207,10 +208,10 @@ static BC_STATUS bc_cproc_mem_rd(struct crystalhd_cmd *ctx, | |||
207 | 208 | ||
208 | } | 209 | } |
209 | 210 | ||
210 | static BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx, | 211 | static enum BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx, |
211 | crystalhd_ioctl_data *idata) | 212 | struct crystalhd_ioctl_data *idata) |
212 | { | 213 | { |
213 | BC_STATUS sts = BC_STS_SUCCESS; | 214 | enum BC_STATUS sts = BC_STS_SUCCESS; |
214 | 215 | ||
215 | if (!ctx || !idata || !idata->add_cdata) | 216 | if (!ctx || !idata || !idata->add_cdata) |
216 | return BC_STS_INV_ARG; | 217 | return BC_STS_INV_ARG; |
@@ -226,11 +227,11 @@ static BC_STATUS bc_cproc_mem_wr(struct crystalhd_cmd *ctx, | |||
226 | return sts; | 227 | return sts; |
227 | } | 228 | } |
228 | 229 | ||
229 | static BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx, | 230 | static enum BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx, |
230 | crystalhd_ioctl_data *idata) | 231 | struct crystalhd_ioctl_data *idata) |
231 | { | 232 | { |
232 | uint32_t ix, cnt, off, len; | 233 | uint32_t ix, cnt, off, len; |
233 | BC_STATUS sts = BC_STS_SUCCESS; | 234 | enum BC_STATUS sts = BC_STS_SUCCESS; |
234 | uint32_t *temp; | 235 | uint32_t *temp; |
235 | 236 | ||
236 | if (!ctx || !idata) | 237 | if (!ctx || !idata) |
@@ -258,11 +259,11 @@ static BC_STATUS bc_cproc_cfg_rd(struct crystalhd_cmd *ctx, | |||
258 | return sts; | 259 | return sts; |
259 | } | 260 | } |
260 | 261 | ||
261 | static BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx, | 262 | static enum BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx, |
262 | crystalhd_ioctl_data *idata) | 263 | struct crystalhd_ioctl_data *idata) |
263 | { | 264 | { |
264 | uint32_t ix, cnt, off, len; | 265 | uint32_t ix, cnt, off, len; |
265 | BC_STATUS sts = BC_STS_SUCCESS; | 266 | enum BC_STATUS sts = BC_STS_SUCCESS; |
266 | uint32_t *temp; | 267 | uint32_t *temp; |
267 | 268 | ||
268 | if (!ctx || !idata) | 269 | if (!ctx || !idata) |
@@ -290,10 +291,10 @@ static BC_STATUS bc_cproc_cfg_wr(struct crystalhd_cmd *ctx, | |||
290 | return sts; | 291 | return sts; |
291 | } | 292 | } |
292 | 293 | ||
293 | static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, | 294 | static enum BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, |
294 | crystalhd_ioctl_data *idata) | 295 | struct crystalhd_ioctl_data *idata) |
295 | { | 296 | { |
296 | BC_STATUS sts = BC_STS_SUCCESS; | 297 | enum BC_STATUS sts = BC_STS_SUCCESS; |
297 | 298 | ||
298 | if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) { | 299 | if (!ctx || !idata || !idata->add_cdata || !idata->add_cdata_sz) { |
299 | BCMLOG_ERR("Invalid Arg!!\n"); | 300 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -329,9 +330,10 @@ static BC_STATUS bc_cproc_download_fw(struct crystalhd_cmd *ctx, | |||
329 | * Abort pending input transfers and issue decoder flush command. | 330 | * Abort pending input transfers and issue decoder flush command. |
330 | * | 331 | * |
331 | */ | 332 | */ |
332 | static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | 333 | static enum BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, |
334 | struct crystalhd_ioctl_data *idata) | ||
333 | { | 335 | { |
334 | BC_STATUS sts; | 336 | enum BC_STATUS sts; |
335 | uint32_t *cmd; | 337 | uint32_t *cmd; |
336 | 338 | ||
337 | if (!(ctx->state & BC_LINK_INIT)) { | 339 | if (!(ctx->state & BC_LINK_INIT)) { |
@@ -371,8 +373,8 @@ static BC_STATUS bc_cproc_do_fw_cmd(struct crystalhd_cmd *ctx, crystalhd_ioctl_d | |||
371 | return sts; | 373 | return sts; |
372 | } | 374 | } |
373 | 375 | ||
374 | static void bc_proc_in_completion(crystalhd_dio_req *dio_hnd, | 376 | static void bc_proc_in_completion(struct crystalhd_dio_req *dio_hnd, |
375 | wait_queue_head_t *event, BC_STATUS sts) | 377 | wait_queue_head_t *event, enum BC_STATUS sts) |
376 | { | 378 | { |
377 | if (!dio_hnd || !event) { | 379 | if (!dio_hnd || !event) { |
378 | BCMLOG_ERR("Invalid Arg!!\n"); | 380 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -386,7 +388,7 @@ static void bc_proc_in_completion(crystalhd_dio_req *dio_hnd, | |||
386 | crystalhd_set_event(event); | 388 | crystalhd_set_event(event); |
387 | } | 389 | } |
388 | 390 | ||
389 | static BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx) | 391 | static enum BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx) |
390 | { | 392 | { |
391 | wait_queue_head_t sleep_ev; | 393 | wait_queue_head_t sleep_ev; |
392 | int rc = 0; | 394 | int rc = 0; |
@@ -406,12 +408,12 @@ static BC_STATUS bc_cproc_codein_sleep(struct crystalhd_cmd *ctx) | |||
406 | return BC_STS_SUCCESS; | 408 | return BC_STS_SUCCESS; |
407 | } | 409 | } |
408 | 410 | ||
409 | static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, | 411 | static enum BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, |
410 | crystalhd_ioctl_data *idata, | 412 | struct crystalhd_ioctl_data *idata, |
411 | crystalhd_dio_req *dio) | 413 | struct crystalhd_dio_req *dio) |
412 | { | 414 | { |
413 | uint32_t tx_listid = 0; | 415 | uint32_t tx_listid = 0; |
414 | BC_STATUS sts = BC_STS_SUCCESS; | 416 | enum BC_STATUS sts = BC_STS_SUCCESS; |
415 | wait_queue_head_t event; | 417 | wait_queue_head_t event; |
416 | int rc = 0; | 418 | int rc = 0; |
417 | 419 | ||
@@ -471,7 +473,7 @@ static BC_STATUS bc_cproc_hw_txdma(struct crystalhd_cmd *ctx, | |||
471 | } | 473 | } |
472 | 474 | ||
473 | /* Helper function to check on user buffers */ | 475 | /* Helper function to check on user buffers */ |
474 | static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, | 476 | static enum BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, |
475 | uint32_t uv_off, bool en_422) | 477 | uint32_t uv_off, bool en_422) |
476 | { | 478 | { |
477 | if (!ubuff || !ub_sz) { | 479 | if (!ubuff || !ub_sz) { |
@@ -502,12 +504,13 @@ static BC_STATUS bc_cproc_check_inbuffs(bool pin, void *ubuff, uint32_t ub_sz, | |||
502 | return BC_STS_SUCCESS; | 504 | return BC_STS_SUCCESS; |
503 | } | 505 | } |
504 | 506 | ||
505 | static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | 507 | static enum BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, |
508 | struct crystalhd_ioctl_data *idata) | ||
506 | { | 509 | { |
507 | void *ubuff; | 510 | void *ubuff; |
508 | uint32_t ub_sz; | 511 | uint32_t ub_sz; |
509 | crystalhd_dio_req *dio_hnd = NULL; | 512 | struct crystalhd_dio_req *dio_hnd = NULL; |
510 | BC_STATUS sts = BC_STS_SUCCESS; | 513 | enum BC_STATUS sts = BC_STS_SUCCESS; |
511 | 514 | ||
512 | if (!ctx || !idata) { | 515 | if (!ctx || !idata) { |
513 | BCMLOG_ERR("Invalid Arg!!\n"); | 516 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -537,14 +540,14 @@ static BC_STATUS bc_cproc_proc_input(struct crystalhd_cmd *ctx, crystalhd_ioctl_ | |||
537 | return sts; | 540 | return sts; |
538 | } | 541 | } |
539 | 542 | ||
540 | static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, | 543 | static enum BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, |
541 | crystalhd_ioctl_data *idata) | 544 | struct crystalhd_ioctl_data *idata) |
542 | { | 545 | { |
543 | void *ubuff; | 546 | void *ubuff; |
544 | uint32_t ub_sz, uv_off; | 547 | uint32_t ub_sz, uv_off; |
545 | bool en_422; | 548 | bool en_422; |
546 | crystalhd_dio_req *dio_hnd = NULL; | 549 | struct crystalhd_dio_req *dio_hnd = NULL; |
547 | BC_STATUS sts = BC_STS_SUCCESS; | 550 | enum BC_STATUS sts = BC_STS_SUCCESS; |
548 | 551 | ||
549 | if (!ctx || !idata) { | 552 | if (!ctx || !idata) { |
550 | BCMLOG_ERR("Invalid Arg!!\n"); | 553 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -579,10 +582,10 @@ static BC_STATUS bc_cproc_add_cap_buff(struct crystalhd_cmd *ctx, | |||
579 | return BC_STS_SUCCESS; | 582 | return BC_STS_SUCCESS; |
580 | } | 583 | } |
581 | 584 | ||
582 | static BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx, | 585 | static enum BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx, |
583 | crystalhd_dio_req *dio) | 586 | struct crystalhd_dio_req *dio) |
584 | { | 587 | { |
585 | BC_STATUS sts = BC_STS_SUCCESS; | 588 | enum BC_STATUS sts = BC_STS_SUCCESS; |
586 | 589 | ||
587 | sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0); | 590 | sts = crystalhd_hw_add_cap_buffer(&ctx->hw_ctx, dio, 0); |
588 | if (sts != BC_STS_SUCCESS) | 591 | if (sts != BC_STS_SUCCESS) |
@@ -595,12 +598,12 @@ static BC_STATUS bc_cproc_fmt_change(struct crystalhd_cmd *ctx, | |||
595 | return sts; | 598 | return sts; |
596 | } | 599 | } |
597 | 600 | ||
598 | static BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx, | 601 | static enum BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx, |
599 | crystalhd_ioctl_data *idata) | 602 | struct crystalhd_ioctl_data *idata) |
600 | { | 603 | { |
601 | crystalhd_dio_req *dio = NULL; | 604 | struct crystalhd_dio_req *dio = NULL; |
602 | BC_STATUS sts = BC_STS_SUCCESS; | 605 | enum BC_STATUS sts = BC_STS_SUCCESS; |
603 | BC_DEC_OUT_BUFF *frame; | 606 | struct BC_DEC_OUT_BUFF *frame; |
604 | 607 | ||
605 | if (!ctx || !idata) { | 608 | if (!ctx || !idata) { |
606 | BCMLOG_ERR("Invalid Arg!!\n"); | 609 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -636,8 +639,8 @@ static BC_STATUS bc_cproc_fetch_frame(struct crystalhd_cmd *ctx, | |||
636 | return BC_STS_SUCCESS; | 639 | return BC_STS_SUCCESS; |
637 | } | 640 | } |
638 | 641 | ||
639 | static BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx, | 642 | static enum BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx, |
640 | crystalhd_ioctl_data *idata) | 643 | struct crystalhd_ioctl_data *idata) |
641 | { | 644 | { |
642 | ctx->state |= BC_LINK_CAP_EN; | 645 | ctx->state |= BC_LINK_CAP_EN; |
643 | if (ctx->state == BC_LINK_READY) | 646 | if (ctx->state == BC_LINK_READY) |
@@ -646,12 +649,12 @@ static BC_STATUS bc_cproc_start_capture(struct crystalhd_cmd *ctx, | |||
646 | return BC_STS_SUCCESS; | 649 | return BC_STS_SUCCESS; |
647 | } | 650 | } |
648 | 651 | ||
649 | static BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx, | 652 | static enum BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx, |
650 | crystalhd_ioctl_data *idata) | 653 | struct crystalhd_ioctl_data *idata) |
651 | { | 654 | { |
652 | crystalhd_dio_req *dio = NULL; | 655 | struct crystalhd_dio_req *dio = NULL; |
653 | BC_STATUS sts = BC_STS_SUCCESS; | 656 | enum BC_STATUS sts = BC_STS_SUCCESS; |
654 | BC_DEC_OUT_BUFF *frame; | 657 | struct BC_DEC_OUT_BUFF *frame; |
655 | uint32_t count; | 658 | uint32_t count; |
656 | 659 | ||
657 | if (!ctx || !idata) { | 660 | if (!ctx || !idata) { |
@@ -681,10 +684,10 @@ static BC_STATUS bc_cproc_flush_cap_buffs(struct crystalhd_cmd *ctx, | |||
681 | return crystalhd_hw_stop_capture(&ctx->hw_ctx); | 684 | return crystalhd_hw_stop_capture(&ctx->hw_ctx); |
682 | } | 685 | } |
683 | 686 | ||
684 | static BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx, | 687 | static enum BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx, |
685 | crystalhd_ioctl_data *idata) | 688 | struct crystalhd_ioctl_data *idata) |
686 | { | 689 | { |
687 | BC_DTS_STATS *stats; | 690 | struct BC_DTS_STATS *stats; |
688 | struct crystalhd_hw_stats hw_stats; | 691 | struct crystalhd_hw_stats hw_stats; |
689 | 692 | ||
690 | if (!ctx || !idata) { | 693 | if (!ctx || !idata) { |
@@ -713,20 +716,20 @@ static BC_STATUS bc_cproc_get_stats(struct crystalhd_cmd *ctx, | |||
713 | return BC_STS_SUCCESS; | 716 | return BC_STS_SUCCESS; |
714 | } | 717 | } |
715 | 718 | ||
716 | static BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx, | 719 | static enum BC_STATUS bc_cproc_reset_stats(struct crystalhd_cmd *ctx, |
717 | crystalhd_ioctl_data *idata) | 720 | struct crystalhd_ioctl_data *idata) |
718 | { | 721 | { |
719 | crystalhd_hw_stats(&ctx->hw_ctx, NULL); | 722 | crystalhd_hw_stats(&ctx->hw_ctx, NULL); |
720 | 723 | ||
721 | return BC_STS_SUCCESS; | 724 | return BC_STS_SUCCESS; |
722 | } | 725 | } |
723 | 726 | ||
724 | static BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx, | 727 | static enum BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx, |
725 | crystalhd_ioctl_data *idata) | 728 | struct crystalhd_ioctl_data *idata) |
726 | { | 729 | { |
727 | BC_CLOCK *clock; | 730 | struct BC_CLOCK *clock; |
728 | uint32_t oldClk; | 731 | uint32_t oldClk; |
729 | BC_STATUS sts = BC_STS_SUCCESS; | 732 | enum BC_STATUS sts = BC_STS_SUCCESS; |
730 | 733 | ||
731 | if (!ctx || !idata) { | 734 | if (!ctx || !idata) { |
732 | BCMLOG_ERR("Invalid Arg!!\n"); | 735 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -749,7 +752,7 @@ static BC_STATUS bc_cproc_chg_clk(struct crystalhd_cmd *ctx, | |||
749 | } | 752 | } |
750 | 753 | ||
751 | /*=============== Cmd Proc Table.. ======================================*/ | 754 | /*=============== Cmd Proc Table.. ======================================*/ |
752 | static const crystalhd_cmd_tbl_t g_crystalhd_cproc_tbl[] = { | 755 | static const struct crystalhd_cmd_tbl g_crystalhd_cproc_tbl[] = { |
753 | { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0}, | 756 | { BCM_IOC_GET_VERSION, bc_cproc_get_version, 0}, |
754 | { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0}, | 757 | { BCM_IOC_GET_HWTYPE, bc_cproc_get_hwtype, 0}, |
755 | { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0}, | 758 | { BCM_IOC_REG_RD, bc_cproc_reg_rd, 0}, |
@@ -796,9 +799,10 @@ static const crystalhd_cmd_tbl_t g_crystalhd_cproc_tbl[] = { | |||
796 | * we pass on the power mangement notification to our plug-in by completing | 799 | * we pass on the power mangement notification to our plug-in by completing |
797 | * all outstanding requests with BC_STS_IO_USER_ABORT return code. | 800 | * all outstanding requests with BC_STS_IO_USER_ABORT return code. |
798 | */ | 801 | */ |
799 | BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata) | 802 | enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, |
803 | struct crystalhd_ioctl_data *idata) | ||
800 | { | 804 | { |
801 | BC_STATUS sts = BC_STS_SUCCESS; | 805 | enum BC_STATUS sts = BC_STS_SUCCESS; |
802 | 806 | ||
803 | if (!ctx || !idata) { | 807 | if (!ctx || !idata) { |
804 | BCMLOG_ERR("Invalid Parameters\n"); | 808 | BCMLOG_ERR("Invalid Parameters\n"); |
@@ -854,7 +858,7 @@ BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *ida | |||
854 | * start a new playback session from the pre-suspend clip position. | 858 | * start a new playback session from the pre-suspend clip position. |
855 | * | 859 | * |
856 | */ | 860 | */ |
857 | BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx) | 861 | enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx) |
858 | { | 862 | { |
859 | BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state); | 863 | BCMLOG(BCMLOG_DBG, "crystalhd_resume Success %x\n", ctx->state); |
860 | 864 | ||
@@ -875,7 +879,7 @@ BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx) | |||
875 | * application specific resources. HW layer initialization | 879 | * application specific resources. HW layer initialization |
876 | * is done for the first open request. | 880 | * is done for the first open request. |
877 | */ | 881 | */ |
878 | BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, | 882 | enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, |
879 | struct crystalhd_user **user_ctx) | 883 | struct crystalhd_user **user_ctx) |
880 | { | 884 | { |
881 | struct crystalhd_user *uc; | 885 | struct crystalhd_user *uc; |
@@ -913,7 +917,7 @@ BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, | |||
913 | * Closer aplication handle and release app specific | 917 | * Closer aplication handle and release app specific |
914 | * resources. | 918 | * resources. |
915 | */ | 919 | */ |
916 | BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc) | 920 | enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc) |
917 | { | 921 | { |
918 | uint32_t mode = uc->mode; | 922 | uint32_t mode = uc->mode; |
919 | 923 | ||
@@ -948,7 +952,7 @@ BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user | |||
948 | * | 952 | * |
949 | * Called at the time of driver load. | 953 | * Called at the time of driver load. |
950 | */ | 954 | */ |
951 | BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, | 955 | enum BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, |
952 | struct crystalhd_adp *adp) | 956 | struct crystalhd_adp *adp) |
953 | { | 957 | { |
954 | int i = 0; | 958 | int i = 0; |
@@ -983,7 +987,7 @@ BC_STATUS __devinit crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, | |||
983 | * | 987 | * |
984 | * Called at the time of driver un-load. | 988 | * Called at the time of driver un-load. |
985 | */ | 989 | */ |
986 | BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) | 990 | enum BC_STATUS __devexit crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx) |
987 | { | 991 | { |
988 | BCMLOG(BCMLOG_DBG, "Deleting Command context..\n"); | 992 | BCMLOG(BCMLOG_DBG, "Deleting Command context..\n"); |
989 | 993 | ||
@@ -1021,7 +1025,7 @@ crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cm | |||
1021 | return NULL; | 1025 | return NULL; |
1022 | } | 1026 | } |
1023 | 1027 | ||
1024 | tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(crystalhd_cmd_tbl_t); | 1028 | tbl_sz = sizeof(g_crystalhd_cproc_tbl) / sizeof(struct crystalhd_cmd_tbl); |
1025 | for (i = 0; i < tbl_sz; i++) { | 1029 | for (i = 0; i < tbl_sz; i++) { |
1026 | if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) { | 1030 | if (g_crystalhd_cproc_tbl[i].cmd_id == cmd) { |
1027 | if ((uc->mode == DTS_MONITOR_MODE) && | 1031 | if ((uc->mode == DTS_MONITOR_MODE) && |
diff --git a/drivers/staging/crystalhd/crystalhd_cmds.h b/drivers/staging/crystalhd/crystalhd_cmds.h index 9989038b5c1..10130296601 100644 --- a/drivers/staging/crystalhd/crystalhd_cmds.h +++ b/drivers/staging/crystalhd/crystalhd_cmds.h | |||
@@ -36,7 +36,7 @@ | |||
36 | #include "crystalhd_misc.h" | 36 | #include "crystalhd_misc.h" |
37 | #include "crystalhd_hw.h" | 37 | #include "crystalhd_hw.h" |
38 | 38 | ||
39 | enum _crystalhd_state{ | 39 | enum crystalhd_state{ |
40 | BC_LINK_INVALID = 0x00, | 40 | BC_LINK_INVALID = 0x00, |
41 | BC_LINK_INIT = 0x01, | 41 | BC_LINK_INIT = 0x01, |
42 | BC_LINK_CAP_EN = 0x02, | 42 | BC_LINK_CAP_EN = 0x02, |
@@ -66,23 +66,22 @@ struct crystalhd_cmd { | |||
66 | struct crystalhd_hw hw_ctx; | 66 | struct crystalhd_hw hw_ctx; |
67 | }; | 67 | }; |
68 | 68 | ||
69 | typedef BC_STATUS(*crystalhd_cmd_proc)(struct crystalhd_cmd *, crystalhd_ioctl_data *); | 69 | typedef enum BC_STATUS(*crystalhd_cmd_proc)(struct crystalhd_cmd *, struct crystalhd_ioctl_data *); |
70 | 70 | ||
71 | typedef struct _crystalhd_cmd_tbl { | 71 | struct crystalhd_cmd_tbl { |
72 | uint32_t cmd_id; | 72 | uint32_t cmd_id; |
73 | const crystalhd_cmd_proc cmd_proc; | 73 | const crystalhd_cmd_proc cmd_proc; |
74 | uint32_t block_mon; | 74 | uint32_t block_mon; |
75 | } crystalhd_cmd_tbl_t; | 75 | }; |
76 | |||
77 | 76 | ||
78 | BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, crystalhd_ioctl_data *idata); | 77 | enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx, struct crystalhd_ioctl_data *idata); |
79 | BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx); | 78 | enum BC_STATUS crystalhd_resume(struct crystalhd_cmd *ctx); |
80 | crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd, | 79 | crystalhd_cmd_proc crystalhd_get_cmd_proc(struct crystalhd_cmd *ctx, uint32_t cmd, |
81 | struct crystalhd_user *uc); | 80 | struct crystalhd_user *uc); |
82 | BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, struct crystalhd_user **user_ctx); | 81 | enum BC_STATUS crystalhd_user_open(struct crystalhd_cmd *ctx, struct crystalhd_user **user_ctx); |
83 | BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc); | 82 | enum BC_STATUS crystalhd_user_close(struct crystalhd_cmd *ctx, struct crystalhd_user *uc); |
84 | BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, struct crystalhd_adp *adp); | 83 | enum BC_STATUS crystalhd_setup_cmd_context(struct crystalhd_cmd *ctx, struct crystalhd_adp *adp); |
85 | BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx); | 84 | enum BC_STATUS crystalhd_delete_cmd_context(struct crystalhd_cmd *ctx); |
86 | bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx); | 85 | bool crystalhd_cmd_interrupt(struct crystalhd_cmd *ctx); |
87 | 86 | ||
88 | #endif | 87 | #endif |
diff --git a/drivers/staging/crystalhd/crystalhd_fw_if.h b/drivers/staging/crystalhd/crystalhd_fw_if.h index 261cd19a0ee..77560d4b680 100644 --- a/drivers/staging/crystalhd/crystalhd_fw_if.h +++ b/drivers/staging/crystalhd/crystalhd_fw_if.h | |||
@@ -29,21 +29,17 @@ | |||
29 | 29 | ||
30 | /* TBD: Pull in only required defs into this file.. */ | 30 | /* TBD: Pull in only required defs into this file.. */ |
31 | 31 | ||
32 | |||
33 | |||
34 | /* User Data Header */ | 32 | /* User Data Header */ |
35 | typedef struct user_data { | 33 | struct user_data { |
36 | struct user_data *next; | 34 | struct user_data *next; |
37 | uint32_t type; | 35 | uint32_t type; |
38 | uint32_t size; | 36 | uint32_t size; |
39 | } UD_HDR; | 37 | }; |
40 | |||
41 | |||
42 | 38 | ||
43 | /*------------------------------------------------------* | 39 | /*------------------------------------------------------* |
44 | * MPEG Extension to the PPB * | 40 | * MPEG Extension to the PPB * |
45 | *------------------------------------------------------*/ | 41 | *------------------------------------------------------*/ |
46 | typedef struct { | 42 | struct ppb_mpeg { |
47 | uint32_t to_be_defined; | 43 | uint32_t to_be_defined; |
48 | uint32_t valid; | 44 | uint32_t valid; |
49 | 45 | ||
@@ -61,15 +57,15 @@ typedef struct { | |||
61 | /* MPEG_VALID_USERDATA | 57 | /* MPEG_VALID_USERDATA |
62 | User data is in the form of a linked list. */ | 58 | User data is in the form of a linked list. */ |
63 | int32_t userDataSize; | 59 | int32_t userDataSize; |
64 | UD_HDR *userData; | 60 | struct user_data *userData; |
65 | 61 | ||
66 | } PPB_MPEG; | 62 | }; |
67 | 63 | ||
68 | 64 | ||
69 | /*------------------------------------------------------* | 65 | /*------------------------------------------------------* |
70 | * VC1 Extension to the PPB * | 66 | * VC1 Extension to the PPB * |
71 | *------------------------------------------------------*/ | 67 | *------------------------------------------------------*/ |
72 | typedef struct { | 68 | struct ppb_vc1 { |
73 | uint32_t to_be_defined; | 69 | uint32_t to_be_defined; |
74 | uint32_t valid; | 70 | uint32_t valid; |
75 | 71 | ||
@@ -88,9 +84,9 @@ typedef struct { | |||
88 | /* VC1_VALID_USERDATA | 84 | /* VC1_VALID_USERDATA |
89 | User data is in the form of a linked list. */ | 85 | User data is in the form of a linked list. */ |
90 | int32_t userDataSize; | 86 | int32_t userDataSize; |
91 | UD_HDR *userData; | 87 | struct user_data *userData; |
92 | 88 | ||
93 | } PPB_VC1; | 89 | }; |
94 | 90 | ||
95 | /*------------------------------------------------------* | 91 | /*------------------------------------------------------* |
96 | * H.264 Extension to the PPB * | 92 | * H.264 Extension to the PPB * |
@@ -108,8 +104,8 @@ typedef struct { | |||
108 | /* maximum number of intervals(as many as 256 intervals?) */ | 104 | /* maximum number of intervals(as many as 256 intervals?) */ |
109 | #define MAX_FGT_VALUE_INTERVAL (256) | 105 | #define MAX_FGT_VALUE_INTERVAL (256) |
110 | 106 | ||
111 | typedef struct FGT_SEI { | 107 | struct fgt_sei { |
112 | struct FGT_SEI *next; | 108 | struct fgt_sei *next; |
113 | unsigned char model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE]; | 109 | unsigned char model_values[3][MAX_FGT_VALUE_INTERVAL][MAX_FGT_MODEL_VALUE]; |
114 | unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL]; | 110 | unsigned char upper_bound[3][MAX_FGT_VALUE_INTERVAL]; |
115 | unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL]; | 111 | unsigned char lower_bound[3][MAX_FGT_VALUE_INTERVAL]; |
@@ -134,9 +130,9 @@ typedef struct FGT_SEI { | |||
134 | unsigned char num_model_values[3]; /* Number of model values. */ | 130 | unsigned char num_model_values[3]; /* Number of model values. */ |
135 | uint16_t repetition_period; /* Repetition period (0-16384) */ | 131 | uint16_t repetition_period; /* Repetition period (0-16384) */ |
136 | 132 | ||
137 | } FGT_SEI; | 133 | }; |
138 | 134 | ||
139 | typedef struct { | 135 | struct ppb_h264 { |
140 | /* 'valid' specifies which fields (or sets of | 136 | /* 'valid' specifies which fields (or sets of |
141 | * fields) below are valid. If the corresponding | 137 | * fields) below are valid. If the corresponding |
142 | * bit in 'valid' is NOT set then that field(s) | 138 | * bit in 'valid' is NOT set then that field(s) |
@@ -170,14 +166,14 @@ typedef struct { | |||
170 | 166 | ||
171 | /* H264_VALID_USER */ | 167 | /* H264_VALID_USER */ |
172 | uint32_t user_data_size; | 168 | uint32_t user_data_size; |
173 | UD_HDR *user_data; | 169 | struct user_data *user_data; |
174 | 170 | ||
175 | /* H264 VALID FGT */ | 171 | /* H264 VALID FGT */ |
176 | FGT_SEI *pfgt; | 172 | struct fgt_sei *pfgt; |
177 | 173 | ||
178 | } PPB_H264; | 174 | }; |
179 | 175 | ||
180 | typedef struct { | 176 | struct ppb { |
181 | /* Common fields. */ | 177 | /* Common fields. */ |
182 | uint32_t picture_number; /* Ordinal display number */ | 178 | uint32_t picture_number; /* Ordinal display number */ |
183 | uint32_t video_buffer; /* Video (picbuf) number */ | 179 | uint32_t video_buffer; /* Video (picbuf) number */ |
@@ -215,14 +211,14 @@ typedef struct { | |||
215 | 211 | ||
216 | /* Protocol-specific extensions. */ | 212 | /* Protocol-specific extensions. */ |
217 | union { | 213 | union { |
218 | PPB_H264 h264; | 214 | struct ppb_h264 h264; |
219 | PPB_MPEG mpeg; | 215 | struct ppb_mpeg mpeg; |
220 | PPB_VC1 vc1; | 216 | struct ppb_vc1 vc1; |
221 | } other; | 217 | } other; |
222 | 218 | ||
223 | } PPB; | 219 | }; |
224 | 220 | ||
225 | typedef struct { | 221 | struct c011_pib { |
226 | uint32_t bFormatChange; | 222 | uint32_t bFormatChange; |
227 | uint32_t resolution; | 223 | uint32_t resolution; |
228 | uint32_t channelId; | 224 | uint32_t channelId; |
@@ -231,13 +227,11 @@ typedef struct { | |||
231 | uint32_t zeroPanscanValid; | 227 | uint32_t zeroPanscanValid; |
232 | uint32_t dramOutBufAddr; | 228 | uint32_t dramOutBufAddr; |
233 | uint32_t yComponent; | 229 | uint32_t yComponent; |
234 | PPB ppb; | 230 | struct ppb ppb; |
235 | |||
236 | } C011_PIB; | ||
237 | |||
238 | 231 | ||
232 | }; | ||
239 | 233 | ||
240 | typedef struct { | 234 | struct dec_rsp_channel_start_video { |
241 | uint32_t command; | 235 | uint32_t command; |
242 | uint32_t sequence; | 236 | uint32_t sequence; |
243 | uint32_t status; | 237 | uint32_t status; |
@@ -251,12 +245,12 @@ typedef struct { | |||
251 | uint32_t transportStreamCaptureAddr; | 245 | uint32_t transportStreamCaptureAddr; |
252 | uint32_t asyncEventQ; | 246 | uint32_t asyncEventQ; |
253 | 247 | ||
254 | } DecRspChannelStartVideo; | 248 | }; |
255 | 249 | ||
256 | #define eCMD_C011_CMD_BASE (0x73763000) | 250 | #define eCMD_C011_CMD_BASE (0x73763000) |
257 | 251 | ||
258 | /* host commands */ | 252 | /* host commands */ |
259 | typedef enum { | 253 | enum c011_ts_cmd { |
260 | eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */ | 254 | eCMD_TS_GET_NEXT_PIC = 0x7376F100, /* debug get next picture */ |
261 | eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */ | 255 | eCMD_TS_GET_LAST_PIC = 0x7376F102, /* debug get last pic status */ |
262 | eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */ | 256 | eCMD_TS_READ_WRITE_MEM = 0x7376F104, /* debug read write memory */ |
@@ -364,6 +358,6 @@ typedef enum { | |||
364 | 358 | ||
365 | eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210, | 359 | eNOTIFY_C011_ENC_CHAN_EVENT = eCMD_C011_CMD_BASE + 0x210, |
366 | 360 | ||
367 | } eC011_TS_CMD; | 361 | }; |
368 | 362 | ||
369 | #endif | 363 | #endif |
diff --git a/drivers/staging/crystalhd/crystalhd_hw.c b/drivers/staging/crystalhd/crystalhd_hw.c index 56d1e42bbad..f63185790c4 100644 --- a/drivers/staging/crystalhd/crystalhd_hw.c +++ b/drivers/staging/crystalhd/crystalhd_hw.c | |||
@@ -61,8 +61,8 @@ static void crystalhd_start_dram(struct crystalhd_adp *adp) | |||
61 | 61 | ||
62 | static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp) | 62 | static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp) |
63 | { | 63 | { |
64 | link_misc_perst_deco_ctrl rst_deco_cntrl; | 64 | union link_misc_perst_deco_ctrl rst_deco_cntrl; |
65 | link_misc_perst_clk_ctrl rst_clk_cntrl; | 65 | union link_misc_perst_clk_ctrl rst_clk_cntrl; |
66 | uint32_t temp; | 66 | uint32_t temp; |
67 | 67 | ||
68 | /* | 68 | /* |
@@ -122,8 +122,8 @@ static bool crystalhd_bring_out_of_rst(struct crystalhd_adp *adp) | |||
122 | 122 | ||
123 | static bool crystalhd_put_in_reset(struct crystalhd_adp *adp) | 123 | static bool crystalhd_put_in_reset(struct crystalhd_adp *adp) |
124 | { | 124 | { |
125 | link_misc_perst_deco_ctrl rst_deco_cntrl; | 125 | union link_misc_perst_deco_ctrl rst_deco_cntrl; |
126 | link_misc_perst_clk_ctrl rst_clk_cntrl; | 126 | union link_misc_perst_clk_ctrl rst_clk_cntrl; |
127 | uint32_t temp; | 127 | uint32_t temp; |
128 | 128 | ||
129 | /* | 129 | /* |
@@ -178,7 +178,7 @@ static bool crystalhd_put_in_reset(struct crystalhd_adp *adp) | |||
178 | 178 | ||
179 | static void crystalhd_disable_interrupts(struct crystalhd_adp *adp) | 179 | static void crystalhd_disable_interrupts(struct crystalhd_adp *adp) |
180 | { | 180 | { |
181 | intr_mask_reg intr_mask; | 181 | union intr_mask_reg intr_mask; |
182 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); | 182 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); |
183 | intr_mask.mask_pcie_err = 1; | 183 | intr_mask.mask_pcie_err = 1; |
184 | intr_mask.mask_pcie_rbusmast_err = 1; | 184 | intr_mask.mask_pcie_rbusmast_err = 1; |
@@ -194,7 +194,7 @@ static void crystalhd_disable_interrupts(struct crystalhd_adp *adp) | |||
194 | 194 | ||
195 | static void crystalhd_enable_interrupts(struct crystalhd_adp *adp) | 195 | static void crystalhd_enable_interrupts(struct crystalhd_adp *adp) |
196 | { | 196 | { |
197 | intr_mask_reg intr_mask; | 197 | union intr_mask_reg intr_mask; |
198 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); | 198 | intr_mask.whole_reg = crystalhd_reg_rd(adp, INTR_INTR_MSK_STS_REG); |
199 | intr_mask.mask_pcie_err = 1; | 199 | intr_mask.mask_pcie_err = 1; |
200 | intr_mask.mask_pcie_rbusmast_err = 1; | 200 | intr_mask.mask_pcie_rbusmast_err = 1; |
@@ -348,10 +348,10 @@ static bool crystalhd_stop_device(struct crystalhd_adp *adp) | |||
348 | return true; | 348 | return true; |
349 | } | 349 | } |
350 | 350 | ||
351 | static crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw) | 351 | static struct crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw) |
352 | { | 352 | { |
353 | unsigned long flags = 0; | 353 | unsigned long flags = 0; |
354 | crystalhd_rx_dma_pkt *temp = NULL; | 354 | struct crystalhd_rx_dma_pkt *temp = NULL; |
355 | 355 | ||
356 | if (!hw) | 356 | if (!hw) |
357 | return NULL; | 357 | return NULL; |
@@ -370,7 +370,7 @@ static crystalhd_rx_dma_pkt *crystalhd_hw_alloc_rx_pkt(struct crystalhd_hw *hw) | |||
370 | } | 370 | } |
371 | 371 | ||
372 | static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw, | 372 | static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw *hw, |
373 | crystalhd_rx_dma_pkt *pkt) | 373 | struct crystalhd_rx_dma_pkt *pkt) |
374 | { | 374 | { |
375 | unsigned long flags = 0; | 375 | unsigned long flags = 0; |
376 | 376 | ||
@@ -406,7 +406,7 @@ static void crystalhd_tx_desc_rel_call_back(void *context, void *data) | |||
406 | static void crystalhd_rx_pkt_rel_call_back(void *context, void *data) | 406 | static void crystalhd_rx_pkt_rel_call_back(void *context, void *data) |
407 | { | 407 | { |
408 | struct crystalhd_hw *hw = (struct crystalhd_hw *)context; | 408 | struct crystalhd_hw *hw = (struct crystalhd_hw *)context; |
409 | crystalhd_rx_dma_pkt *pkt = (crystalhd_rx_dma_pkt *)data; | 409 | struct crystalhd_rx_dma_pkt *pkt = (struct crystalhd_rx_dma_pkt *)data; |
410 | 410 | ||
411 | if (!pkt || !hw) { | 411 | if (!pkt || !hw) { |
412 | BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt); | 412 | BCMLOG_ERR("Invalid arg - %p %p\n", hw, pkt); |
@@ -453,9 +453,9 @@ do { \ | |||
453 | * TX - Active & Free | 453 | * TX - Active & Free |
454 | * RX - Active, Ready and Free. | 454 | * RX - Active, Ready and Free. |
455 | */ | 455 | */ |
456 | static BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw) | 456 | static enum BC_STATUS crystalhd_hw_create_ioqs(struct crystalhd_hw *hw) |
457 | { | 457 | { |
458 | BC_STATUS sts = BC_STS_SUCCESS; | 458 | enum BC_STATUS sts = BC_STS_SUCCESS; |
459 | 459 | ||
460 | if (!hw) { | 460 | if (!hw) { |
461 | BCMLOG_ERR("Invalid Arg!!\n"); | 461 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -523,10 +523,10 @@ static bool crystalhd_code_in_full(struct crystalhd_adp *adp, uint32_t needed_sz | |||
523 | return false; | 523 | return false; |
524 | } | 524 | } |
525 | 525 | ||
526 | static BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw, | 526 | static enum BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw, |
527 | uint32_t list_id, BC_STATUS cs) | 527 | uint32_t list_id, enum BC_STATUS cs) |
528 | { | 528 | { |
529 | tx_dma_pkt *tx_req; | 529 | struct tx_dma_pkt *tx_req; |
530 | 530 | ||
531 | if (!hw || !list_id) { | 531 | if (!hw || !list_id) { |
532 | BCMLOG_ERR("Invalid Arg..\n"); | 532 | BCMLOG_ERR("Invalid Arg..\n"); |
@@ -535,7 +535,7 @@ static BC_STATUS crystalhd_hw_tx_req_complete(struct crystalhd_hw *hw, | |||
535 | 535 | ||
536 | hw->pwr_lock--; | 536 | hw->pwr_lock--; |
537 | 537 | ||
538 | tx_req = (tx_dma_pkt *)crystalhd_dioq_find_and_fetch(hw->tx_actq, list_id); | 538 | tx_req = (struct tx_dma_pkt *)crystalhd_dioq_find_and_fetch(hw->tx_actq, list_id); |
539 | if (!tx_req) { | 539 | if (!tx_req) { |
540 | if (cs != BC_STS_IO_USER_ABORT) | 540 | if (cs != BC_STS_IO_USER_ABORT) |
541 | BCMLOG_ERR("Find and Fetch Did not find req\n"); | 541 | BCMLOG_ERR("Find and Fetch Did not find req\n"); |
@@ -654,7 +654,7 @@ static void crystalhd_tx_isr(struct crystalhd_hw *hw, uint32_t int_sts) | |||
654 | hw->stats.tx_errors++; | 654 | hw->stats.tx_errors++; |
655 | } | 655 | } |
656 | 656 | ||
657 | static void crystalhd_hw_dump_desc(pdma_descriptor p_dma_desc, | 657 | static void crystalhd_hw_dump_desc(struct dma_descriptor *p_dma_desc, |
658 | uint32_t ul_desc_index, uint32_t cnt) | 658 | uint32_t ul_desc_index, uint32_t cnt) |
659 | { | 659 | { |
660 | uint32_t ix, ll = 0; | 660 | uint32_t ix, ll = 0; |
@@ -682,15 +682,15 @@ static void crystalhd_hw_dump_desc(pdma_descriptor p_dma_desc, | |||
682 | 682 | ||
683 | } | 683 | } |
684 | 684 | ||
685 | static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, | 685 | static enum BC_STATUS crystalhd_hw_fill_desc(struct crystalhd_dio_req *ioreq, |
686 | dma_descriptor *desc, | 686 | struct dma_descriptor *desc, |
687 | dma_addr_t desc_paddr_base, | 687 | dma_addr_t desc_paddr_base, |
688 | uint32_t sg_cnt, uint32_t sg_st_ix, | 688 | uint32_t sg_cnt, uint32_t sg_st_ix, |
689 | uint32_t sg_st_off, uint32_t xfr_sz) | 689 | uint32_t sg_st_off, uint32_t xfr_sz) |
690 | { | 690 | { |
691 | uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0; | 691 | uint32_t count = 0, ix = 0, sg_ix = 0, len = 0, last_desc_ix = 0; |
692 | dma_addr_t desc_phy_addr = desc_paddr_base; | 692 | dma_addr_t desc_phy_addr = desc_paddr_base; |
693 | addr_64 addr_temp; | 693 | union addr_64 addr_temp; |
694 | 694 | ||
695 | if (!ioreq || !desc || !desc_paddr_base || !xfr_sz || | 695 | if (!ioreq || !desc || !desc_paddr_base || !xfr_sz || |
696 | (!sg_cnt && !ioreq->uinfo.dir_tx)) { | 696 | (!sg_cnt && !ioreq->uinfo.dir_tx)) { |
@@ -721,7 +721,7 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, | |||
721 | desc[ix].dma_dir = ioreq->uinfo.dir_tx; | 721 | desc[ix].dma_dir = ioreq->uinfo.dir_tx; |
722 | 722 | ||
723 | /* Chain DMA descriptor. */ | 723 | /* Chain DMA descriptor. */ |
724 | addr_temp.full_addr = desc_phy_addr + sizeof(dma_descriptor); | 724 | addr_temp.full_addr = desc_phy_addr + sizeof(struct dma_descriptor); |
725 | desc[ix].next_desc_addr_low = addr_temp.low_part; | 725 | desc[ix].next_desc_addr_low = addr_temp.low_part; |
726 | desc[ix].next_desc_addr_high = addr_temp.high_part; | 726 | desc[ix].next_desc_addr_high = addr_temp.high_part; |
727 | 727 | ||
@@ -740,7 +740,7 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, | |||
740 | crystalhd_hw_dump_desc(desc, ix, 1); | 740 | crystalhd_hw_dump_desc(desc, ix, 1); |
741 | 741 | ||
742 | count += len; | 742 | count += len; |
743 | desc_phy_addr += sizeof(dma_descriptor); | 743 | desc_phy_addr += sizeof(struct dma_descriptor); |
744 | } | 744 | } |
745 | 745 | ||
746 | last_desc_ix = ix - 1; | 746 | last_desc_ix = ix - 1; |
@@ -773,15 +773,15 @@ static BC_STATUS crystalhd_hw_fill_desc(crystalhd_dio_req *ioreq, | |||
773 | return BC_STS_SUCCESS; | 773 | return BC_STS_SUCCESS; |
774 | } | 774 | } |
775 | 775 | ||
776 | static BC_STATUS crystalhd_xlat_sgl_to_dma_desc(crystalhd_dio_req *ioreq, | 776 | static enum BC_STATUS crystalhd_xlat_sgl_to_dma_desc(struct crystalhd_dio_req *ioreq, |
777 | pdma_desc_mem pdesc_mem, | 777 | struct dma_desc_mem *pdesc_mem, |
778 | uint32_t *uv_desc_index) | 778 | uint32_t *uv_desc_index) |
779 | { | 779 | { |
780 | dma_descriptor *desc = NULL; | 780 | struct dma_descriptor *desc = NULL; |
781 | dma_addr_t desc_paddr_base = 0; | 781 | dma_addr_t desc_paddr_base = 0; |
782 | uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0; | 782 | uint32_t sg_cnt = 0, sg_st_ix = 0, sg_st_off = 0; |
783 | uint32_t xfr_sz = 0; | 783 | uint32_t xfr_sz = 0; |
784 | BC_STATUS sts = BC_STS_SUCCESS; | 784 | enum BC_STATUS sts = BC_STS_SUCCESS; |
785 | 785 | ||
786 | /* Check params.. */ | 786 | /* Check params.. */ |
787 | if (!ioreq || !pdesc_mem || !uv_desc_index) { | 787 | if (!ioreq || !pdesc_mem || !uv_desc_index) { |
@@ -821,7 +821,7 @@ static BC_STATUS crystalhd_xlat_sgl_to_dma_desc(crystalhd_dio_req *ioreq, | |||
821 | /* Prepare for UV mapping.. */ | 821 | /* Prepare for UV mapping.. */ |
822 | desc = &pdesc_mem->pdma_desc_start[sg_cnt]; | 822 | desc = &pdesc_mem->pdma_desc_start[sg_cnt]; |
823 | desc_paddr_base = pdesc_mem->phy_addr + | 823 | desc_paddr_base = pdesc_mem->phy_addr + |
824 | (sg_cnt * sizeof(dma_descriptor)); | 824 | (sg_cnt * sizeof(struct dma_descriptor)); |
825 | 825 | ||
826 | /* Done with desc addr.. now update sg stuff.*/ | 826 | /* Done with desc addr.. now update sg stuff.*/ |
827 | sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix; | 827 | sg_cnt = ioreq->sg_cnt - ioreq->uinfo.uv_sg_ix; |
@@ -858,7 +858,7 @@ static void crystalhd_start_tx_dma_engine(struct crystalhd_hw *hw) | |||
858 | * Verify if the Stop generates a completion interrupt or not. | 858 | * Verify if the Stop generates a completion interrupt or not. |
859 | * if it does not generate an interrupt, then add polling here. | 859 | * if it does not generate an interrupt, then add polling here. |
860 | */ | 860 | */ |
861 | static BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw) | 861 | static enum BC_STATUS crystalhd_stop_tx_dma_engine(struct crystalhd_hw *hw) |
862 | { | 862 | { |
863 | uint32_t dma_cntrl, cnt = 30; | 863 | uint32_t dma_cntrl, cnt = 30; |
864 | uint32_t l1 = 1, l2 = 1; | 864 | uint32_t l1 = 1, l2 = 1; |
@@ -1021,7 +1021,7 @@ static bool crystalhd_rel_addr_to_pib_Q(struct crystalhd_hw *hw, uint32_t addr_t | |||
1021 | return true; | 1021 | return true; |
1022 | } | 1022 | } |
1023 | 1023 | ||
1024 | static void cpy_pib_to_app(C011_PIB *src_pib, BC_PIC_INFO_BLOCK *dst_pib) | 1024 | static void cpy_pib_to_app(struct c011_pib *src_pib, struct BC_PIC_INFO_BLOCK *dst_pib) |
1025 | { | 1025 | { |
1026 | if (!src_pib || !dst_pib) { | 1026 | if (!src_pib || !dst_pib) { |
1027 | BCMLOG_ERR("Invalid Arguments\n"); | 1027 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -1046,10 +1046,10 @@ static void cpy_pib_to_app(C011_PIB *src_pib, BC_PIC_INFO_BLOCK *dst_pib) | |||
1046 | static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw) | 1046 | static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw) |
1047 | { | 1047 | { |
1048 | unsigned int cnt; | 1048 | unsigned int cnt; |
1049 | C011_PIB src_pib; | 1049 | struct c011_pib src_pib; |
1050 | uint32_t pib_addr, pib_cnt; | 1050 | uint32_t pib_addr, pib_cnt; |
1051 | BC_PIC_INFO_BLOCK *AppPib; | 1051 | struct BC_PIC_INFO_BLOCK *AppPib; |
1052 | crystalhd_rx_dma_pkt *rx_pkt = NULL; | 1052 | struct crystalhd_rx_dma_pkt *rx_pkt = NULL; |
1053 | 1053 | ||
1054 | pib_cnt = crystalhd_get_pib_avail_cnt(hw); | 1054 | pib_cnt = crystalhd_get_pib_avail_cnt(hw); |
1055 | 1055 | ||
@@ -1059,11 +1059,11 @@ static void crystalhd_hw_proc_pib(struct crystalhd_hw *hw) | |||
1059 | for (cnt = 0; cnt < pib_cnt; cnt++) { | 1059 | for (cnt = 0; cnt < pib_cnt; cnt++) { |
1060 | 1060 | ||
1061 | pib_addr = crystalhd_get_addr_from_pib_Q(hw); | 1061 | pib_addr = crystalhd_get_addr_from_pib_Q(hw); |
1062 | crystalhd_mem_rd(hw->adp, pib_addr, sizeof(C011_PIB) / 4, | 1062 | crystalhd_mem_rd(hw->adp, pib_addr, sizeof(struct c011_pib) / 4, |
1063 | (uint32_t *)&src_pib); | 1063 | (uint32_t *)&src_pib); |
1064 | 1064 | ||
1065 | if (src_pib.bFormatChange) { | 1065 | if (src_pib.bFormatChange) { |
1066 | rx_pkt = (crystalhd_rx_dma_pkt *)crystalhd_dioq_fetch(hw->rx_freeq); | 1066 | rx_pkt = (struct crystalhd_rx_dma_pkt *)crystalhd_dioq_fetch(hw->rx_freeq); |
1067 | if (!rx_pkt) | 1067 | if (!rx_pkt) |
1068 | return; | 1068 | return; |
1069 | rx_pkt->flags = 0; | 1069 | rx_pkt->flags = 0; |
@@ -1168,11 +1168,11 @@ static void crystalhd_stop_rx_dma_engine(struct crystalhd_hw *hw) | |||
1168 | count, hw->rx_list_sts[0], hw->rx_list_sts[1]); | 1168 | count, hw->rx_list_sts[0], hw->rx_list_sts[1]); |
1169 | } | 1169 | } |
1170 | 1170 | ||
1171 | static BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, crystalhd_rx_dma_pkt *rx_pkt) | 1171 | static enum BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, struct crystalhd_rx_dma_pkt *rx_pkt) |
1172 | { | 1172 | { |
1173 | uint32_t y_low_addr_reg, y_high_addr_reg; | 1173 | uint32_t y_low_addr_reg, y_high_addr_reg; |
1174 | uint32_t uv_low_addr_reg, uv_high_addr_reg; | 1174 | uint32_t uv_low_addr_reg, uv_high_addr_reg; |
1175 | addr_64 desc_addr; | 1175 | union addr_64 desc_addr; |
1176 | unsigned long flags; | 1176 | unsigned long flags; |
1177 | 1177 | ||
1178 | if (!hw || !rx_pkt) { | 1178 | if (!hw || !rx_pkt) { |
@@ -1228,10 +1228,10 @@ static BC_STATUS crystalhd_hw_prog_rxdma(struct crystalhd_hw *hw, crystalhd_rx_d | |||
1228 | return BC_STS_SUCCESS; | 1228 | return BC_STS_SUCCESS; |
1229 | } | 1229 | } |
1230 | 1230 | ||
1231 | static BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw, | 1231 | static enum BC_STATUS crystalhd_hw_post_cap_buff(struct crystalhd_hw *hw, |
1232 | crystalhd_rx_dma_pkt *rx_pkt) | 1232 | struct crystalhd_rx_dma_pkt *rx_pkt) |
1233 | { | 1233 | { |
1234 | BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt); | 1234 | enum BC_STATUS sts = crystalhd_hw_prog_rxdma(hw, rx_pkt); |
1235 | 1235 | ||
1236 | if (sts == BC_STS_BUSY) | 1236 | if (sts == BC_STS_BUSY) |
1237 | crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt, | 1237 | crystalhd_dioq_add(hw->rx_freeq, (void *)rx_pkt, |
@@ -1287,12 +1287,12 @@ static void crystalhd_hw_finalize_pause(struct crystalhd_hw *hw) | |||
1287 | crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm); | 1287 | crystalhd_reg_wr(hw->adp, PCIE_DLL_DATA_LINK_CONTROL, aspm); |
1288 | } | 1288 | } |
1289 | 1289 | ||
1290 | static BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw, uint32_t list_index, | 1290 | static enum BC_STATUS crystalhd_rx_pkt_done(struct crystalhd_hw *hw, uint32_t list_index, |
1291 | BC_STATUS comp_sts) | 1291 | enum BC_STATUS comp_sts) |
1292 | { | 1292 | { |
1293 | crystalhd_rx_dma_pkt *rx_pkt = NULL; | 1293 | struct crystalhd_rx_dma_pkt *rx_pkt = NULL; |
1294 | uint32_t y_dw_dnsz, uv_dw_dnsz; | 1294 | uint32_t y_dw_dnsz, uv_dw_dnsz; |
1295 | BC_STATUS sts = BC_STS_SUCCESS; | 1295 | enum BC_STATUS sts = BC_STS_SUCCESS; |
1296 | 1296 | ||
1297 | if (!hw || list_index >= DMA_ENGINE_CNT) { | 1297 | if (!hw || list_index >= DMA_ENGINE_CNT) { |
1298 | BCMLOG_ERR("Invalid Arguments\n"); | 1298 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -1328,7 +1328,7 @@ static bool crystalhd_rx_list0_handler(struct crystalhd_hw *hw, uint32_t int_sts | |||
1328 | uint32_t y_err_sts, uint32_t uv_err_sts) | 1328 | uint32_t y_err_sts, uint32_t uv_err_sts) |
1329 | { | 1329 | { |
1330 | uint32_t tmp; | 1330 | uint32_t tmp; |
1331 | list_sts tmp_lsts; | 1331 | enum list_sts tmp_lsts; |
1332 | 1332 | ||
1333 | if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK)) | 1333 | if (!(y_err_sts & GET_Y0_ERR_MSK) && !(uv_err_sts & GET_UV0_ERR_MSK)) |
1334 | return false; | 1334 | return false; |
@@ -1396,7 +1396,7 @@ static bool crystalhd_rx_list1_handler(struct crystalhd_hw *hw, uint32_t int_sts | |||
1396 | uint32_t y_err_sts, uint32_t uv_err_sts) | 1396 | uint32_t y_err_sts, uint32_t uv_err_sts) |
1397 | { | 1397 | { |
1398 | uint32_t tmp; | 1398 | uint32_t tmp; |
1399 | list_sts tmp_lsts; | 1399 | enum list_sts tmp_lsts; |
1400 | 1400 | ||
1401 | if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK)) | 1401 | if (!(y_err_sts & GET_Y1_ERR_MSK) && !(uv_err_sts & GET_UV1_ERR_MSK)) |
1402 | return false; | 1402 | return false; |
@@ -1467,7 +1467,7 @@ static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts) | |||
1467 | { | 1467 | { |
1468 | unsigned long flags; | 1468 | unsigned long flags; |
1469 | uint32_t i, list_avail = 0; | 1469 | uint32_t i, list_avail = 0; |
1470 | BC_STATUS comp_sts = BC_STS_NO_DATA; | 1470 | enum BC_STATUS comp_sts = BC_STS_NO_DATA; |
1471 | uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0; | 1471 | uint32_t y_err_sts, uv_err_sts, y_dn_sz = 0, uv_dn_sz = 0; |
1472 | bool ret = 0; | 1472 | bool ret = 0; |
1473 | 1473 | ||
@@ -1535,15 +1535,15 @@ static void crystalhd_rx_isr(struct crystalhd_hw *hw, uint32_t intr_sts) | |||
1535 | } | 1535 | } |
1536 | } | 1536 | } |
1537 | 1537 | ||
1538 | static BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw, | 1538 | static enum BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw, |
1539 | BC_FW_CMD *fw_cmd) | 1539 | struct BC_FW_CMD *fw_cmd) |
1540 | { | 1540 | { |
1541 | BC_STATUS sts = BC_STS_SUCCESS; | 1541 | enum BC_STATUS sts = BC_STS_SUCCESS; |
1542 | DecRspChannelStartVideo *st_rsp = NULL; | 1542 | struct dec_rsp_channel_start_video *st_rsp = NULL; |
1543 | 1543 | ||
1544 | switch (fw_cmd->cmd[0]) { | 1544 | switch (fw_cmd->cmd[0]) { |
1545 | case eCMD_C011_DEC_CHAN_START_VIDEO: | 1545 | case eCMD_C011_DEC_CHAN_START_VIDEO: |
1546 | st_rsp = (DecRspChannelStartVideo *)fw_cmd->rsp; | 1546 | st_rsp = (struct dec_rsp_channel_start_video *)fw_cmd->rsp; |
1547 | hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ; | 1547 | hw->pib_del_Q_addr = st_rsp->picInfoDeliveryQ; |
1548 | hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ; | 1548 | hw->pib_rel_Q_addr = st_rsp->picInfoReleaseQ; |
1549 | BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n", | 1549 | BCMLOG(BCMLOG_DBG, "DelQAddr:%x RelQAddr:%x\n", |
@@ -1561,10 +1561,10 @@ static BC_STATUS crystalhd_fw_cmd_post_proc(struct crystalhd_hw *hw, | |||
1561 | return sts; | 1561 | return sts; |
1562 | } | 1562 | } |
1563 | 1563 | ||
1564 | static BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw) | 1564 | static enum BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw) |
1565 | { | 1565 | { |
1566 | uint32_t reg; | 1566 | uint32_t reg; |
1567 | link_misc_perst_decoder_ctrl rst_cntrl_reg; | 1567 | union link_misc_perst_decoder_ctrl rst_cntrl_reg; |
1568 | 1568 | ||
1569 | /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */ | 1569 | /* Pulse reset pin of 7412 (MISC_PERST_DECODER_CTRL) */ |
1570 | rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp, MISC_PERST_DECODER_CTRL); | 1570 | rst_cntrl_reg.whole_reg = crystalhd_reg_rd(hw->adp, MISC_PERST_DECODER_CTRL); |
@@ -1622,7 +1622,7 @@ static BC_STATUS crystalhd_put_ddr2sleep(struct crystalhd_hw *hw) | |||
1622 | ** | 1622 | ** |
1623 | *************************************************/ | 1623 | *************************************************/ |
1624 | 1624 | ||
1625 | BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_t sz) | 1625 | enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_t sz) |
1626 | { | 1626 | { |
1627 | uint32_t reg_data, cnt, *temp_buff; | 1627 | uint32_t reg_data, cnt, *temp_buff; |
1628 | uint32_t fw_sig_len = 36; | 1628 | uint32_t fw_sig_len = 36; |
@@ -1714,13 +1714,14 @@ BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, void *buffer, uint32_ | |||
1714 | return BC_STS_SUCCESS;; | 1714 | return BC_STS_SUCCESS;; |
1715 | } | 1715 | } |
1716 | 1716 | ||
1717 | BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd) | 1717 | enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, |
1718 | struct BC_FW_CMD *fw_cmd) | ||
1718 | { | 1719 | { |
1719 | uint32_t cnt = 0, cmd_res_addr; | 1720 | uint32_t cnt = 0, cmd_res_addr; |
1720 | uint32_t *cmd_buff, *res_buff; | 1721 | uint32_t *cmd_buff, *res_buff; |
1721 | wait_queue_head_t fw_cmd_event; | 1722 | wait_queue_head_t fw_cmd_event; |
1722 | int rc = 0; | 1723 | int rc = 0; |
1723 | BC_STATUS sts; | 1724 | enum BC_STATUS sts; |
1724 | 1725 | ||
1725 | crystalhd_create_event(&fw_cmd_event); | 1726 | crystalhd_create_event(&fw_cmd_event); |
1726 | 1727 | ||
@@ -1854,7 +1855,7 @@ bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw) | |||
1854 | return rc; | 1855 | return rc; |
1855 | } | 1856 | } |
1856 | 1857 | ||
1857 | BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp) | 1858 | enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp) |
1858 | { | 1859 | { |
1859 | if (!hw || !adp) { | 1860 | if (!hw || !adp) { |
1860 | BCMLOG_ERR("Invalid Arguments\n"); | 1861 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -1886,7 +1887,7 @@ BC_STATUS crystalhd_hw_open(struct crystalhd_hw *hw, struct crystalhd_adp *adp) | |||
1886 | return BC_STS_SUCCESS; | 1887 | return BC_STS_SUCCESS; |
1887 | } | 1888 | } |
1888 | 1889 | ||
1889 | BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw) | 1890 | enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw) |
1890 | { | 1891 | { |
1891 | if (!hw) { | 1892 | if (!hw) { |
1892 | BCMLOG_ERR("Invalid Arguments\n"); | 1893 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -1903,14 +1904,14 @@ BC_STATUS crystalhd_hw_close(struct crystalhd_hw *hw) | |||
1903 | return BC_STS_SUCCESS; | 1904 | return BC_STS_SUCCESS; |
1904 | } | 1905 | } |
1905 | 1906 | ||
1906 | BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | 1907 | enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) |
1907 | { | 1908 | { |
1908 | unsigned int i; | 1909 | unsigned int i; |
1909 | void *mem; | 1910 | void *mem; |
1910 | size_t mem_len; | 1911 | size_t mem_len; |
1911 | dma_addr_t phy_addr; | 1912 | dma_addr_t phy_addr; |
1912 | BC_STATUS sts = BC_STS_SUCCESS; | 1913 | enum BC_STATUS sts = BC_STS_SUCCESS; |
1913 | crystalhd_rx_dma_pkt *rpkt; | 1914 | struct crystalhd_rx_dma_pkt *rpkt; |
1914 | 1915 | ||
1915 | if (!hw || !hw->adp) { | 1916 | if (!hw || !hw->adp) { |
1916 | BCMLOG_ERR("Invalid Arguments\n"); | 1917 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -1923,7 +1924,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | |||
1923 | return sts; | 1924 | return sts; |
1924 | } | 1925 | } |
1925 | 1926 | ||
1926 | mem_len = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); | 1927 | mem_len = BC_LINK_MAX_SGLS * sizeof(struct dma_descriptor); |
1927 | 1928 | ||
1928 | for (i = 0; i < BC_TX_LIST_CNT; i++) { | 1929 | for (i = 0; i < BC_TX_LIST_CNT; i++) { |
1929 | mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr); | 1930 | mem = bc_kern_dma_alloc(hw->adp, mem_len, &phy_addr); |
@@ -1938,7 +1939,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | |||
1938 | hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem; | 1939 | hw->tx_pkt_pool[i].desc_mem.pdma_desc_start = mem; |
1939 | hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr; | 1940 | hw->tx_pkt_pool[i].desc_mem.phy_addr = phy_addr; |
1940 | hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS * | 1941 | hw->tx_pkt_pool[i].desc_mem.sz = BC_LINK_MAX_SGLS * |
1941 | sizeof(dma_descriptor); | 1942 | sizeof(struct dma_descriptor); |
1942 | hw->tx_pkt_pool[i].list_tag = 0; | 1943 | hw->tx_pkt_pool[i].list_tag = 0; |
1943 | 1944 | ||
1944 | /* Add TX dma requests to Free Queue..*/ | 1945 | /* Add TX dma requests to Free Queue..*/ |
@@ -1968,7 +1969,7 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | |||
1968 | } | 1969 | } |
1969 | rpkt->desc_mem.pdma_desc_start = mem; | 1970 | rpkt->desc_mem.pdma_desc_start = mem; |
1970 | rpkt->desc_mem.phy_addr = phy_addr; | 1971 | rpkt->desc_mem.phy_addr = phy_addr; |
1971 | rpkt->desc_mem.sz = BC_LINK_MAX_SGLS * sizeof(dma_descriptor); | 1972 | rpkt->desc_mem.sz = BC_LINK_MAX_SGLS * sizeof(struct dma_descriptor); |
1972 | rpkt->pkt_tag = hw->rx_pkt_tag_seed + i; | 1973 | rpkt->pkt_tag = hw->rx_pkt_tag_seed + i; |
1973 | crystalhd_hw_free_rx_pkt(hw, rpkt); | 1974 | crystalhd_hw_free_rx_pkt(hw, rpkt); |
1974 | } | 1975 | } |
@@ -1976,10 +1977,10 @@ BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *hw) | |||
1976 | return BC_STS_SUCCESS; | 1977 | return BC_STS_SUCCESS; |
1977 | } | 1978 | } |
1978 | 1979 | ||
1979 | BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw) | 1980 | enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw) |
1980 | { | 1981 | { |
1981 | unsigned int i; | 1982 | unsigned int i; |
1982 | crystalhd_rx_dma_pkt *rpkt = NULL; | 1983 | struct crystalhd_rx_dma_pkt *rpkt = NULL; |
1983 | 1984 | ||
1984 | if (!hw || !hw->adp) { | 1985 | if (!hw || !hw->adp) { |
1985 | BCMLOG_ERR("Invalid Arguments\n"); | 1986 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -2014,16 +2015,16 @@ BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *hw) | |||
2014 | return BC_STS_SUCCESS; | 2015 | return BC_STS_SUCCESS; |
2015 | } | 2016 | } |
2016 | 2017 | ||
2017 | BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, | 2018 | enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, struct crystalhd_dio_req *ioreq, |
2018 | hw_comp_callback call_back, | 2019 | hw_comp_callback call_back, |
2019 | wait_queue_head_t *cb_event, uint32_t *list_id, | 2020 | wait_queue_head_t *cb_event, uint32_t *list_id, |
2020 | uint8_t data_flags) | 2021 | uint8_t data_flags) |
2021 | { | 2022 | { |
2022 | tx_dma_pkt *tx_dma_packet = NULL; | 2023 | struct tx_dma_pkt *tx_dma_packet = NULL; |
2023 | uint32_t first_desc_u_addr, first_desc_l_addr; | 2024 | uint32_t first_desc_u_addr, first_desc_l_addr; |
2024 | uint32_t low_addr, high_addr; | 2025 | uint32_t low_addr, high_addr; |
2025 | addr_64 desc_addr; | 2026 | union addr_64 desc_addr; |
2026 | BC_STATUS sts, add_sts; | 2027 | enum BC_STATUS sts, add_sts; |
2027 | uint32_t dummy_index = 0; | 2028 | uint32_t dummy_index = 0; |
2028 | unsigned long flags; | 2029 | unsigned long flags; |
2029 | bool rc; | 2030 | bool rc; |
@@ -2048,7 +2049,7 @@ BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq | |||
2048 | } | 2049 | } |
2049 | 2050 | ||
2050 | /* Get a list from TxFreeQ */ | 2051 | /* Get a list from TxFreeQ */ |
2051 | tx_dma_packet = (tx_dma_pkt *)crystalhd_dioq_fetch(hw->tx_freeq); | 2052 | tx_dma_packet = (struct tx_dma_pkt *)crystalhd_dioq_fetch(hw->tx_freeq); |
2052 | if (!tx_dma_packet) { | 2053 | if (!tx_dma_packet) { |
2053 | BCMLOG_ERR("No empty elements..\n"); | 2054 | BCMLOG_ERR("No empty elements..\n"); |
2054 | return BC_STS_ERR_USAGE; | 2055 | return BC_STS_ERR_USAGE; |
@@ -2121,7 +2122,7 @@ BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq | |||
2121 | * | 2122 | * |
2122 | * FIX_ME: Not Tested the actual condition.. | 2123 | * FIX_ME: Not Tested the actual condition.. |
2123 | */ | 2124 | */ |
2124 | BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id) | 2125 | enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id) |
2125 | { | 2126 | { |
2126 | if (!hw || !list_id) { | 2127 | if (!hw || !list_id) { |
2127 | BCMLOG_ERR("Invalid Arguments\n"); | 2128 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -2134,12 +2135,12 @@ BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id) | |||
2134 | return BC_STS_SUCCESS; | 2135 | return BC_STS_SUCCESS; |
2135 | } | 2136 | } |
2136 | 2137 | ||
2137 | BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | 2138 | enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, |
2138 | crystalhd_dio_req *ioreq, bool en_post) | 2139 | struct crystalhd_dio_req *ioreq, bool en_post) |
2139 | { | 2140 | { |
2140 | crystalhd_rx_dma_pkt *rpkt; | 2141 | struct crystalhd_rx_dma_pkt *rpkt; |
2141 | uint32_t tag, uv_desc_ix = 0; | 2142 | uint32_t tag, uv_desc_ix = 0; |
2142 | BC_STATUS sts; | 2143 | enum BC_STATUS sts; |
2143 | 2144 | ||
2144 | if (!hw || !ioreq) { | 2145 | if (!hw || !ioreq) { |
2145 | BCMLOG_ERR("Invalid Arguments\n"); | 2146 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -2164,7 +2165,7 @@ BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | |||
2164 | /* Store the address of UV in the rx packet for post*/ | 2165 | /* Store the address of UV in the rx packet for post*/ |
2165 | if (uv_desc_ix) | 2166 | if (uv_desc_ix) |
2166 | rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr + | 2167 | rpkt->uv_phy_addr = rpkt->desc_mem.phy_addr + |
2167 | (sizeof(dma_descriptor) * (uv_desc_ix + 1)); | 2168 | (sizeof(struct dma_descriptor) * (uv_desc_ix + 1)); |
2168 | 2169 | ||
2169 | if (en_post) | 2170 | if (en_post) |
2170 | sts = crystalhd_hw_post_cap_buff(hw, rpkt); | 2171 | sts = crystalhd_hw_post_cap_buff(hw, rpkt); |
@@ -2174,11 +2175,11 @@ BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | |||
2174 | return sts; | 2175 | return sts; |
2175 | } | 2176 | } |
2176 | 2177 | ||
2177 | BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, | 2178 | enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, |
2178 | BC_PIC_INFO_BLOCK *pib, | 2179 | struct BC_PIC_INFO_BLOCK *pib, |
2179 | crystalhd_dio_req **ioreq) | 2180 | struct crystalhd_dio_req **ioreq) |
2180 | { | 2181 | { |
2181 | crystalhd_rx_dma_pkt *rpkt; | 2182 | struct crystalhd_rx_dma_pkt *rpkt; |
2182 | uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000; | 2183 | uint32_t timeout = BC_PROC_OUTPUT_TIMEOUT / 1000; |
2183 | uint32_t sig_pending = 0; | 2184 | uint32_t sig_pending = 0; |
2184 | 2185 | ||
@@ -2210,10 +2211,10 @@ BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, | |||
2210 | return BC_STS_SUCCESS; | 2211 | return BC_STS_SUCCESS; |
2211 | } | 2212 | } |
2212 | 2213 | ||
2213 | BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw) | 2214 | enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw) |
2214 | { | 2215 | { |
2215 | crystalhd_rx_dma_pkt *rx_pkt; | 2216 | struct crystalhd_rx_dma_pkt *rx_pkt; |
2216 | BC_STATUS sts; | 2217 | enum BC_STATUS sts; |
2217 | uint32_t i; | 2218 | uint32_t i; |
2218 | 2219 | ||
2219 | if (!hw) { | 2220 | if (!hw) { |
@@ -2235,7 +2236,7 @@ BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw) | |||
2235 | return BC_STS_SUCCESS; | 2236 | return BC_STS_SUCCESS; |
2236 | } | 2237 | } |
2237 | 2238 | ||
2238 | BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw) | 2239 | enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw) |
2239 | { | 2240 | { |
2240 | void *temp = NULL; | 2241 | void *temp = NULL; |
2241 | 2242 | ||
@@ -2255,7 +2256,7 @@ BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw) | |||
2255 | return BC_STS_SUCCESS; | 2256 | return BC_STS_SUCCESS; |
2256 | } | 2257 | } |
2257 | 2258 | ||
2258 | BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw) | 2259 | enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw) |
2259 | { | 2260 | { |
2260 | hw->stats.pause_cnt++; | 2261 | hw->stats.pause_cnt++; |
2261 | hw->stop_pending = 1; | 2262 | hw->stop_pending = 1; |
@@ -2267,9 +2268,9 @@ BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw) | |||
2267 | return BC_STS_SUCCESS; | 2268 | return BC_STS_SUCCESS; |
2268 | } | 2269 | } |
2269 | 2270 | ||
2270 | BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw) | 2271 | enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw) |
2271 | { | 2272 | { |
2272 | BC_STATUS sts; | 2273 | enum BC_STATUS sts; |
2273 | uint32_t aspm; | 2274 | uint32_t aspm; |
2274 | 2275 | ||
2275 | hw->stop_pending = 0; | 2276 | hw->stop_pending = 0; |
@@ -2283,9 +2284,9 @@ BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw) | |||
2283 | return sts; | 2284 | return sts; |
2284 | } | 2285 | } |
2285 | 2286 | ||
2286 | BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw) | 2287 | enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw) |
2287 | { | 2288 | { |
2288 | BC_STATUS sts; | 2289 | enum BC_STATUS sts; |
2289 | 2290 | ||
2290 | if (!hw) { | 2291 | if (!hw) { |
2291 | BCMLOG_ERR("Invalid Arguments\n"); | 2292 | BCMLOG_ERR("Invalid Arguments\n"); |
@@ -2324,7 +2325,7 @@ void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stat | |||
2324 | memcpy(stats, &hw->stats, sizeof(*stats)); | 2325 | memcpy(stats, &hw->stats, sizeof(*stats)); |
2325 | } | 2326 | } |
2326 | 2327 | ||
2327 | BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw) | 2328 | enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *hw) |
2328 | { | 2329 | { |
2329 | uint32_t reg, n, i; | 2330 | uint32_t reg, n, i; |
2330 | uint32_t vco_mg, refresh_reg; | 2331 | uint32_t vco_mg, refresh_reg; |
diff --git a/drivers/staging/crystalhd/crystalhd_hw.h b/drivers/staging/crystalhd/crystalhd_hw.h index 1c6318e912a..3efbf9d4ff5 100644 --- a/drivers/staging/crystalhd/crystalhd_hw.h +++ b/drivers/staging/crystalhd/crystalhd_hw.h | |||
@@ -109,7 +109,7 @@ | |||
109 | #define DecHt_HostSwReset 0x340000 | 109 | #define DecHt_HostSwReset 0x340000 |
110 | #define BC_DRAM_FW_CFG_ADDR 0x001c2000 | 110 | #define BC_DRAM_FW_CFG_ADDR 0x001c2000 |
111 | 111 | ||
112 | typedef union _addr_64_ { | 112 | union addr_64 { |
113 | struct { | 113 | struct { |
114 | uint32_t low_part; | 114 | uint32_t low_part; |
115 | uint32_t high_part; | 115 | uint32_t high_part; |
@@ -117,9 +117,9 @@ typedef union _addr_64_ { | |||
117 | 117 | ||
118 | uint64_t full_addr; | 118 | uint64_t full_addr; |
119 | 119 | ||
120 | } addr_64; | 120 | }; |
121 | 121 | ||
122 | typedef union _intr_mask_reg_ { | 122 | union intr_mask_reg { |
123 | struct { | 123 | struct { |
124 | uint32_t mask_tx_done:1; | 124 | uint32_t mask_tx_done:1; |
125 | uint32_t mask_tx_err:1; | 125 | uint32_t mask_tx_err:1; |
@@ -133,9 +133,9 @@ typedef union _intr_mask_reg_ { | |||
133 | 133 | ||
134 | uint32_t whole_reg; | 134 | uint32_t whole_reg; |
135 | 135 | ||
136 | } intr_mask_reg; | 136 | }; |
137 | 137 | ||
138 | typedef union _link_misc_perst_deco_ctrl_ { | 138 | union link_misc_perst_deco_ctrl { |
139 | struct { | 139 | struct { |
140 | uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ | 140 | uint32_t bcm7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ |
141 | uint32_t reserved0:3; /* Reserved.No Effect*/ | 141 | uint32_t reserved0:3; /* Reserved.No Effect*/ |
@@ -145,9 +145,9 @@ typedef union _link_misc_perst_deco_ctrl_ { | |||
145 | 145 | ||
146 | uint32_t whole_reg; | 146 | uint32_t whole_reg; |
147 | 147 | ||
148 | } link_misc_perst_deco_ctrl; | 148 | }; |
149 | 149 | ||
150 | typedef union _link_misc_perst_clk_ctrl_ { | 150 | union link_misc_perst_clk_ctrl { |
151 | struct { | 151 | struct { |
152 | uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */ | 152 | uint32_t sel_alt_clk:1; /* When set, selects a 6.75MHz clock as the source of core_clk */ |
153 | uint32_t stop_core_clk:1; /* When set, stops the branch of core_clk that is not needed for low power operation */ | 153 | uint32_t stop_core_clk:1; /* When set, stops the branch of core_clk that is not needed for low power operation */ |
@@ -161,10 +161,9 @@ typedef union _link_misc_perst_clk_ctrl_ { | |||
161 | 161 | ||
162 | uint32_t whole_reg; | 162 | uint32_t whole_reg; |
163 | 163 | ||
164 | } link_misc_perst_clk_ctrl; | 164 | }; |
165 | |||
166 | 165 | ||
167 | typedef union _link_misc_perst_decoder_ctrl_ { | 166 | union link_misc_perst_decoder_ctrl { |
168 | struct { | 167 | struct { |
169 | uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ | 168 | uint32_t bcm_7412_rst:1; /* 1 -> BCM7412 is held in reset. Reset value 1.*/ |
170 | uint32_t res0:3; /* Reserved.No Effect*/ | 169 | uint32_t res0:3; /* Reserved.No Effect*/ |
@@ -174,10 +173,9 @@ typedef union _link_misc_perst_decoder_ctrl_ { | |||
174 | 173 | ||
175 | uint32_t whole_reg; | 174 | uint32_t whole_reg; |
176 | 175 | ||
177 | } link_misc_perst_decoder_ctrl; | 176 | }; |
178 | |||
179 | 177 | ||
180 | typedef union _desc_low_addr_reg_ { | 178 | union desc_low_addr_reg { |
181 | struct { | 179 | struct { |
182 | uint32_t list_valid:1; | 180 | uint32_t list_valid:1; |
183 | uint32_t reserved:4; | 181 | uint32_t reserved:4; |
@@ -186,9 +184,9 @@ typedef union _desc_low_addr_reg_ { | |||
186 | 184 | ||
187 | uint32_t whole_reg; | 185 | uint32_t whole_reg; |
188 | 186 | ||
189 | } desc_low_addr_reg; | 187 | }; |
190 | 188 | ||
191 | typedef struct _dma_descriptor_ { /* 8 32-bit values */ | 189 | struct dma_descriptor { /* 8 32-bit values */ |
192 | /* 0th u32 */ | 190 | /* 0th u32 */ |
193 | uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */ | 191 | uint32_t sdram_buff_addr:28; /* bits 0-27: SDRAM Address */ |
194 | uint32_t res0:4; /* bits 28-31: Reserved */ | 192 | uint32_t res0:4; /* bits 28-31: Reserved */ |
@@ -220,24 +218,22 @@ typedef struct _dma_descriptor_ { /* 8 32-bit values */ | |||
220 | /* 7th u32 */ | 218 | /* 7th u32 */ |
221 | uint32_t res8; /* Last 32bits reserved */ | 219 | uint32_t res8; /* Last 32bits reserved */ |
222 | 220 | ||
223 | } dma_descriptor, *pdma_descriptor; | 221 | }; |
224 | 222 | ||
225 | /* | 223 | /* |
226 | * We will allocate the memory in 4K pages | 224 | * We will allocate the memory in 4K pages |
227 | * the linked list will be a list of 32 byte descriptors. | 225 | * the linked list will be a list of 32 byte descriptors. |
228 | * The virtual address will determine what should be freed. | 226 | * The virtual address will determine what should be freed. |
229 | */ | 227 | */ |
230 | typedef struct _dma_desc_mem_ { | 228 | struct dma_desc_mem { |
231 | pdma_descriptor pdma_desc_start; /* 32-bytes for dma descriptor. should be first element */ | 229 | struct dma_descriptor *pdma_desc_start; /* 32-bytes for dma descriptor. should be first element */ |
232 | dma_addr_t phy_addr; /* physical address of each DMA desc */ | 230 | dma_addr_t phy_addr; /* physical address of each DMA desc */ |
233 | uint32_t sz; | 231 | uint32_t sz; |
234 | struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */ | 232 | struct _dma_desc_mem_ *Next; /* points to Next Descriptor in chain */ |
235 | 233 | ||
236 | } dma_desc_mem, *pdma_desc_mem; | 234 | }; |
237 | |||
238 | |||
239 | 235 | ||
240 | typedef enum _list_sts_ { | 236 | enum list_sts { |
241 | sts_free = 0, | 237 | sts_free = 0, |
242 | 238 | ||
243 | /* RX-Y Bits 0:7 */ | 239 | /* RX-Y Bits 0:7 */ |
@@ -253,30 +249,27 @@ typedef enum _list_sts_ { | |||
253 | 249 | ||
254 | rx_y_mask = 0x000000FF, | 250 | rx_y_mask = 0x000000FF, |
255 | rx_uv_mask = 0x0000FF00, | 251 | rx_uv_mask = 0x0000FF00, |
252 | }; | ||
256 | 253 | ||
257 | } list_sts; | 254 | struct tx_dma_pkt { |
258 | 255 | struct dma_desc_mem desc_mem; | |
259 | typedef struct _tx_dma_pkt_ { | ||
260 | dma_desc_mem desc_mem; | ||
261 | hw_comp_callback call_back; | 256 | hw_comp_callback call_back; |
262 | crystalhd_dio_req *dio_req; | 257 | struct crystalhd_dio_req *dio_req; |
263 | wait_queue_head_t *cb_event; | 258 | wait_queue_head_t *cb_event; |
264 | uint32_t list_tag; | 259 | uint32_t list_tag; |
260 | }; | ||
265 | 261 | ||
266 | } tx_dma_pkt; | 262 | struct crystalhd_rx_dma_pkt { |
267 | 263 | struct dma_desc_mem desc_mem; | |
268 | typedef struct _crystalhd_rx_dma_pkt { | 264 | struct crystalhd_dio_req *dio_req; |
269 | dma_desc_mem desc_mem; | ||
270 | crystalhd_dio_req *dio_req; | ||
271 | uint32_t pkt_tag; | 265 | uint32_t pkt_tag; |
272 | uint32_t flags; | 266 | uint32_t flags; |
273 | BC_PIC_INFO_BLOCK pib; | 267 | struct BC_PIC_INFO_BLOCK pib; |
274 | dma_addr_t uv_phy_addr; | 268 | dma_addr_t uv_phy_addr; |
275 | struct _crystalhd_rx_dma_pkt *next; | 269 | struct crystalhd_rx_dma_pkt *next; |
276 | 270 | }; | |
277 | } crystalhd_rx_dma_pkt; | ||
278 | 271 | ||
279 | struct crystalhd_hw_stats{ | 272 | struct crystalhd_hw_stats { |
280 | uint32_t rx_errors; | 273 | uint32_t rx_errors; |
281 | uint32_t tx_errors; | 274 | uint32_t tx_errors; |
282 | uint32_t freeq_count; | 275 | uint32_t freeq_count; |
@@ -288,13 +281,13 @@ struct crystalhd_hw_stats{ | |||
288 | }; | 281 | }; |
289 | 282 | ||
290 | struct crystalhd_hw { | 283 | struct crystalhd_hw { |
291 | tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT]; | 284 | struct tx_dma_pkt tx_pkt_pool[DMA_ENGINE_CNT]; |
292 | spinlock_t lock; | 285 | spinlock_t lock; |
293 | 286 | ||
294 | uint32_t tx_ioq_tag_seed; | 287 | uint32_t tx_ioq_tag_seed; |
295 | uint32_t tx_list_post_index; | 288 | uint32_t tx_list_post_index; |
296 | 289 | ||
297 | crystalhd_rx_dma_pkt *rx_pkt_pool_head; | 290 | struct crystalhd_rx_dma_pkt *rx_pkt_pool_head; |
298 | uint32_t rx_pkt_tag_seed; | 291 | uint32_t rx_pkt_tag_seed; |
299 | 292 | ||
300 | bool dev_started; | 293 | bool dev_started; |
@@ -306,16 +299,16 @@ struct crystalhd_hw { | |||
306 | uint32_t pib_del_Q_addr; | 299 | uint32_t pib_del_Q_addr; |
307 | uint32_t pib_rel_Q_addr; | 300 | uint32_t pib_rel_Q_addr; |
308 | 301 | ||
309 | crystalhd_dioq_t *tx_freeq; | 302 | struct crystalhd_dioq *tx_freeq; |
310 | crystalhd_dioq_t *tx_actq; | 303 | struct crystalhd_dioq *tx_actq; |
311 | 304 | ||
312 | /* Rx DMA Engine Specific Locks */ | 305 | /* Rx DMA Engine Specific Locks */ |
313 | spinlock_t rx_lock; | 306 | spinlock_t rx_lock; |
314 | uint32_t rx_list_post_index; | 307 | uint32_t rx_list_post_index; |
315 | list_sts rx_list_sts[DMA_ENGINE_CNT]; | 308 | enum list_sts rx_list_sts[DMA_ENGINE_CNT]; |
316 | crystalhd_dioq_t *rx_rdyq; | 309 | struct crystalhd_dioq *rx_rdyq; |
317 | crystalhd_dioq_t *rx_freeq; | 310 | struct crystalhd_dioq *rx_freeq; |
318 | crystalhd_dioq_t *rx_actq; | 311 | struct crystalhd_dioq *rx_actq; |
319 | uint32_t stop_pending; | 312 | uint32_t stop_pending; |
320 | 313 | ||
321 | /* HW counters.. */ | 314 | /* HW counters.. */ |
@@ -364,35 +357,35 @@ struct crystalhd_hw { | |||
364 | 357 | ||
365 | 358 | ||
366 | /**** API Exposed to the other layers ****/ | 359 | /**** API Exposed to the other layers ****/ |
367 | BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, | 360 | enum BC_STATUS crystalhd_download_fw(struct crystalhd_adp *adp, |
368 | void *buffer, uint32_t sz); | 361 | void *buffer, uint32_t sz); |
369 | BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, BC_FW_CMD *fw_cmd); | 362 | enum BC_STATUS crystalhd_do_fw_cmd(struct crystalhd_hw *hw, struct BC_FW_CMD *fw_cmd); |
370 | bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw); | 363 | bool crystalhd_hw_interrupt(struct crystalhd_adp *adp, struct crystalhd_hw *hw); |
371 | BC_STATUS crystalhd_hw_open(struct crystalhd_hw *, struct crystalhd_adp *); | 364 | enum BC_STATUS crystalhd_hw_open(struct crystalhd_hw *, struct crystalhd_adp *); |
372 | BC_STATUS crystalhd_hw_close(struct crystalhd_hw *); | 365 | enum BC_STATUS crystalhd_hw_close(struct crystalhd_hw *); |
373 | BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *); | 366 | enum BC_STATUS crystalhd_hw_setup_dma_rings(struct crystalhd_hw *); |
374 | BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *); | 367 | enum BC_STATUS crystalhd_hw_free_dma_rings(struct crystalhd_hw *); |
375 | 368 | ||
376 | 369 | ||
377 | BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, crystalhd_dio_req *ioreq, | 370 | enum BC_STATUS crystalhd_hw_post_tx(struct crystalhd_hw *hw, struct crystalhd_dio_req *ioreq, |
378 | hw_comp_callback call_back, | 371 | hw_comp_callback call_back, |
379 | wait_queue_head_t *cb_event, | 372 | wait_queue_head_t *cb_event, |
380 | uint32_t *list_id, uint8_t data_flags); | 373 | uint32_t *list_id, uint8_t data_flags); |
381 | 374 | ||
382 | BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw); | 375 | enum BC_STATUS crystalhd_hw_pause(struct crystalhd_hw *hw); |
383 | BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw); | 376 | enum BC_STATUS crystalhd_hw_unpause(struct crystalhd_hw *hw); |
384 | BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw); | 377 | enum BC_STATUS crystalhd_hw_suspend(struct crystalhd_hw *hw); |
385 | BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id); | 378 | enum BC_STATUS crystalhd_hw_cancel_tx(struct crystalhd_hw *hw, uint32_t list_id); |
386 | BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, | 379 | enum BC_STATUS crystalhd_hw_add_cap_buffer(struct crystalhd_hw *hw, |
387 | crystalhd_dio_req *ioreq, bool en_post); | 380 | struct crystalhd_dio_req *ioreq, bool en_post); |
388 | BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, | 381 | enum BC_STATUS crystalhd_hw_get_cap_buffer(struct crystalhd_hw *hw, |
389 | BC_PIC_INFO_BLOCK *pib, | 382 | struct BC_PIC_INFO_BLOCK *pib, |
390 | crystalhd_dio_req **ioreq); | 383 | struct crystalhd_dio_req **ioreq); |
391 | BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw); | 384 | enum BC_STATUS crystalhd_hw_stop_capture(struct crystalhd_hw *hw); |
392 | BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw); | 385 | enum BC_STATUS crystalhd_hw_start_capture(struct crystalhd_hw *hw); |
393 | void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats); | 386 | void crystalhd_hw_stats(struct crystalhd_hw *hw, struct crystalhd_hw_stats *stats); |
394 | 387 | ||
395 | /* API to program the core clock on the decoder */ | 388 | /* API to program the core clock on the decoder */ |
396 | BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *); | 389 | enum BC_STATUS crystalhd_hw_set_core_clock(struct crystalhd_hw *); |
397 | 390 | ||
398 | #endif | 391 | #endif |
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.c b/drivers/staging/crystalhd/crystalhd_lnx.c index 141a3e38a83..a4ec891328c 100644 --- a/drivers/staging/crystalhd/crystalhd_lnx.c +++ b/drivers/staging/crystalhd/crystalhd_lnx.c | |||
@@ -73,10 +73,10 @@ static int chd_dec_disable_int(struct crystalhd_adp *adp) | |||
73 | return 0; | 73 | return 0; |
74 | } | 74 | } |
75 | 75 | ||
76 | crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr) | 76 | struct crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr) |
77 | { | 77 | { |
78 | unsigned long flags = 0; | 78 | unsigned long flags = 0; |
79 | crystalhd_ioctl_data *temp; | 79 | struct crystalhd_ioctl_data *temp; |
80 | 80 | ||
81 | if (!adp) | 81 | if (!adp) |
82 | return NULL; | 82 | return NULL; |
@@ -93,7 +93,7 @@ crystalhd_ioctl_data *chd_dec_alloc_iodata(struct crystalhd_adp *adp, bool isr) | |||
93 | return temp; | 93 | return temp; |
94 | } | 94 | } |
95 | 95 | ||
96 | void chd_dec_free_iodata(struct crystalhd_adp *adp, crystalhd_ioctl_data *iodata, | 96 | void chd_dec_free_iodata(struct crystalhd_adp *adp, struct crystalhd_ioctl_data *iodata, |
97 | bool isr) | 97 | bool isr) |
98 | { | 98 | { |
99 | unsigned long flags = 0; | 99 | unsigned long flags = 0; |
@@ -129,7 +129,7 @@ static inline int crystalhd_user_data(unsigned long ud, void *dr, int size, int | |||
129 | return rc; | 129 | return rc; |
130 | } | 130 | } |
131 | 131 | ||
132 | static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, crystalhd_ioctl_data *io, | 132 | static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, struct crystalhd_ioctl_data *io, |
133 | uint32_t m_sz, unsigned long ua) | 133 | uint32_t m_sz, unsigned long ua) |
134 | { | 134 | { |
135 | unsigned long ua_off; | 135 | unsigned long ua_off; |
@@ -163,7 +163,7 @@ static int chd_dec_fetch_cdata(struct crystalhd_adp *adp, crystalhd_ioctl_data * | |||
163 | } | 163 | } |
164 | 164 | ||
165 | static int chd_dec_release_cdata(struct crystalhd_adp *adp, | 165 | static int chd_dec_release_cdata(struct crystalhd_adp *adp, |
166 | crystalhd_ioctl_data *io, unsigned long ua) | 166 | struct crystalhd_ioctl_data *io, unsigned long ua) |
167 | { | 167 | { |
168 | unsigned long ua_off; | 168 | unsigned long ua_off; |
169 | int rc; | 169 | int rc; |
@@ -193,7 +193,7 @@ static int chd_dec_release_cdata(struct crystalhd_adp *adp, | |||
193 | } | 193 | } |
194 | 194 | ||
195 | static int chd_dec_proc_user_data(struct crystalhd_adp *adp, | 195 | static int chd_dec_proc_user_data(struct crystalhd_adp *adp, |
196 | crystalhd_ioctl_data *io, | 196 | struct crystalhd_ioctl_data *io, |
197 | unsigned long ua, int set) | 197 | unsigned long ua, int set) |
198 | { | 198 | { |
199 | int rc; | 199 | int rc; |
@@ -231,8 +231,8 @@ static int chd_dec_api_cmd(struct crystalhd_adp *adp, unsigned long ua, | |||
231 | uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func) | 231 | uint32_t uid, uint32_t cmd, crystalhd_cmd_proc func) |
232 | { | 232 | { |
233 | int rc; | 233 | int rc; |
234 | crystalhd_ioctl_data *temp; | 234 | struct crystalhd_ioctl_data *temp; |
235 | BC_STATUS sts = BC_STS_SUCCESS; | 235 | enum BC_STATUS sts = BC_STS_SUCCESS; |
236 | 236 | ||
237 | temp = chd_dec_alloc_iodata(adp, 0); | 237 | temp = chd_dec_alloc_iodata(adp, 0); |
238 | if (!temp) { | 238 | if (!temp) { |
@@ -296,7 +296,7 @@ static int chd_dec_open(struct inode *in, struct file *fd) | |||
296 | { | 296 | { |
297 | struct crystalhd_adp *adp = chd_get_adp(); | 297 | struct crystalhd_adp *adp = chd_get_adp(); |
298 | int rc = 0; | 298 | int rc = 0; |
299 | BC_STATUS sts = BC_STS_SUCCESS; | 299 | enum BC_STATUS sts = BC_STS_SUCCESS; |
300 | struct crystalhd_user *uc = NULL; | 300 | struct crystalhd_user *uc = NULL; |
301 | 301 | ||
302 | BCMLOG_ENTER; | 302 | BCMLOG_ENTER; |
@@ -356,7 +356,7 @@ static const struct file_operations chd_dec_fops = { | |||
356 | 356 | ||
357 | static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) | 357 | static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) |
358 | { | 358 | { |
359 | crystalhd_ioctl_data *temp; | 359 | struct crystalhd_ioctl_data *temp; |
360 | struct device *dev; | 360 | struct device *dev; |
361 | int rc = -ENODEV, i = 0; | 361 | int rc = -ENODEV, i = 0; |
362 | 362 | ||
@@ -394,7 +394,7 @@ static int __devinit chd_dec_init_chdev(struct crystalhd_adp *adp) | |||
394 | /* Allocate general purpose ioctl pool. */ | 394 | /* Allocate general purpose ioctl pool. */ |
395 | for (i = 0; i < CHD_IODATA_POOL_SZ; i++) { | 395 | for (i = 0; i < CHD_IODATA_POOL_SZ; i++) { |
396 | /* FIXME: jarod: why atomic? */ | 396 | /* FIXME: jarod: why atomic? */ |
397 | temp = kzalloc(sizeof(crystalhd_ioctl_data), GFP_ATOMIC); | 397 | temp = kzalloc(sizeof(struct crystalhd_ioctl_data), GFP_ATOMIC); |
398 | if (!temp) { | 398 | if (!temp) { |
399 | BCMLOG_ERR("ioctl data pool kzalloc failed\n"); | 399 | BCMLOG_ERR("ioctl data pool kzalloc failed\n"); |
400 | rc = -ENOMEM; | 400 | rc = -ENOMEM; |
@@ -418,7 +418,7 @@ fail: | |||
418 | 418 | ||
419 | static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) | 419 | static void __devexit chd_dec_release_chdev(struct crystalhd_adp *adp) |
420 | { | 420 | { |
421 | crystalhd_ioctl_data *temp = NULL; | 421 | struct crystalhd_ioctl_data *temp = NULL; |
422 | if (!adp) | 422 | if (!adp) |
423 | return; | 423 | return; |
424 | 424 | ||
@@ -513,7 +513,7 @@ static void __devexit chd_pci_release_mem(struct crystalhd_adp *pinfo) | |||
513 | static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) | 513 | static void __devexit chd_dec_pci_remove(struct pci_dev *pdev) |
514 | { | 514 | { |
515 | struct crystalhd_adp *pinfo; | 515 | struct crystalhd_adp *pinfo; |
516 | BC_STATUS sts = BC_STS_SUCCESS; | 516 | enum BC_STATUS sts = BC_STS_SUCCESS; |
517 | 517 | ||
518 | BCMLOG_ENTER; | 518 | BCMLOG_ENTER; |
519 | 519 | ||
@@ -543,7 +543,7 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, | |||
543 | { | 543 | { |
544 | struct crystalhd_adp *pinfo; | 544 | struct crystalhd_adp *pinfo; |
545 | int rc; | 545 | int rc; |
546 | BC_STATUS sts = BC_STS_SUCCESS; | 546 | enum BC_STATUS sts = BC_STS_SUCCESS; |
547 | 547 | ||
548 | BCMLOG(BCMLOG_DBG, "PCI_INFO: Vendor:0x%04x Device:0x%04x " | 548 | BCMLOG(BCMLOG_DBG, "PCI_INFO: Vendor:0x%04x Device:0x%04x " |
549 | "s_vendor:0x%04x s_device: 0x%04x\n", | 549 | "s_vendor:0x%04x s_device: 0x%04x\n", |
@@ -623,8 +623,8 @@ static int __devinit chd_dec_pci_probe(struct pci_dev *pdev, | |||
623 | int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state) | 623 | int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state) |
624 | { | 624 | { |
625 | struct crystalhd_adp *adp; | 625 | struct crystalhd_adp *adp; |
626 | crystalhd_ioctl_data *temp; | 626 | struct crystalhd_ioctl_data *temp; |
627 | BC_STATUS sts = BC_STS_SUCCESS; | 627 | enum BC_STATUS sts = BC_STS_SUCCESS; |
628 | 628 | ||
629 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); | 629 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); |
630 | if (!adp) { | 630 | if (!adp) { |
@@ -657,7 +657,7 @@ int chd_dec_pci_suspend(struct pci_dev *pdev, pm_message_t state) | |||
657 | int chd_dec_pci_resume(struct pci_dev *pdev) | 657 | int chd_dec_pci_resume(struct pci_dev *pdev) |
658 | { | 658 | { |
659 | struct crystalhd_adp *adp; | 659 | struct crystalhd_adp *adp; |
660 | BC_STATUS sts = BC_STS_SUCCESS; | 660 | enum BC_STATUS sts = BC_STS_SUCCESS; |
661 | int rc; | 661 | int rc; |
662 | 662 | ||
663 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); | 663 | adp = (struct crystalhd_adp *)pci_get_drvdata(pdev); |
diff --git a/drivers/staging/crystalhd/crystalhd_lnx.h b/drivers/staging/crystalhd/crystalhd_lnx.h index eee4926f04e..c951e43cbb3 100644 --- a/drivers/staging/crystalhd/crystalhd_lnx.h +++ b/drivers/staging/crystalhd/crystalhd_lnx.h | |||
@@ -79,12 +79,12 @@ struct crystalhd_adp { | |||
79 | unsigned int chd_dec_major; | 79 | unsigned int chd_dec_major; |
80 | unsigned int cfg_users; | 80 | unsigned int cfg_users; |
81 | 81 | ||
82 | crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */ | 82 | struct crystalhd_ioctl_data *idata_free_head; /* ioctl data pool */ |
83 | crystalhd_elem_t *elem_pool_head; /* Queue element pool */ | 83 | struct crystalhd_elem *elem_pool_head; /* Queue element pool */ |
84 | 84 | ||
85 | struct crystalhd_cmd cmds; | 85 | struct crystalhd_cmd cmds; |
86 | 86 | ||
87 | crystalhd_dio_req *ua_map_free_head; | 87 | struct crystalhd_dio_req *ua_map_free_head; |
88 | struct pci_pool *fill_byte_pool; | 88 | struct pci_pool *fill_byte_pool; |
89 | }; | 89 | }; |
90 | 90 | ||
diff --git a/drivers/staging/crystalhd/crystalhd_misc.c b/drivers/staging/crystalhd/crystalhd_misc.c index 548dc09f249..2c5138e4e1b 100644 --- a/drivers/staging/crystalhd/crystalhd_misc.c +++ b/drivers/staging/crystalhd/crystalhd_misc.c | |||
@@ -43,15 +43,15 @@ static inline void crystalhd_dram_wr(struct crystalhd_adp *adp, uint32_t mem_off | |||
43 | bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val); | 43 | bc_dec_reg_wr(adp, (0x00380000 | (mem_off & 0x0007FFFF)), val); |
44 | } | 44 | } |
45 | 45 | ||
46 | static inline BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp, uint32_t start_off, uint32_t cnt) | 46 | static inline enum BC_STATUS bc_chk_dram_range(struct crystalhd_adp *adp, uint32_t start_off, uint32_t cnt) |
47 | { | 47 | { |
48 | return BC_STS_SUCCESS; | 48 | return BC_STS_SUCCESS; |
49 | } | 49 | } |
50 | 50 | ||
51 | static crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp) | 51 | static struct crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp) |
52 | { | 52 | { |
53 | unsigned long flags = 0; | 53 | unsigned long flags = 0; |
54 | crystalhd_dio_req *temp = NULL; | 54 | struct crystalhd_dio_req *temp = NULL; |
55 | 55 | ||
56 | if (!adp) { | 56 | if (!adp) { |
57 | BCMLOG_ERR("Invalid Arg!!\n"); | 57 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -67,7 +67,7 @@ static crystalhd_dio_req *crystalhd_alloc_dio(struct crystalhd_adp *adp) | |||
67 | return temp; | 67 | return temp; |
68 | } | 68 | } |
69 | 69 | ||
70 | static void crystalhd_free_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) | 70 | static void crystalhd_free_dio(struct crystalhd_adp *adp, struct crystalhd_dio_req *dio) |
71 | { | 71 | { |
72 | unsigned long flags = 0; | 72 | unsigned long flags = 0; |
73 | 73 | ||
@@ -83,10 +83,10 @@ static void crystalhd_free_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio | |||
83 | spin_unlock_irqrestore(&adp->lock, flags); | 83 | spin_unlock_irqrestore(&adp->lock, flags); |
84 | } | 84 | } |
85 | 85 | ||
86 | static crystalhd_elem_t *crystalhd_alloc_elem(struct crystalhd_adp *adp) | 86 | static struct crystalhd_elem *crystalhd_alloc_elem(struct crystalhd_adp *adp) |
87 | { | 87 | { |
88 | unsigned long flags = 0; | 88 | unsigned long flags = 0; |
89 | crystalhd_elem_t *temp = NULL; | 89 | struct crystalhd_elem *temp = NULL; |
90 | 90 | ||
91 | if (!adp) | 91 | if (!adp) |
92 | return temp; | 92 | return temp; |
@@ -100,7 +100,7 @@ static crystalhd_elem_t *crystalhd_alloc_elem(struct crystalhd_adp *adp) | |||
100 | 100 | ||
101 | return temp; | 101 | return temp; |
102 | } | 102 | } |
103 | static void crystalhd_free_elem(struct crystalhd_adp *adp, crystalhd_elem_t *elem) | 103 | static void crystalhd_free_elem(struct crystalhd_adp *adp, struct crystalhd_elem *elem) |
104 | { | 104 | { |
105 | unsigned long flags = 0; | 105 | unsigned long flags = 0; |
106 | 106 | ||
@@ -230,7 +230,7 @@ void crystalhd_reg_wr(struct crystalhd_adp *adp, uint32_t reg_off, uint32_t val) | |||
230 | * | 230 | * |
231 | * 7412's Dram read routine. | 231 | * 7412's Dram read routine. |
232 | */ | 232 | */ |
233 | BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, | 233 | enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, |
234 | uint32_t dw_cnt, uint32_t *rd_buff) | 234 | uint32_t dw_cnt, uint32_t *rd_buff) |
235 | { | 235 | { |
236 | uint32_t ix = 0; | 236 | uint32_t ix = 0; |
@@ -258,7 +258,7 @@ BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *adp, uint32_t start_off, | |||
258 | * | 258 | * |
259 | * 7412's Dram write routine. | 259 | * 7412's Dram write routine. |
260 | */ | 260 | */ |
261 | BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, | 261 | enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, |
262 | uint32_t dw_cnt, uint32_t *wr_buff) | 262 | uint32_t dw_cnt, uint32_t *wr_buff) |
263 | { | 263 | { |
264 | uint32_t ix = 0; | 264 | uint32_t ix = 0; |
@@ -286,10 +286,10 @@ BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *adp, uint32_t start_off, | |||
286 | * | 286 | * |
287 | * Get value from Link's PCIe config space. | 287 | * Get value from Link's PCIe config space. |
288 | */ | 288 | */ |
289 | BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, | 289 | enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, |
290 | uint32_t len, uint32_t *val) | 290 | uint32_t len, uint32_t *val) |
291 | { | 291 | { |
292 | BC_STATUS sts = BC_STS_SUCCESS; | 292 | enum BC_STATUS sts = BC_STS_SUCCESS; |
293 | int rc = 0; | 293 | int rc = 0; |
294 | 294 | ||
295 | if (!adp || !val) { | 295 | if (!adp || !val) { |
@@ -331,10 +331,10 @@ BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *adp, uint32_t off, | |||
331 | * | 331 | * |
332 | * Set value to Link's PCIe config space. | 332 | * Set value to Link's PCIe config space. |
333 | */ | 333 | */ |
334 | BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off, | 334 | enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *adp, uint32_t off, |
335 | uint32_t len, uint32_t val) | 335 | uint32_t len, uint32_t val) |
336 | { | 336 | { |
337 | BC_STATUS sts = BC_STS_SUCCESS; | 337 | enum BC_STATUS sts = BC_STS_SUCCESS; |
338 | int rc = 0; | 338 | int rc = 0; |
339 | 339 | ||
340 | if (!adp || !val) { | 340 | if (!adp || !val) { |
@@ -429,11 +429,11 @@ void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t sz, void *ka, | |||
429 | * Initialize Generic DIO queue to hold any data. Callback | 429 | * Initialize Generic DIO queue to hold any data. Callback |
430 | * will be used to free elements while deleting the queue. | 430 | * will be used to free elements while deleting the queue. |
431 | */ | 431 | */ |
432 | BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, | 432 | enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, |
433 | crystalhd_dioq_t **dioq_hnd, | 433 | struct crystalhd_dioq **dioq_hnd, |
434 | crystalhd_data_free_cb cb, void *cbctx) | 434 | crystalhd_data_free_cb cb, void *cbctx) |
435 | { | 435 | { |
436 | crystalhd_dioq_t *dioq = NULL; | 436 | struct crystalhd_dioq *dioq = NULL; |
437 | 437 | ||
438 | if (!adp || !dioq_hnd) { | 438 | if (!adp || !dioq_hnd) { |
439 | BCMLOG_ERR("Invalid arg!!\n"); | 439 | BCMLOG_ERR("Invalid arg!!\n"); |
@@ -446,8 +446,8 @@ BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, | |||
446 | 446 | ||
447 | spin_lock_init(&dioq->lock); | 447 | spin_lock_init(&dioq->lock); |
448 | dioq->sig = BC_LINK_DIOQ_SIG; | 448 | dioq->sig = BC_LINK_DIOQ_SIG; |
449 | dioq->head = (crystalhd_elem_t *)&dioq->head; | 449 | dioq->head = (struct crystalhd_elem *)&dioq->head; |
450 | dioq->tail = (crystalhd_elem_t *)&dioq->head; | 450 | dioq->tail = (struct crystalhd_elem *)&dioq->head; |
451 | crystalhd_create_event(&dioq->event); | 451 | crystalhd_create_event(&dioq->event); |
452 | dioq->adp = adp; | 452 | dioq->adp = adp; |
453 | dioq->data_rel_cb = cb; | 453 | dioq->data_rel_cb = cb; |
@@ -470,7 +470,7 @@ BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *adp, | |||
470 | * by calling the call back provided during creation. | 470 | * by calling the call back provided during creation. |
471 | * | 471 | * |
472 | */ | 472 | */ |
473 | void crystalhd_delete_dioq(struct crystalhd_adp *adp, crystalhd_dioq_t *dioq) | 473 | void crystalhd_delete_dioq(struct crystalhd_adp *adp, struct crystalhd_dioq *dioq) |
474 | { | 474 | { |
475 | void *temp; | 475 | void *temp; |
476 | 476 | ||
@@ -498,11 +498,11 @@ void crystalhd_delete_dioq(struct crystalhd_adp *adp, crystalhd_dioq_t *dioq) | |||
498 | * | 498 | * |
499 | * Insert new element to Q tail. | 499 | * Insert new element to Q tail. |
500 | */ | 500 | */ |
501 | BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, | 501 | enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data, |
502 | bool wake, uint32_t tag) | 502 | bool wake, uint32_t tag) |
503 | { | 503 | { |
504 | unsigned long flags = 0; | 504 | unsigned long flags = 0; |
505 | crystalhd_elem_t *tmp; | 505 | struct crystalhd_elem *tmp; |
506 | 506 | ||
507 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) { | 507 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG) || !data) { |
508 | BCMLOG_ERR("Invalid arg!!\n"); | 508 | BCMLOG_ERR("Invalid arg!!\n"); |
@@ -518,7 +518,7 @@ BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, | |||
518 | tmp->data = data; | 518 | tmp->data = data; |
519 | tmp->tag = tag; | 519 | tmp->tag = tag; |
520 | spin_lock_irqsave(&ioq->lock, flags); | 520 | spin_lock_irqsave(&ioq->lock, flags); |
521 | tmp->flink = (crystalhd_elem_t *)&ioq->head; | 521 | tmp->flink = (struct crystalhd_elem *)&ioq->head; |
522 | tmp->blink = ioq->tail; | 522 | tmp->blink = ioq->tail; |
523 | tmp->flink->blink = tmp; | 523 | tmp->flink->blink = tmp; |
524 | tmp->blink->flink = tmp; | 524 | tmp->blink->flink = tmp; |
@@ -540,11 +540,11 @@ BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, | |||
540 | * | 540 | * |
541 | * Remove an element from Queue. | 541 | * Remove an element from Queue. |
542 | */ | 542 | */ |
543 | void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq) | 543 | void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq) |
544 | { | 544 | { |
545 | unsigned long flags = 0; | 545 | unsigned long flags = 0; |
546 | crystalhd_elem_t *tmp; | 546 | struct crystalhd_elem *tmp; |
547 | crystalhd_elem_t *ret = NULL; | 547 | struct crystalhd_elem *ret = NULL; |
548 | void *data = NULL; | 548 | void *data = NULL; |
549 | 549 | ||
550 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { | 550 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { |
@@ -554,7 +554,7 @@ void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq) | |||
554 | 554 | ||
555 | spin_lock_irqsave(&ioq->lock, flags); | 555 | spin_lock_irqsave(&ioq->lock, flags); |
556 | tmp = ioq->head; | 556 | tmp = ioq->head; |
557 | if (tmp != (crystalhd_elem_t *)&ioq->head) { | 557 | if (tmp != (struct crystalhd_elem *)&ioq->head) { |
558 | ret = tmp; | 558 | ret = tmp; |
559 | tmp->flink->blink = tmp->blink; | 559 | tmp->flink->blink = tmp->blink; |
560 | tmp->blink->flink = tmp->flink; | 560 | tmp->blink->flink = tmp->flink; |
@@ -578,11 +578,11 @@ void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq) | |||
578 | * | 578 | * |
579 | * Search TAG and remove the element. | 579 | * Search TAG and remove the element. |
580 | */ | 580 | */ |
581 | void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag) | 581 | void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag) |
582 | { | 582 | { |
583 | unsigned long flags = 0; | 583 | unsigned long flags = 0; |
584 | crystalhd_elem_t *tmp; | 584 | struct crystalhd_elem *tmp; |
585 | crystalhd_elem_t *ret = NULL; | 585 | struct crystalhd_elem *ret = NULL; |
586 | void *data = NULL; | 586 | void *data = NULL; |
587 | 587 | ||
588 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { | 588 | if (!ioq || (ioq->sig != BC_LINK_DIOQ_SIG)) { |
@@ -592,7 +592,7 @@ void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag) | |||
592 | 592 | ||
593 | spin_lock_irqsave(&ioq->lock, flags); | 593 | spin_lock_irqsave(&ioq->lock, flags); |
594 | tmp = ioq->head; | 594 | tmp = ioq->head; |
595 | while (tmp != (crystalhd_elem_t *)&ioq->head) { | 595 | while (tmp != (struct crystalhd_elem *)&ioq->head) { |
596 | if (tmp->tag == tag) { | 596 | if (tmp->tag == tag) { |
597 | ret = tmp; | 597 | ret = tmp; |
598 | tmp->flink->blink = tmp->blink; | 598 | tmp->flink->blink = tmp->blink; |
@@ -623,7 +623,7 @@ void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag) | |||
623 | * Return element from head if Q is not empty. Wait for new element | 623 | * Return element from head if Q is not empty. Wait for new element |
624 | * if Q is empty for Timeout seconds. | 624 | * if Q is empty for Timeout seconds. |
625 | */ | 625 | */ |
626 | void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, | 626 | void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs, |
627 | uint32_t *sig_pend) | 627 | uint32_t *sig_pend) |
628 | { | 628 | { |
629 | unsigned long flags = 0; | 629 | unsigned long flags = 0; |
@@ -673,12 +673,12 @@ out: | |||
673 | * This routine maps user address and lock pages for DMA. | 673 | * This routine maps user address and lock pages for DMA. |
674 | * | 674 | * |
675 | */ | 675 | */ |
676 | BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, | 676 | enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, |
677 | uint32_t ubuff_sz, uint32_t uv_offset, | 677 | uint32_t ubuff_sz, uint32_t uv_offset, |
678 | bool en_422mode, bool dir_tx, | 678 | bool en_422mode, bool dir_tx, |
679 | crystalhd_dio_req **dio_hnd) | 679 | struct crystalhd_dio_req **dio_hnd) |
680 | { | 680 | { |
681 | crystalhd_dio_req *dio; | 681 | struct crystalhd_dio_req *dio; |
682 | /* FIXME: jarod: should some of these unsigned longs be uint32_t or uintptr_t? */ | 682 | /* FIXME: jarod: should some of these unsigned longs be uint32_t or uintptr_t? */ |
683 | unsigned long start = 0, end = 0, uaddr = 0, count = 0; | 683 | unsigned long start = 0, end = 0, uaddr = 0, count = 0; |
684 | unsigned long spsz = 0, uv_start = 0; | 684 | unsigned long spsz = 0, uv_start = 0; |
@@ -820,7 +820,7 @@ BC_STATUS crystalhd_map_dio(struct crystalhd_adp *adp, void *ubuff, | |||
820 | * | 820 | * |
821 | * This routine is to unmap the user buffer pages. | 821 | * This routine is to unmap the user buffer pages. |
822 | */ | 822 | */ |
823 | BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, crystalhd_dio_req *dio) | 823 | enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *adp, struct crystalhd_dio_req *dio) |
824 | { | 824 | { |
825 | struct page *page = NULL; | 825 | struct page *page = NULL; |
826 | int j = 0; | 826 | int j = 0; |
@@ -864,7 +864,7 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages) | |||
864 | { | 864 | { |
865 | uint32_t asz = 0, i = 0; | 865 | uint32_t asz = 0, i = 0; |
866 | uint8_t *temp; | 866 | uint8_t *temp; |
867 | crystalhd_dio_req *dio; | 867 | struct crystalhd_dio_req *dio; |
868 | 868 | ||
869 | if (!adp || !max_pages) { | 869 | if (!adp || !max_pages) { |
870 | BCMLOG_ERR("Invalid Arg!!\n"); | 870 | BCMLOG_ERR("Invalid Arg!!\n"); |
@@ -893,7 +893,7 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages) | |||
893 | return -ENOMEM; | 893 | return -ENOMEM; |
894 | } | 894 | } |
895 | 895 | ||
896 | dio = (crystalhd_dio_req *)temp; | 896 | dio = (struct crystalhd_dio_req *)temp; |
897 | temp += sizeof(*dio); | 897 | temp += sizeof(*dio); |
898 | dio->pages = (struct page **)temp; | 898 | dio->pages = (struct page **)temp; |
899 | temp += (sizeof(*dio->pages) * max_pages); | 899 | temp += (sizeof(*dio->pages) * max_pages); |
@@ -923,7 +923,7 @@ int crystalhd_create_dio_pool(struct crystalhd_adp *adp, uint32_t max_pages) | |||
923 | */ | 923 | */ |
924 | void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp) | 924 | void crystalhd_destroy_dio_pool(struct crystalhd_adp *adp) |
925 | { | 925 | { |
926 | crystalhd_dio_req *dio; | 926 | struct crystalhd_dio_req *dio; |
927 | int count = 0; | 927 | int count = 0; |
928 | 928 | ||
929 | if (!adp) { | 929 | if (!adp) { |
@@ -965,7 +965,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp, | |||
965 | uint32_t pool_size) | 965 | uint32_t pool_size) |
966 | { | 966 | { |
967 | uint32_t i; | 967 | uint32_t i; |
968 | crystalhd_elem_t *temp; | 968 | struct crystalhd_elem *temp; |
969 | 969 | ||
970 | if (!adp || !pool_size) | 970 | if (!adp || !pool_size) |
971 | return -EINVAL; | 971 | return -EINVAL; |
@@ -993,7 +993,7 @@ int __devinit crystalhd_create_elem_pool(struct crystalhd_adp *adp, | |||
993 | */ | 993 | */ |
994 | void crystalhd_delete_elem_pool(struct crystalhd_adp *adp) | 994 | void crystalhd_delete_elem_pool(struct crystalhd_adp *adp) |
995 | { | 995 | { |
996 | crystalhd_elem_t *temp; | 996 | struct crystalhd_elem *temp; |
997 | int dbg_cnt = 0; | 997 | int dbg_cnt = 0; |
998 | 998 | ||
999 | if (!adp) | 999 | if (!adp) |
diff --git a/drivers/staging/crystalhd/crystalhd_misc.h b/drivers/staging/crystalhd/crystalhd_misc.h index 84331cd3327..382078eafa0 100644 --- a/drivers/staging/crystalhd/crystalhd_misc.h +++ b/drivers/staging/crystalhd/crystalhd_misc.h | |||
@@ -54,7 +54,7 @@ extern uint32_t g_linklog_level; | |||
54 | /* Scatter Gather memory pool size for Tx and Rx */ | 54 | /* Scatter Gather memory pool size for Tx and Rx */ |
55 | #define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT) | 55 | #define BC_LINK_SG_POOL_SZ (BC_TX_LIST_CNT + BC_RX_LIST_CNT) |
56 | 56 | ||
57 | enum _crystalhd_dio_sig { | 57 | enum crystalhd_dio_sig { |
58 | crystalhd_dio_inv = 0, | 58 | crystalhd_dio_inv = 0, |
59 | crystalhd_dio_locked, | 59 | crystalhd_dio_locked, |
60 | crystalhd_dio_sg_mapped, | 60 | crystalhd_dio_sg_mapped, |
@@ -76,7 +76,7 @@ struct crystalhd_dio_user_info { | |||
76 | bool b422mode; | 76 | bool b422mode; |
77 | }; | 77 | }; |
78 | 78 | ||
79 | typedef struct _crystalhd_dio_req { | 79 | struct crystalhd_dio_req { |
80 | uint32_t sig; | 80 | uint32_t sig; |
81 | uint32_t max_pages; | 81 | uint32_t max_pages; |
82 | struct page **pages; | 82 | struct page **pages; |
@@ -88,34 +88,34 @@ typedef struct _crystalhd_dio_req { | |||
88 | void *fb_va; | 88 | void *fb_va; |
89 | uint32_t fb_size; | 89 | uint32_t fb_size; |
90 | dma_addr_t fb_pa; | 90 | dma_addr_t fb_pa; |
91 | struct _crystalhd_dio_req *next; | 91 | struct crystalhd_dio_req *next; |
92 | } crystalhd_dio_req; | 92 | }; |
93 | 93 | ||
94 | #define BC_LINK_DIOQ_SIG (0x09223280) | 94 | #define BC_LINK_DIOQ_SIG (0x09223280) |
95 | 95 | ||
96 | typedef struct _crystalhd_elem_s { | 96 | struct crystalhd_elem { |
97 | struct _crystalhd_elem_s *flink; | 97 | struct crystalhd_elem *flink; |
98 | struct _crystalhd_elem_s *blink; | 98 | struct crystalhd_elem *blink; |
99 | void *data; | 99 | void *data; |
100 | uint32_t tag; | 100 | uint32_t tag; |
101 | } crystalhd_elem_t; | 101 | }; |
102 | 102 | ||
103 | typedef void (*crystalhd_data_free_cb)(void *context, void *data); | 103 | typedef void (*crystalhd_data_free_cb)(void *context, void *data); |
104 | 104 | ||
105 | typedef struct _crystalhd_dioq_s { | 105 | struct crystalhd_dioq { |
106 | uint32_t sig; | 106 | uint32_t sig; |
107 | struct crystalhd_adp *adp; | 107 | struct crystalhd_adp *adp; |
108 | crystalhd_elem_t *head; | 108 | struct crystalhd_elem *head; |
109 | crystalhd_elem_t *tail; | 109 | struct crystalhd_elem *tail; |
110 | uint32_t count; | 110 | uint32_t count; |
111 | spinlock_t lock; | 111 | spinlock_t lock; |
112 | wait_queue_head_t event; | 112 | wait_queue_head_t event; |
113 | crystalhd_data_free_cb data_rel_cb; | 113 | crystalhd_data_free_cb data_rel_cb; |
114 | void *cb_context; | 114 | void *cb_context; |
115 | } crystalhd_dioq_t; | 115 | }; |
116 | 116 | ||
117 | typedef void (*hw_comp_callback)(crystalhd_dio_req *, | 117 | typedef void (*hw_comp_callback)(struct crystalhd_dio_req *, |
118 | wait_queue_head_t *event, BC_STATUS sts); | 118 | wait_queue_head_t *event, enum BC_STATUS sts); |
119 | 119 | ||
120 | /*========= Decoder (7412) register access routines.================= */ | 120 | /*========= Decoder (7412) register access routines.================= */ |
121 | uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t); | 121 | uint32_t bc_dec_reg_rd(struct crystalhd_adp *, uint32_t); |
@@ -126,12 +126,12 @@ uint32_t crystalhd_reg_rd(struct crystalhd_adp *, uint32_t); | |||
126 | void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t); | 126 | void crystalhd_reg_wr(struct crystalhd_adp *, uint32_t, uint32_t); |
127 | 127 | ||
128 | /*========= Decoder (7412) memory access routines..=================*/ | 128 | /*========= Decoder (7412) memory access routines..=================*/ |
129 | BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | 129 | enum BC_STATUS crystalhd_mem_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); |
130 | BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | 130 | enum BC_STATUS crystalhd_mem_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); |
131 | 131 | ||
132 | /*==========Link (70012) PCIe Config access routines.================*/ | 132 | /*==========Link (70012) PCIe Config access routines.================*/ |
133 | BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); | 133 | enum BC_STATUS crystalhd_pci_cfg_rd(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t *); |
134 | BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t); | 134 | enum BC_STATUS crystalhd_pci_cfg_wr(struct crystalhd_adp *, uint32_t, uint32_t, uint32_t); |
135 | 135 | ||
136 | /*========= Linux Kernel Interface routines. ======================= */ | 136 | /*========= Linux Kernel Interface routines. ======================= */ |
137 | void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *); | 137 | void *bc_kern_dma_alloc(struct crystalhd_adp *, uint32_t, dma_addr_t *); |
@@ -167,20 +167,20 @@ do { \ | |||
167 | /*================ Direct IO mapping routines ==================*/ | 167 | /*================ Direct IO mapping routines ==================*/ |
168 | extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t); | 168 | extern int crystalhd_create_dio_pool(struct crystalhd_adp *, uint32_t); |
169 | extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *); | 169 | extern void crystalhd_destroy_dio_pool(struct crystalhd_adp *); |
170 | extern BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t, | 170 | extern enum BC_STATUS crystalhd_map_dio(struct crystalhd_adp *, void *, uint32_t, |
171 | uint32_t, bool, bool, crystalhd_dio_req**); | 171 | uint32_t, bool, bool, struct crystalhd_dio_req**); |
172 | 172 | ||
173 | extern BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, crystalhd_dio_req*); | 173 | extern enum BC_STATUS crystalhd_unmap_dio(struct crystalhd_adp *, struct crystalhd_dio_req*); |
174 | #define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix]))) | 174 | #define crystalhd_get_sgle_paddr(_dio, _ix) (cpu_to_le64(sg_dma_address(&_dio->sg[_ix]))) |
175 | #define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix]))) | 175 | #define crystalhd_get_sgle_len(_dio, _ix) (cpu_to_le32(sg_dma_len(&_dio->sg[_ix]))) |
176 | 176 | ||
177 | /*================ General Purpose Queues ==================*/ | 177 | /*================ General Purpose Queues ==================*/ |
178 | extern BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, crystalhd_dioq_t **, crystalhd_data_free_cb , void *); | 178 | extern enum BC_STATUS crystalhd_create_dioq(struct crystalhd_adp *, struct crystalhd_dioq **, crystalhd_data_free_cb , void *); |
179 | extern void crystalhd_delete_dioq(struct crystalhd_adp *, crystalhd_dioq_t *); | 179 | extern void crystalhd_delete_dioq(struct crystalhd_adp *, struct crystalhd_dioq *); |
180 | extern BC_STATUS crystalhd_dioq_add(crystalhd_dioq_t *ioq, void *data, bool wake, uint32_t tag); | 180 | extern enum BC_STATUS crystalhd_dioq_add(struct crystalhd_dioq *ioq, void *data, bool wake, uint32_t tag); |
181 | extern void *crystalhd_dioq_fetch(crystalhd_dioq_t *ioq); | 181 | extern void *crystalhd_dioq_fetch(struct crystalhd_dioq *ioq); |
182 | extern void *crystalhd_dioq_find_and_fetch(crystalhd_dioq_t *ioq, uint32_t tag); | 182 | extern void *crystalhd_dioq_find_and_fetch(struct crystalhd_dioq *ioq, uint32_t tag); |
183 | extern void *crystalhd_dioq_fetch_wait(crystalhd_dioq_t *ioq, uint32_t to_secs, uint32_t *sig_pend); | 183 | extern void *crystalhd_dioq_fetch_wait(struct crystalhd_dioq *ioq, uint32_t to_secs, uint32_t *sig_pend); |
184 | 184 | ||
185 | #define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0) | 185 | #define crystalhd_dioq_count(_ioq) ((_ioq) ? _ioq->count : 0) |
186 | 186 | ||