aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/scsi/qla2xxx/qla_dbg.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/scsi/qla2xxx/qla_dbg.c')
-rw-r--r--drivers/scsi/qla2xxx/qla_dbg.c521
1 files changed, 511 insertions, 10 deletions
diff --git a/drivers/scsi/qla2xxx/qla_dbg.c b/drivers/scsi/qla2xxx/qla_dbg.c
index cdf06176354..e4c6b940993 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.c
+++ b/drivers/scsi/qla2xxx/qla_dbg.c
@@ -11,23 +11,23 @@
11 * ---------------------------------------------------------------------- 11 * ----------------------------------------------------------------------
12 * | Level | Last Value Used | Holes | 12 * | Level | Last Value Used | Holes |
13 * ---------------------------------------------------------------------- 13 * ----------------------------------------------------------------------
14 * | Module Init and Probe | 0x0116 | 0xfa | 14 * | Module Init and Probe | 0x011f | 0x4b,0xfa |
15 * | Mailbox commands | 0x112b | | 15 * | Mailbox commands | 0x1139 | 0x112c-0x112e |
16 * | Device Discovery | 0x2084 | | 16 * | Device Discovery | 0x2084 | |
17 * | Queue Command and IO tracing | 0x302f | 0x3008,0x302d, | 17 * | Queue Command and IO tracing | 0x302f | 0x3008 |
18 * | | | 0x302e | 18 * | | | 0x302d-0x302e |
19 * | DPC Thread | 0x401c | | 19 * | DPC Thread | 0x401c | |
20 * | Async Events | 0x5057 | 0x5052 | 20 * | Async Events | 0x5057 | 0x5052 |
21 * | Timer Routines | 0x6011 | 0x600e,0x600f | 21 * | Timer Routines | 0x6011 | 0x600e-0x600f |
22 * | User Space Interactions | 0x709e | 0x7018,0x702e | 22 * | User Space Interactions | 0x709e | 0x7018,0x702e |
23 * | | | 0x7039,0x7045 | 23 * | | | 0x7039,0x7045 |
24 * | Task Management | 0x803c | 0x8025-0x8026 | 24 * | Task Management | 0x803c | 0x8025-0x8026 |
25 * | | | 0x800b,0x8039 | 25 * | | | 0x800b,0x8039 |
26 * | AER/EEH | 0x900f | | 26 * | AER/EEH | 0x900f | |
27 * | Virtual Port | 0xa007 | | 27 * | Virtual Port | 0xa007 | |
28 * | ISP82XX Specific | 0xb052 | | 28 * | ISP82XX Specific | 0xb052 | |
29 * | MultiQ | 0xc00b | | 29 * | MultiQ | 0xc00c | |
30 * | Misc | 0xd00b | | 30 * | Misc | 0xd010 | |
31 * ---------------------------------------------------------------------- 31 * ----------------------------------------------------------------------
32 */ 32 */
33 33
@@ -453,7 +453,7 @@ qla25xx_copy_mq(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain)
453 struct qla2xxx_mq_chain *mq = ptr; 453 struct qla2xxx_mq_chain *mq = ptr;
454 struct device_reg_25xxmq __iomem *reg; 454 struct device_reg_25xxmq __iomem *reg;
455 455
456 if (!ha->mqenable) 456 if (!ha->mqenable || IS_QLA83XX(ha))
457 return ptr; 457 return ptr;
458 458
459 mq = ptr; 459 mq = ptr;
@@ -1729,6 +1729,507 @@ qla81xx_fw_dump_failed:
1729 spin_unlock_irqrestore(&ha->hardware_lock, flags); 1729 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1730} 1730}
1731 1731
1732void
1733qla83xx_fw_dump(scsi_qla_host_t *vha, int hardware_locked)
1734{
1735 int rval;
1736 uint32_t cnt, reg_data;
1737 uint32_t risc_address;
1738 struct qla_hw_data *ha = vha->hw;
1739 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1740 uint32_t __iomem *dmp_reg;
1741 uint32_t *iter_reg;
1742 uint16_t __iomem *mbx_reg;
1743 unsigned long flags;
1744 struct qla83xx_fw_dump *fw;
1745 uint32_t ext_mem_cnt;
1746 void *nxt, *nxt_chain;
1747 uint32_t *last_chain = NULL;
1748 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
1749
1750 risc_address = ext_mem_cnt = 0;
1751 flags = 0;
1752
1753 if (!hardware_locked)
1754 spin_lock_irqsave(&ha->hardware_lock, flags);
1755
1756 if (!ha->fw_dump) {
1757 ql_log(ql_log_warn, vha, 0xd00c,
1758 "No buffer available for dump!!!\n");
1759 goto qla83xx_fw_dump_failed;
1760 }
1761
1762 if (ha->fw_dumped) {
1763 ql_log(ql_log_warn, vha, 0xd00d,
1764 "Firmware has been previously dumped (%p) -- ignoring "
1765 "request...\n", ha->fw_dump);
1766 goto qla83xx_fw_dump_failed;
1767 }
1768 fw = &ha->fw_dump->isp.isp83;
1769 qla2xxx_prep_dump(ha, ha->fw_dump);
1770
1771 fw->host_status = htonl(RD_REG_DWORD(&reg->host_status));
1772
1773 /* Pause RISC. */
1774 rval = qla24xx_pause_risc(reg);
1775 if (rval != QLA_SUCCESS)
1776 goto qla83xx_fw_dump_failed_0;
1777
1778 WRT_REG_DWORD(&reg->iobase_addr, 0x6000);
1779 dmp_reg = &reg->iobase_window;
1780 reg_data = RD_REG_DWORD(dmp_reg);
1781 WRT_REG_DWORD(dmp_reg, 0);
1782
1783 dmp_reg = &reg->unused_4_1[0];
1784 reg_data = RD_REG_DWORD(dmp_reg);
1785 WRT_REG_DWORD(dmp_reg, 0);
1786
1787 WRT_REG_DWORD(&reg->iobase_addr, 0x6010);
1788 dmp_reg = &reg->unused_4_1[2];
1789 reg_data = RD_REG_DWORD(dmp_reg);
1790 WRT_REG_DWORD(dmp_reg, 0);
1791
1792 /* select PCR and disable ecc checking and correction */
1793 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1794 RD_REG_DWORD(&reg->iobase_addr);
1795 WRT_REG_DWORD(&reg->iobase_select, 0x60000000); /* write to F0h = PCR */
1796
1797 /* Host/Risc registers. */
1798 iter_reg = fw->host_risc_reg;
1799 iter_reg = qla24xx_read_window(reg, 0x7000, 16, iter_reg);
1800 iter_reg = qla24xx_read_window(reg, 0x7010, 16, iter_reg);
1801 qla24xx_read_window(reg, 0x7040, 16, iter_reg);
1802
1803 /* PCIe registers. */
1804 WRT_REG_DWORD(&reg->iobase_addr, 0x7C00);
1805 RD_REG_DWORD(&reg->iobase_addr);
1806 WRT_REG_DWORD(&reg->iobase_window, 0x01);
1807 dmp_reg = &reg->iobase_c4;
1808 fw->pcie_regs[0] = htonl(RD_REG_DWORD(dmp_reg++));
1809 fw->pcie_regs[1] = htonl(RD_REG_DWORD(dmp_reg++));
1810 fw->pcie_regs[2] = htonl(RD_REG_DWORD(dmp_reg));
1811 fw->pcie_regs[3] = htonl(RD_REG_DWORD(&reg->iobase_window));
1812
1813 WRT_REG_DWORD(&reg->iobase_window, 0x00);
1814 RD_REG_DWORD(&reg->iobase_window);
1815
1816 /* Host interface registers. */
1817 dmp_reg = &reg->flash_addr;
1818 for (cnt = 0; cnt < sizeof(fw->host_reg) / 4; cnt++)
1819 fw->host_reg[cnt] = htonl(RD_REG_DWORD(dmp_reg++));
1820
1821 /* Disable interrupts. */
1822 WRT_REG_DWORD(&reg->ictrl, 0);
1823 RD_REG_DWORD(&reg->ictrl);
1824
1825 /* Shadow registers. */
1826 WRT_REG_DWORD(&reg->iobase_addr, 0x0F70);
1827 RD_REG_DWORD(&reg->iobase_addr);
1828 WRT_REG_DWORD(&reg->iobase_select, 0xB0000000);
1829 fw->shadow_reg[0] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1830
1831 WRT_REG_DWORD(&reg->iobase_select, 0xB0100000);
1832 fw->shadow_reg[1] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1833
1834 WRT_REG_DWORD(&reg->iobase_select, 0xB0200000);
1835 fw->shadow_reg[2] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1836
1837 WRT_REG_DWORD(&reg->iobase_select, 0xB0300000);
1838 fw->shadow_reg[3] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1839
1840 WRT_REG_DWORD(&reg->iobase_select, 0xB0400000);
1841 fw->shadow_reg[4] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1842
1843 WRT_REG_DWORD(&reg->iobase_select, 0xB0500000);
1844 fw->shadow_reg[5] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1845
1846 WRT_REG_DWORD(&reg->iobase_select, 0xB0600000);
1847 fw->shadow_reg[6] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1848
1849 WRT_REG_DWORD(&reg->iobase_select, 0xB0700000);
1850 fw->shadow_reg[7] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1851
1852 WRT_REG_DWORD(&reg->iobase_select, 0xB0800000);
1853 fw->shadow_reg[8] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1854
1855 WRT_REG_DWORD(&reg->iobase_select, 0xB0900000);
1856 fw->shadow_reg[9] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1857
1858 WRT_REG_DWORD(&reg->iobase_select, 0xB0A00000);
1859 fw->shadow_reg[10] = htonl(RD_REG_DWORD(&reg->iobase_sdata));
1860
1861 /* RISC I/O register. */
1862 WRT_REG_DWORD(&reg->iobase_addr, 0x0010);
1863 fw->risc_io_reg = htonl(RD_REG_DWORD(&reg->iobase_window));
1864
1865 /* Mailbox registers. */
1866 mbx_reg = &reg->mailbox0;
1867 for (cnt = 0; cnt < sizeof(fw->mailbox_reg) / 2; cnt++)
1868 fw->mailbox_reg[cnt] = htons(RD_REG_WORD(mbx_reg++));
1869
1870 /* Transfer sequence registers. */
1871 iter_reg = fw->xseq_gp_reg;
1872 iter_reg = qla24xx_read_window(reg, 0xBE00, 16, iter_reg);
1873 iter_reg = qla24xx_read_window(reg, 0xBE10, 16, iter_reg);
1874 iter_reg = qla24xx_read_window(reg, 0xBE20, 16, iter_reg);
1875 iter_reg = qla24xx_read_window(reg, 0xBE30, 16, iter_reg);
1876 iter_reg = qla24xx_read_window(reg, 0xBE40, 16, iter_reg);
1877 iter_reg = qla24xx_read_window(reg, 0xBE50, 16, iter_reg);
1878 iter_reg = qla24xx_read_window(reg, 0xBE60, 16, iter_reg);
1879 iter_reg = qla24xx_read_window(reg, 0xBE70, 16, iter_reg);
1880 iter_reg = qla24xx_read_window(reg, 0xBF00, 16, iter_reg);
1881 iter_reg = qla24xx_read_window(reg, 0xBF10, 16, iter_reg);
1882 iter_reg = qla24xx_read_window(reg, 0xBF20, 16, iter_reg);
1883 iter_reg = qla24xx_read_window(reg, 0xBF30, 16, iter_reg);
1884 iter_reg = qla24xx_read_window(reg, 0xBF40, 16, iter_reg);
1885 iter_reg = qla24xx_read_window(reg, 0xBF50, 16, iter_reg);
1886 iter_reg = qla24xx_read_window(reg, 0xBF60, 16, iter_reg);
1887 qla24xx_read_window(reg, 0xBF70, 16, iter_reg);
1888
1889 iter_reg = fw->xseq_0_reg;
1890 iter_reg = qla24xx_read_window(reg, 0xBFC0, 16, iter_reg);
1891 iter_reg = qla24xx_read_window(reg, 0xBFD0, 16, iter_reg);
1892 qla24xx_read_window(reg, 0xBFE0, 16, iter_reg);
1893
1894 qla24xx_read_window(reg, 0xBFF0, 16, fw->xseq_1_reg);
1895
1896 qla24xx_read_window(reg, 0xBEF0, 16, fw->xseq_2_reg);
1897
1898 /* Receive sequence registers. */
1899 iter_reg = fw->rseq_gp_reg;
1900 iter_reg = qla24xx_read_window(reg, 0xFE00, 16, iter_reg);
1901 iter_reg = qla24xx_read_window(reg, 0xFE10, 16, iter_reg);
1902 iter_reg = qla24xx_read_window(reg, 0xFE20, 16, iter_reg);
1903 iter_reg = qla24xx_read_window(reg, 0xFE30, 16, iter_reg);
1904 iter_reg = qla24xx_read_window(reg, 0xFE40, 16, iter_reg);
1905 iter_reg = qla24xx_read_window(reg, 0xFE50, 16, iter_reg);
1906 iter_reg = qla24xx_read_window(reg, 0xFE60, 16, iter_reg);
1907 iter_reg = qla24xx_read_window(reg, 0xFE70, 16, iter_reg);
1908 iter_reg = qla24xx_read_window(reg, 0xFF00, 16, iter_reg);
1909 iter_reg = qla24xx_read_window(reg, 0xFF10, 16, iter_reg);
1910 iter_reg = qla24xx_read_window(reg, 0xFF20, 16, iter_reg);
1911 iter_reg = qla24xx_read_window(reg, 0xFF30, 16, iter_reg);
1912 iter_reg = qla24xx_read_window(reg, 0xFF40, 16, iter_reg);
1913 iter_reg = qla24xx_read_window(reg, 0xFF50, 16, iter_reg);
1914 iter_reg = qla24xx_read_window(reg, 0xFF60, 16, iter_reg);
1915 qla24xx_read_window(reg, 0xFF70, 16, iter_reg);
1916
1917 iter_reg = fw->rseq_0_reg;
1918 iter_reg = qla24xx_read_window(reg, 0xFFC0, 16, iter_reg);
1919 qla24xx_read_window(reg, 0xFFD0, 16, iter_reg);
1920
1921 qla24xx_read_window(reg, 0xFFE0, 16, fw->rseq_1_reg);
1922 qla24xx_read_window(reg, 0xFFF0, 16, fw->rseq_2_reg);
1923 qla24xx_read_window(reg, 0xFEF0, 16, fw->rseq_3_reg);
1924
1925 /* Auxiliary sequence registers. */
1926 iter_reg = fw->aseq_gp_reg;
1927 iter_reg = qla24xx_read_window(reg, 0xB000, 16, iter_reg);
1928 iter_reg = qla24xx_read_window(reg, 0xB010, 16, iter_reg);
1929 iter_reg = qla24xx_read_window(reg, 0xB020, 16, iter_reg);
1930 iter_reg = qla24xx_read_window(reg, 0xB030, 16, iter_reg);
1931 iter_reg = qla24xx_read_window(reg, 0xB040, 16, iter_reg);
1932 iter_reg = qla24xx_read_window(reg, 0xB050, 16, iter_reg);
1933 iter_reg = qla24xx_read_window(reg, 0xB060, 16, iter_reg);
1934 iter_reg = qla24xx_read_window(reg, 0xB070, 16, iter_reg);
1935 iter_reg = qla24xx_read_window(reg, 0xB100, 16, iter_reg);
1936 iter_reg = qla24xx_read_window(reg, 0xB110, 16, iter_reg);
1937 iter_reg = qla24xx_read_window(reg, 0xB120, 16, iter_reg);
1938 iter_reg = qla24xx_read_window(reg, 0xB130, 16, iter_reg);
1939 iter_reg = qla24xx_read_window(reg, 0xB140, 16, iter_reg);
1940 iter_reg = qla24xx_read_window(reg, 0xB150, 16, iter_reg);
1941 iter_reg = qla24xx_read_window(reg, 0xB160, 16, iter_reg);
1942 qla24xx_read_window(reg, 0xB170, 16, iter_reg);
1943
1944 iter_reg = fw->aseq_0_reg;
1945 iter_reg = qla24xx_read_window(reg, 0xB0C0, 16, iter_reg);
1946 qla24xx_read_window(reg, 0xB0D0, 16, iter_reg);
1947
1948 qla24xx_read_window(reg, 0xB0E0, 16, fw->aseq_1_reg);
1949 qla24xx_read_window(reg, 0xB0F0, 16, fw->aseq_2_reg);
1950 qla24xx_read_window(reg, 0xB1F0, 16, fw->aseq_3_reg);
1951
1952 /* Command DMA registers. */
1953 iter_reg = fw->cmd_dma_reg;
1954 iter_reg = qla24xx_read_window(reg, 0x7100, 16, iter_reg);
1955 iter_reg = qla24xx_read_window(reg, 0x7120, 16, iter_reg);
1956 iter_reg = qla24xx_read_window(reg, 0x7130, 16, iter_reg);
1957 qla24xx_read_window(reg, 0x71F0, 16, iter_reg);
1958
1959 /* Queues. */
1960 iter_reg = fw->req0_dma_reg;
1961 iter_reg = qla24xx_read_window(reg, 0x7200, 8, iter_reg);
1962 dmp_reg = &reg->iobase_q;
1963 for (cnt = 0; cnt < 7; cnt++)
1964 *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
1965
1966 iter_reg = fw->resp0_dma_reg;
1967 iter_reg = qla24xx_read_window(reg, 0x7300, 8, iter_reg);
1968 dmp_reg = &reg->iobase_q;
1969 for (cnt = 0; cnt < 7; cnt++)
1970 *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
1971
1972 iter_reg = fw->req1_dma_reg;
1973 iter_reg = qla24xx_read_window(reg, 0x7400, 8, iter_reg);
1974 dmp_reg = &reg->iobase_q;
1975 for (cnt = 0; cnt < 7; cnt++)
1976 *iter_reg++ = htonl(RD_REG_DWORD(dmp_reg++));
1977
1978 /* Transmit DMA registers. */
1979 iter_reg = fw->xmt0_dma_reg;
1980 iter_reg = qla24xx_read_window(reg, 0x7600, 16, iter_reg);
1981 qla24xx_read_window(reg, 0x7610, 16, iter_reg);
1982
1983 iter_reg = fw->xmt1_dma_reg;
1984 iter_reg = qla24xx_read_window(reg, 0x7620, 16, iter_reg);
1985 qla24xx_read_window(reg, 0x7630, 16, iter_reg);
1986
1987 iter_reg = fw->xmt2_dma_reg;
1988 iter_reg = qla24xx_read_window(reg, 0x7640, 16, iter_reg);
1989 qla24xx_read_window(reg, 0x7650, 16, iter_reg);
1990
1991 iter_reg = fw->xmt3_dma_reg;
1992 iter_reg = qla24xx_read_window(reg, 0x7660, 16, iter_reg);
1993 qla24xx_read_window(reg, 0x7670, 16, iter_reg);
1994
1995 iter_reg = fw->xmt4_dma_reg;
1996 iter_reg = qla24xx_read_window(reg, 0x7680, 16, iter_reg);
1997 qla24xx_read_window(reg, 0x7690, 16, iter_reg);
1998
1999 qla24xx_read_window(reg, 0x76A0, 16, fw->xmt_data_dma_reg);
2000
2001 /* Receive DMA registers. */
2002 iter_reg = fw->rcvt0_data_dma_reg;
2003 iter_reg = qla24xx_read_window(reg, 0x7700, 16, iter_reg);
2004 qla24xx_read_window(reg, 0x7710, 16, iter_reg);
2005
2006 iter_reg = fw->rcvt1_data_dma_reg;
2007 iter_reg = qla24xx_read_window(reg, 0x7720, 16, iter_reg);
2008 qla24xx_read_window(reg, 0x7730, 16, iter_reg);
2009
2010 /* RISC registers. */
2011 iter_reg = fw->risc_gp_reg;
2012 iter_reg = qla24xx_read_window(reg, 0x0F00, 16, iter_reg);
2013 iter_reg = qla24xx_read_window(reg, 0x0F10, 16, iter_reg);
2014 iter_reg = qla24xx_read_window(reg, 0x0F20, 16, iter_reg);
2015 iter_reg = qla24xx_read_window(reg, 0x0F30, 16, iter_reg);
2016 iter_reg = qla24xx_read_window(reg, 0x0F40, 16, iter_reg);
2017 iter_reg = qla24xx_read_window(reg, 0x0F50, 16, iter_reg);
2018 iter_reg = qla24xx_read_window(reg, 0x0F60, 16, iter_reg);
2019 qla24xx_read_window(reg, 0x0F70, 16, iter_reg);
2020
2021 /* Local memory controller registers. */
2022 iter_reg = fw->lmc_reg;
2023 iter_reg = qla24xx_read_window(reg, 0x3000, 16, iter_reg);
2024 iter_reg = qla24xx_read_window(reg, 0x3010, 16, iter_reg);
2025 iter_reg = qla24xx_read_window(reg, 0x3020, 16, iter_reg);
2026 iter_reg = qla24xx_read_window(reg, 0x3030, 16, iter_reg);
2027 iter_reg = qla24xx_read_window(reg, 0x3040, 16, iter_reg);
2028 iter_reg = qla24xx_read_window(reg, 0x3050, 16, iter_reg);
2029 iter_reg = qla24xx_read_window(reg, 0x3060, 16, iter_reg);
2030 qla24xx_read_window(reg, 0x3070, 16, iter_reg);
2031
2032 /* Fibre Protocol Module registers. */
2033 iter_reg = fw->fpm_hdw_reg;
2034 iter_reg = qla24xx_read_window(reg, 0x4000, 16, iter_reg);
2035 iter_reg = qla24xx_read_window(reg, 0x4010, 16, iter_reg);
2036 iter_reg = qla24xx_read_window(reg, 0x4020, 16, iter_reg);
2037 iter_reg = qla24xx_read_window(reg, 0x4030, 16, iter_reg);
2038 iter_reg = qla24xx_read_window(reg, 0x4040, 16, iter_reg);
2039 iter_reg = qla24xx_read_window(reg, 0x4050, 16, iter_reg);
2040 iter_reg = qla24xx_read_window(reg, 0x4060, 16, iter_reg);
2041 iter_reg = qla24xx_read_window(reg, 0x4070, 16, iter_reg);
2042 iter_reg = qla24xx_read_window(reg, 0x4080, 16, iter_reg);
2043 iter_reg = qla24xx_read_window(reg, 0x4090, 16, iter_reg);
2044 iter_reg = qla24xx_read_window(reg, 0x40A0, 16, iter_reg);
2045 iter_reg = qla24xx_read_window(reg, 0x40B0, 16, iter_reg);
2046 iter_reg = qla24xx_read_window(reg, 0x40C0, 16, iter_reg);
2047 iter_reg = qla24xx_read_window(reg, 0x40D0, 16, iter_reg);
2048 iter_reg = qla24xx_read_window(reg, 0x40E0, 16, iter_reg);
2049 qla24xx_read_window(reg, 0x40F0, 16, iter_reg);
2050
2051 /* RQ0 Array registers. */
2052 iter_reg = fw->rq0_array_reg;
2053 iter_reg = qla24xx_read_window(reg, 0x5C00, 16, iter_reg);
2054 iter_reg = qla24xx_read_window(reg, 0x5C10, 16, iter_reg);
2055 iter_reg = qla24xx_read_window(reg, 0x5C20, 16, iter_reg);
2056 iter_reg = qla24xx_read_window(reg, 0x5C30, 16, iter_reg);
2057 iter_reg = qla24xx_read_window(reg, 0x5C40, 16, iter_reg);
2058 iter_reg = qla24xx_read_window(reg, 0x5C50, 16, iter_reg);
2059 iter_reg = qla24xx_read_window(reg, 0x5C60, 16, iter_reg);
2060 iter_reg = qla24xx_read_window(reg, 0x5C70, 16, iter_reg);
2061 iter_reg = qla24xx_read_window(reg, 0x5C80, 16, iter_reg);
2062 iter_reg = qla24xx_read_window(reg, 0x5C90, 16, iter_reg);
2063 iter_reg = qla24xx_read_window(reg, 0x5CA0, 16, iter_reg);
2064 iter_reg = qla24xx_read_window(reg, 0x5CB0, 16, iter_reg);
2065 iter_reg = qla24xx_read_window(reg, 0x5CC0, 16, iter_reg);
2066 iter_reg = qla24xx_read_window(reg, 0x5CD0, 16, iter_reg);
2067 iter_reg = qla24xx_read_window(reg, 0x5CE0, 16, iter_reg);
2068 qla24xx_read_window(reg, 0x5CF0, 16, iter_reg);
2069
2070 /* RQ1 Array registers. */
2071 iter_reg = fw->rq1_array_reg;
2072 iter_reg = qla24xx_read_window(reg, 0x5D00, 16, iter_reg);
2073 iter_reg = qla24xx_read_window(reg, 0x5D10, 16, iter_reg);
2074 iter_reg = qla24xx_read_window(reg, 0x5D20, 16, iter_reg);
2075 iter_reg = qla24xx_read_window(reg, 0x5D30, 16, iter_reg);
2076 iter_reg = qla24xx_read_window(reg, 0x5D40, 16, iter_reg);
2077 iter_reg = qla24xx_read_window(reg, 0x5D50, 16, iter_reg);
2078 iter_reg = qla24xx_read_window(reg, 0x5D60, 16, iter_reg);
2079 iter_reg = qla24xx_read_window(reg, 0x5D70, 16, iter_reg);
2080 iter_reg = qla24xx_read_window(reg, 0x5D80, 16, iter_reg);
2081 iter_reg = qla24xx_read_window(reg, 0x5D90, 16, iter_reg);
2082 iter_reg = qla24xx_read_window(reg, 0x5DA0, 16, iter_reg);
2083 iter_reg = qla24xx_read_window(reg, 0x5DB0, 16, iter_reg);
2084 iter_reg = qla24xx_read_window(reg, 0x5DC0, 16, iter_reg);
2085 iter_reg = qla24xx_read_window(reg, 0x5DD0, 16, iter_reg);
2086 iter_reg = qla24xx_read_window(reg, 0x5DE0, 16, iter_reg);
2087 qla24xx_read_window(reg, 0x5DF0, 16, iter_reg);
2088
2089 /* RP0 Array registers. */
2090 iter_reg = fw->rp0_array_reg;
2091 iter_reg = qla24xx_read_window(reg, 0x5E00, 16, iter_reg);
2092 iter_reg = qla24xx_read_window(reg, 0x5E10, 16, iter_reg);
2093 iter_reg = qla24xx_read_window(reg, 0x5E20, 16, iter_reg);
2094 iter_reg = qla24xx_read_window(reg, 0x5E30, 16, iter_reg);
2095 iter_reg = qla24xx_read_window(reg, 0x5E40, 16, iter_reg);
2096 iter_reg = qla24xx_read_window(reg, 0x5E50, 16, iter_reg);
2097 iter_reg = qla24xx_read_window(reg, 0x5E60, 16, iter_reg);
2098 iter_reg = qla24xx_read_window(reg, 0x5E70, 16, iter_reg);
2099 iter_reg = qla24xx_read_window(reg, 0x5E80, 16, iter_reg);
2100 iter_reg = qla24xx_read_window(reg, 0x5E90, 16, iter_reg);
2101 iter_reg = qla24xx_read_window(reg, 0x5EA0, 16, iter_reg);
2102 iter_reg = qla24xx_read_window(reg, 0x5EB0, 16, iter_reg);
2103 iter_reg = qla24xx_read_window(reg, 0x5EC0, 16, iter_reg);
2104 iter_reg = qla24xx_read_window(reg, 0x5ED0, 16, iter_reg);
2105 iter_reg = qla24xx_read_window(reg, 0x5EE0, 16, iter_reg);
2106 qla24xx_read_window(reg, 0x5EF0, 16, iter_reg);
2107
2108 /* RP1 Array registers. */
2109 iter_reg = fw->rp1_array_reg;
2110 iter_reg = qla24xx_read_window(reg, 0x5F00, 16, iter_reg);
2111 iter_reg = qla24xx_read_window(reg, 0x5F10, 16, iter_reg);
2112 iter_reg = qla24xx_read_window(reg, 0x5F20, 16, iter_reg);
2113 iter_reg = qla24xx_read_window(reg, 0x5F30, 16, iter_reg);
2114 iter_reg = qla24xx_read_window(reg, 0x5F40, 16, iter_reg);
2115 iter_reg = qla24xx_read_window(reg, 0x5F50, 16, iter_reg);
2116 iter_reg = qla24xx_read_window(reg, 0x5F60, 16, iter_reg);
2117 iter_reg = qla24xx_read_window(reg, 0x5F70, 16, iter_reg);
2118 iter_reg = qla24xx_read_window(reg, 0x5F80, 16, iter_reg);
2119 iter_reg = qla24xx_read_window(reg, 0x5F90, 16, iter_reg);
2120 iter_reg = qla24xx_read_window(reg, 0x5FA0, 16, iter_reg);
2121 iter_reg = qla24xx_read_window(reg, 0x5FB0, 16, iter_reg);
2122 iter_reg = qla24xx_read_window(reg, 0x5FC0, 16, iter_reg);
2123 iter_reg = qla24xx_read_window(reg, 0x5FD0, 16, iter_reg);
2124 iter_reg = qla24xx_read_window(reg, 0x5FE0, 16, iter_reg);
2125 qla24xx_read_window(reg, 0x5FF0, 16, iter_reg);
2126
2127 iter_reg = fw->at0_array_reg;
2128 iter_reg = qla24xx_read_window(reg, 0x7080, 16, iter_reg);
2129 iter_reg = qla24xx_read_window(reg, 0x7090, 16, iter_reg);
2130 iter_reg = qla24xx_read_window(reg, 0x70A0, 16, iter_reg);
2131 iter_reg = qla24xx_read_window(reg, 0x70B0, 16, iter_reg);
2132 iter_reg = qla24xx_read_window(reg, 0x70C0, 16, iter_reg);
2133 iter_reg = qla24xx_read_window(reg, 0x70D0, 16, iter_reg);
2134 iter_reg = qla24xx_read_window(reg, 0x70E0, 16, iter_reg);
2135 qla24xx_read_window(reg, 0x70F0, 16, iter_reg);
2136
2137 /* I/O Queue Control registers. */
2138 qla24xx_read_window(reg, 0x7800, 16, fw->queue_control_reg);
2139
2140 /* Frame Buffer registers. */
2141 iter_reg = fw->fb_hdw_reg;
2142 iter_reg = qla24xx_read_window(reg, 0x6000, 16, iter_reg);
2143 iter_reg = qla24xx_read_window(reg, 0x6010, 16, iter_reg);
2144 iter_reg = qla24xx_read_window(reg, 0x6020, 16, iter_reg);
2145 iter_reg = qla24xx_read_window(reg, 0x6030, 16, iter_reg);
2146 iter_reg = qla24xx_read_window(reg, 0x6040, 16, iter_reg);
2147 iter_reg = qla24xx_read_window(reg, 0x6060, 16, iter_reg);
2148 iter_reg = qla24xx_read_window(reg, 0x6070, 16, iter_reg);
2149 iter_reg = qla24xx_read_window(reg, 0x6100, 16, iter_reg);
2150 iter_reg = qla24xx_read_window(reg, 0x6130, 16, iter_reg);
2151 iter_reg = qla24xx_read_window(reg, 0x6150, 16, iter_reg);
2152 iter_reg = qla24xx_read_window(reg, 0x6170, 16, iter_reg);
2153 iter_reg = qla24xx_read_window(reg, 0x6190, 16, iter_reg);
2154 iter_reg = qla24xx_read_window(reg, 0x61B0, 16, iter_reg);
2155 iter_reg = qla24xx_read_window(reg, 0x61C0, 16, iter_reg);
2156 iter_reg = qla24xx_read_window(reg, 0x6530, 16, iter_reg);
2157 iter_reg = qla24xx_read_window(reg, 0x6540, 16, iter_reg);
2158 iter_reg = qla24xx_read_window(reg, 0x6550, 16, iter_reg);
2159 iter_reg = qla24xx_read_window(reg, 0x6560, 16, iter_reg);
2160 iter_reg = qla24xx_read_window(reg, 0x6570, 16, iter_reg);
2161 iter_reg = qla24xx_read_window(reg, 0x6580, 16, iter_reg);
2162 iter_reg = qla24xx_read_window(reg, 0x6590, 16, iter_reg);
2163 iter_reg = qla24xx_read_window(reg, 0x65A0, 16, iter_reg);
2164 iter_reg = qla24xx_read_window(reg, 0x65B0, 16, iter_reg);
2165 iter_reg = qla24xx_read_window(reg, 0x65C0, 16, iter_reg);
2166 iter_reg = qla24xx_read_window(reg, 0x65D0, 16, iter_reg);
2167 iter_reg = qla24xx_read_window(reg, 0x65E0, 16, iter_reg);
2168 qla24xx_read_window(reg, 0x6F00, 16, iter_reg);
2169
2170 /* Multi queue registers */
2171 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset,
2172 &last_chain);
2173
2174 rval = qla24xx_soft_reset(ha);
2175 if (rval != QLA_SUCCESS) {
2176 ql_log(ql_log_warn, vha, 0xd00e,
2177 "SOFT RESET FAILED, forcing continuation of dump!!!\n");
2178 rval = QLA_SUCCESS;
2179
2180 ql_log(ql_log_warn, vha, 0xd00f, "try a bigger hammer!!!\n");
2181
2182 WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
2183 RD_REG_DWORD(&reg->hccr);
2184
2185 WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
2186 RD_REG_DWORD(&reg->hccr);
2187
2188 WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
2189 RD_REG_DWORD(&reg->hccr);
2190
2191 for (cnt = 30000; cnt && (RD_REG_WORD(&reg->mailbox0)); cnt--)
2192 udelay(5);
2193
2194 if (!cnt) {
2195 nxt = fw->code_ram;
2196 nxt += sizeof(fw->code_ram),
2197 nxt += (ha->fw_memory_size - 0x100000 + 1);
2198 goto copy_queue;
2199 } else
2200 ql_log(ql_log_warn, vha, 0xd010,
2201 "bigger hammer success?\n");
2202 }
2203
2204 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram),
2205 &nxt);
2206 if (rval != QLA_SUCCESS)
2207 goto qla83xx_fw_dump_failed_0;
2208
2209copy_queue:
2210 nxt = qla2xxx_copy_queues(ha, nxt);
2211
2212 nxt = qla24xx_copy_eft(ha, nxt);
2213
2214 /* Chain entries -- started with MQ. */
2215 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain);
2216 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain);
2217 if (last_chain) {
2218 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT);
2219 *last_chain |= __constant_htonl(DUMP_CHAIN_LAST);
2220 }
2221
2222 /* Adjust valid length. */
2223 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump);
2224
2225qla83xx_fw_dump_failed_0:
2226 qla2xxx_dump_post_process(base_vha, rval);
2227
2228qla83xx_fw_dump_failed:
2229 if (!hardware_locked)
2230 spin_unlock_irqrestore(&ha->hardware_lock, flags);
2231}
2232
1732/****************************************************************************/ 2233/****************************************************************************/
1733/* Driver Debug Functions. */ 2234/* Driver Debug Functions. */
1734/****************************************************************************/ 2235/****************************************************************************/
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-09 13:05:37 -0500