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path: root/drivers/scsi/aic7xxx/aic7xxx.reg
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-rw-r--r--drivers/scsi/aic7xxx/aic7xxx.reg124
1 files changed, 124 insertions, 0 deletions
diff --git a/drivers/scsi/aic7xxx/aic7xxx.reg b/drivers/scsi/aic7xxx/aic7xxx.reg
index 0d2f763c342..9a96e55da39 100644
--- a/drivers/scsi/aic7xxx/aic7xxx.reg
+++ b/drivers/scsi/aic7xxx/aic7xxx.reg
@@ -51,6 +51,17 @@ VERSION = "$Id: //depot/aic7xxx/aic7xxx/aic7xxx.reg#40 $"
51 */ 51 */
52 52
53/* 53/*
54 * Registers marked "dont_generate_debug_code" are not (yet) referenced
55 * from the driver code, and this keyword inhibit generation
56 * of debug code for them.
57 *
58 * REG_PRETTY_PRINT config will complain if dont_generate_debug_code
59 * is added to the register which is referenced in the driver.
60 * Unreferenced register with no dont_generate_debug_code will result
61 * in dead code. No warning is issued.
62 */
63
64/*
54 * SCSI Sequence Control (p. 3-11). 65 * SCSI Sequence Control (p. 3-11).
55 * Each bit, when set starts a specific SCSI sequence on the bus 66 * Each bit, when set starts a specific SCSI sequence on the bus
56 */ 67 */
@@ -97,6 +108,7 @@ register SXFRCTL1 {
97 field ENSTIMER 0x04 108 field ENSTIMER 0x04
98 field ACTNEGEN 0x02 109 field ACTNEGEN 0x02
99 field STPWEN 0x01 /* Powered Termination */ 110 field STPWEN 0x01 /* Powered Termination */
111 dont_generate_debug_code
100} 112}
101 113
102/* 114/*
@@ -155,6 +167,7 @@ register SCSISIGO {
155 mask P_MESGOUT CDI|MSGI 167 mask P_MESGOUT CDI|MSGI
156 mask P_STATUS CDI|IOI 168 mask P_STATUS CDI|IOI
157 mask P_MESGIN CDI|IOI|MSGI 169 mask P_MESGIN CDI|IOI|MSGI
170 dont_generate_debug_code
158} 171}
159 172
160/* 173/*
@@ -194,6 +207,7 @@ register SCSIID {
194 */ 207 */
195 alias SCSIOFFSET 208 alias SCSIOFFSET
196 mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */ 209 mask SOFS_ULTRA2 0x7f /* Sync offset U2 chips */
210 dont_generate_debug_code
197} 211}
198 212
199/* 213/*
@@ -205,6 +219,7 @@ register SCSIID {
205register SCSIDATL { 219register SCSIDATL {
206 address 0x006 220 address 0x006
207 access_mode RW 221 access_mode RW
222 dont_generate_debug_code
208} 223}
209 224
210register SCSIDATH { 225register SCSIDATH {
@@ -223,6 +238,7 @@ register STCNT {
223 address 0x008 238 address 0x008
224 size 3 239 size 3
225 access_mode RW 240 access_mode RW
241 dont_generate_debug_code
226} 242}
227 243
228/* ALT_MODE registers (Ultra2 and Ultra160 chips) */ 244/* ALT_MODE registers (Ultra2 and Ultra160 chips) */
@@ -248,6 +264,7 @@ register OPTIONMODE {
248 field AUTO_MSGOUT_DE 0x02 264 field AUTO_MSGOUT_DE 0x02
249 field DIS_MSGIN_DUALEDGE 0x01 265 field DIS_MSGIN_DUALEDGE 0x01
250 mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE 266 mask OPTIONMODE_DEFAULTS AUTO_MSGOUT_DE|DIS_MSGIN_DUALEDGE
267 dont_generate_debug_code
251} 268}
252 269
253/* ALT_MODE register on Ultra160 chips */ 270/* ALT_MODE register on Ultra160 chips */
@@ -256,6 +273,7 @@ register TARGCRCCNT {
256 size 2 273 size 2
257 access_mode RW 274 access_mode RW
258 count 2 275 count 2
276 dont_generate_debug_code
259} 277}
260 278
261/* 279/*
@@ -271,6 +289,7 @@ register CLRSINT0 {
271 field CLRSWRAP 0x08 289 field CLRSWRAP 0x08
272 field CLRIOERR 0x08 /* Ultra2 Only */ 290 field CLRIOERR 0x08 /* Ultra2 Only */
273 field CLRSPIORDY 0x02 291 field CLRSPIORDY 0x02
292 dont_generate_debug_code
274} 293}
275 294
276/* 295/*
@@ -306,6 +325,7 @@ register CLRSINT1 {
306 field CLRSCSIPERR 0x04 325 field CLRSCSIPERR 0x04
307 field CLRPHASECHG 0x02 326 field CLRPHASECHG 0x02
308 field CLRREQINIT 0x01 327 field CLRREQINIT 0x01
328 dont_generate_debug_code
309} 329}
310 330
311/* 331/*
@@ -360,6 +380,7 @@ register SCSIID_ULTRA2 {
360 access_mode RW 380 access_mode RW
361 mask TID 0xf0 /* Target ID mask */ 381 mask TID 0xf0 /* Target ID mask */
362 mask OID 0x0f /* Our ID mask */ 382 mask OID 0x0f /* Our ID mask */
383 dont_generate_debug_code
363} 384}
364 385
365/* 386/*
@@ -425,6 +446,7 @@ register SHADDR {
425 address 0x014 446 address 0x014
426 size 4 447 size 4
427 access_mode RO 448 access_mode RO
449 dont_generate_debug_code
428} 450}
429 451
430/* 452/*
@@ -441,6 +463,7 @@ register SELTIMER {
441 field STAGE2 0x02 463 field STAGE2 0x02
442 field STAGE1 0x01 464 field STAGE1 0x01
443 alias TARGIDIN 465 alias TARGIDIN
466 dont_generate_debug_code
444} 467}
445 468
446/* 469/*
@@ -453,6 +476,7 @@ register SELID {
453 access_mode RW 476 access_mode RW
454 mask SELID_MASK 0xf0 477 mask SELID_MASK 0xf0
455 field ONEBIT 0x08 478 field ONEBIT 0x08
479 dont_generate_debug_code
456} 480}
457 481
458register SCAMCTL { 482register SCAMCTL {
@@ -473,6 +497,7 @@ register TARGID {
473 size 2 497 size 2
474 access_mode RW 498 access_mode RW
475 count 14 499 count 14
500 dont_generate_debug_code
476} 501}
477 502
478/* 503/*
@@ -495,6 +520,7 @@ register SPIOCAP {
495 field EEPROM 0x04 /* Writable external BIOS ROM */ 520 field EEPROM 0x04 /* Writable external BIOS ROM */
496 field ROM 0x02 /* Logic for accessing external ROM */ 521 field ROM 0x02 /* Logic for accessing external ROM */
497 field SSPIOCPS 0x01 /* Termination and cable detection */ 522 field SSPIOCPS 0x01 /* Termination and cable detection */
523 dont_generate_debug_code
498} 524}
499 525
500register BRDCTL { 526register BRDCTL {
@@ -514,6 +540,7 @@ register BRDCTL {
514 field BRDDAT2 0x04 540 field BRDDAT2 0x04
515 field BRDRW_ULTRA2 0x02 541 field BRDRW_ULTRA2 0x02
516 field BRDSTB_ULTRA2 0x01 542 field BRDSTB_ULTRA2 0x01
543 dont_generate_debug_code
517} 544}
518 545
519/* 546/*
@@ -551,6 +578,7 @@ register SEECTL {
551 field SEECK 0x04 578 field SEECK 0x04
552 field SEEDO 0x02 579 field SEEDO 0x02
553 field SEEDI 0x01 580 field SEEDI 0x01
581 dont_generate_debug_code
554} 582}
555/* 583/*
556 * SCSI Block Control (p. 3-32) 584 * SCSI Block Control (p. 3-32)
@@ -601,6 +629,7 @@ register SEQRAM {
601 address 0x061 629 address 0x061
602 access_mode RW 630 access_mode RW
603 count 2 631 count 2
632 dont_generate_debug_code
604} 633}
605 634
606/* 635/*
@@ -610,6 +639,7 @@ register SEQRAM {
610register SEQADDR0 { 639register SEQADDR0 {
611 address 0x062 640 address 0x062
612 access_mode RW 641 access_mode RW
642 dont_generate_debug_code
613} 643}
614 644
615register SEQADDR1 { 645register SEQADDR1 {
@@ -617,6 +647,7 @@ register SEQADDR1 {
617 access_mode RW 647 access_mode RW
618 count 8 648 count 8
619 mask SEQADDR1_MASK 0x01 649 mask SEQADDR1_MASK 0x01
650 dont_generate_debug_code
620} 651}
621 652
622/* 653/*
@@ -627,35 +658,41 @@ register ACCUM {
627 address 0x064 658 address 0x064
628 access_mode RW 659 access_mode RW
629 accumulator 660 accumulator
661 dont_generate_debug_code
630} 662}
631 663
632register SINDEX { 664register SINDEX {
633 address 0x065 665 address 0x065
634 access_mode RW 666 access_mode RW
635 sindex 667 sindex
668 dont_generate_debug_code
636} 669}
637 670
638register DINDEX { 671register DINDEX {
639 address 0x066 672 address 0x066
640 access_mode RW 673 access_mode RW
674 dont_generate_debug_code
641} 675}
642 676
643register ALLONES { 677register ALLONES {
644 address 0x069 678 address 0x069
645 access_mode RO 679 access_mode RO
646 allones 680 allones
681 dont_generate_debug_code
647} 682}
648 683
649register ALLZEROS { 684register ALLZEROS {
650 address 0x06a 685 address 0x06a
651 access_mode RO 686 access_mode RO
652 allzeros 687 allzeros
688 dont_generate_debug_code
653} 689}
654 690
655register NONE { 691register NONE {
656 address 0x06a 692 address 0x06a
657 access_mode WO 693 access_mode WO
658 none 694 none
695 dont_generate_debug_code
659} 696}
660 697
661register FLAGS { 698register FLAGS {
@@ -664,16 +701,19 @@ register FLAGS {
664 count 18 701 count 18
665 field ZERO 0x02 702 field ZERO 0x02
666 field CARRY 0x01 703 field CARRY 0x01
704 dont_generate_debug_code
667} 705}
668 706
669register SINDIR { 707register SINDIR {
670 address 0x06c 708 address 0x06c
671 access_mode RO 709 access_mode RO
710 dont_generate_debug_code
672} 711}
673 712
674register DINDIR { 713register DINDIR {
675 address 0x06d 714 address 0x06d
676 access_mode WO 715 access_mode WO
716 dont_generate_debug_code
677} 717}
678 718
679register FUNCTION1 { 719register FUNCTION1 {
@@ -685,6 +725,7 @@ register STACK {
685 address 0x06f 725 address 0x06f
686 access_mode RO 726 access_mode RO
687 count 5 727 count 5
728 dont_generate_debug_code
688} 729}
689 730
690const STACK_SIZE 4 731const STACK_SIZE 4
@@ -716,6 +757,7 @@ register DSCOMMAND0 {
716 field RAMPS 0x04 /* External SCB RAM Present */ 757 field RAMPS 0x04 /* External SCB RAM Present */
717 field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */ 758 field USCBSIZE32 0x02 /* Use 32byte SCB Page Size */
718 field CIOPARCKEN 0x01 /* Internal bus parity error enable */ 759 field CIOPARCKEN 0x01 /* Internal bus parity error enable */
760 dont_generate_debug_code
719} 761}
720 762
721register DSCOMMAND1 { 763register DSCOMMAND1 {
@@ -724,6 +766,7 @@ register DSCOMMAND1 {
724 mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */ 766 mask DSLATT 0xfc /* PCI latency timer (non-ultra2) */
725 field HADDLDSEL1 0x02 /* Host Address Load Select Bits */ 767 field HADDLDSEL1 0x02 /* Host Address Load Select Bits */
726 field HADDLDSEL0 0x01 768 field HADDLDSEL0 0x01
769 dont_generate_debug_code
727} 770}
728 771
729/* 772/*
@@ -735,6 +778,7 @@ register BUSTIME {
735 count 2 778 count 2
736 mask BOFF 0xf0 779 mask BOFF 0xf0
737 mask BON 0x0f 780 mask BON 0x0f
781 dont_generate_debug_code
738} 782}
739 783
740/* 784/*
@@ -749,6 +793,7 @@ register BUSSPD {
749 mask STBON 0x07 793 mask STBON 0x07
750 mask DFTHRSH_100 0xc0 794 mask DFTHRSH_100 0xc0
751 mask DFTHRSH_75 0x80 795 mask DFTHRSH_75 0x80
796 dont_generate_debug_code
752} 797}
753 798
754/* aic7850/55/60/70/80/95 only */ 799/* aic7850/55/60/70/80/95 only */
@@ -756,6 +801,7 @@ register DSPCISTATUS {
756 address 0x086 801 address 0x086
757 count 4 802 count 4
758 mask DFTHRSH_100 0xc0 803 mask DFTHRSH_100 0xc0
804 dont_generate_debug_code
759} 805}
760 806
761/* aic7890/91/96/97 only */ 807/* aic7890/91/96/97 only */
@@ -764,6 +810,7 @@ register HS_MAILBOX {
764 mask HOST_MAILBOX 0xF0 810 mask HOST_MAILBOX 0xF0
765 mask SEQ_MAILBOX 0x0F 811 mask SEQ_MAILBOX 0x0F
766 mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */ 812 mask HOST_TQINPOS 0x80 /* Boundary at either 0 or 128 */
813 dont_generate_debug_code
767} 814}
768 815
769const HOST_MAILBOX_SHIFT 4 816const HOST_MAILBOX_SHIFT 4
@@ -784,6 +831,7 @@ register HCNTRL {
784 field INTEN 0x02 831 field INTEN 0x02
785 field CHIPRST 0x01 832 field CHIPRST 0x01
786 field CHIPRSTACK 0x01 833 field CHIPRSTACK 0x01
834 dont_generate_debug_code
787} 835}
788 836
789/* 837/*
@@ -795,12 +843,14 @@ register HADDR {
795 address 0x088 843 address 0x088
796 size 4 844 size 4
797 access_mode RW 845 access_mode RW
846 dont_generate_debug_code
798} 847}
799 848
800register HCNT { 849register HCNT {
801 address 0x08c 850 address 0x08c
802 size 3 851 size 3
803 access_mode RW 852 access_mode RW
853 dont_generate_debug_code
804} 854}
805 855
806/* 856/*
@@ -810,6 +860,7 @@ register HCNT {
810register SCBPTR { 860register SCBPTR {
811 address 0x090 861 address 0x090
812 access_mode RW 862 access_mode RW
863 dont_generate_debug_code
813} 864}
814 865
815/* 866/*
@@ -878,6 +929,7 @@ register INTSTAT {
878 929
879 mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */ 930 mask SEQINT_MASK 0xf0|SEQINT /* SEQINT Status Codes */
880 mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT) 931 mask INT_PEND (BRKADRINT|SEQINT|SCSIINT|CMDCMPLT)
932 dont_generate_debug_code
881} 933}
882 934
883/* 935/*
@@ -911,6 +963,7 @@ register CLRINT {
911 field CLRSCSIINT 0x04 963 field CLRSCSIINT 0x04
912 field CLRCMDINT 0x02 964 field CLRCMDINT 0x02
913 field CLRSEQINT 0x01 965 field CLRSEQINT 0x01
966 dont_generate_debug_code
914} 967}
915 968
916register DFCNTRL { 969register DFCNTRL {
@@ -944,6 +997,7 @@ register DFSTATUS {
944register DFWADDR { 997register DFWADDR {
945 address 0x95 998 address 0x95
946 access_mode RW 999 access_mode RW
1000 dont_generate_debug_code
947} 1001}
948 1002
949register DFRADDR { 1003register DFRADDR {
@@ -954,6 +1008,7 @@ register DFRADDR {
954register DFDAT { 1008register DFDAT {
955 address 0x099 1009 address 0x099
956 access_mode RW 1010 access_mode RW
1011 dont_generate_debug_code
957} 1012}
958 1013
959/* 1014/*
@@ -967,6 +1022,7 @@ register SCBCNT {
967 count 1 1022 count 1
968 field SCBAUTO 0x80 1023 field SCBAUTO 0x80
969 mask SCBCNT_MASK 0x1f 1024 mask SCBCNT_MASK 0x1f
1025 dont_generate_debug_code
970} 1026}
971 1027
972/* 1028/*
@@ -977,6 +1033,7 @@ register QINFIFO {
977 address 0x09b 1033 address 0x09b
978 access_mode RW 1034 access_mode RW
979 count 12 1035 count 12
1036 dont_generate_debug_code
980} 1037}
981 1038
982/* 1039/*
@@ -996,6 +1053,7 @@ register QOUTFIFO {
996 address 0x09d 1053 address 0x09d
997 access_mode WO 1054 access_mode WO
998 count 7 1055 count 7
1056 dont_generate_debug_code
999} 1057}
1000 1058
1001register CRCCONTROL1 { 1059register CRCCONTROL1 {
@@ -1008,6 +1066,7 @@ register CRCCONTROL1 {
1008 field CRCREQCHKEN 0x10 1066 field CRCREQCHKEN 0x10
1009 field TARGCRCENDEN 0x08 1067 field TARGCRCENDEN 0x08
1010 field TARGCRCCNTEN 0x04 1068 field TARGCRCCNTEN 0x04
1069 dont_generate_debug_code
1011} 1070}
1012 1071
1013 1072
@@ -1040,6 +1099,7 @@ register SFUNCT {
1040 access_mode RW 1099 access_mode RW
1041 count 4 1100 count 4
1042 field ALT_MODE 0x80 1101 field ALT_MODE 0x80
1102 dont_generate_debug_code
1043} 1103}
1044 1104
1045/* 1105/*
@@ -1053,24 +1113,31 @@ scb {
1053 size 4 1113 size 4
1054 alias SCB_RESIDUAL_DATACNT 1114 alias SCB_RESIDUAL_DATACNT
1055 alias SCB_CDB_STORE 1115 alias SCB_CDB_STORE
1116 dont_generate_debug_code
1056 } 1117 }
1057 SCB_RESIDUAL_SGPTR { 1118 SCB_RESIDUAL_SGPTR {
1058 size 4 1119 size 4
1120 dont_generate_debug_code
1059 } 1121 }
1060 SCB_SCSI_STATUS { 1122 SCB_SCSI_STATUS {
1061 size 1 1123 size 1
1124 dont_generate_debug_code
1062 } 1125 }
1063 SCB_TARGET_PHASES { 1126 SCB_TARGET_PHASES {
1064 size 1 1127 size 1
1128 dont_generate_debug_code
1065 } 1129 }
1066 SCB_TARGET_DATA_DIR { 1130 SCB_TARGET_DATA_DIR {
1067 size 1 1131 size 1
1132 dont_generate_debug_code
1068 } 1133 }
1069 SCB_TARGET_ITAG { 1134 SCB_TARGET_ITAG {
1070 size 1 1135 size 1
1136 dont_generate_debug_code
1071 } 1137 }
1072 SCB_DATAPTR { 1138 SCB_DATAPTR {
1073 size 4 1139 size 4
1140 dont_generate_debug_code
1074 } 1141 }
1075 SCB_DATACNT { 1142 SCB_DATACNT {
1076 /* 1143 /*
@@ -1080,12 +1147,14 @@ scb {
1080 size 4 1147 size 4
1081 field SG_LAST_SEG 0x80 /* In the fourth byte */ 1148 field SG_LAST_SEG 0x80 /* In the fourth byte */
1082 mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */ 1149 mask SG_HIGH_ADDR_BITS 0x7F /* In the fourth byte */
1150 dont_generate_debug_code
1083 } 1151 }
1084 SCB_SGPTR { 1152 SCB_SGPTR {
1085 size 4 1153 size 4
1086 field SG_RESID_VALID 0x04 /* In the first byte */ 1154 field SG_RESID_VALID 0x04 /* In the first byte */
1087 field SG_FULL_RESID 0x02 /* In the first byte */ 1155 field SG_FULL_RESID 0x02 /* In the first byte */
1088 field SG_LIST_NULL 0x01 /* In the first byte */ 1156 field SG_LIST_NULL 0x01 /* In the first byte */
1157 dont_generate_debug_code
1089 } 1158 }
1090 SCB_CONTROL { 1159 SCB_CONTROL {
1091 size 1 1160 size 1
@@ -1115,22 +1184,27 @@ scb {
1115 } 1184 }
1116 SCB_CDB_LEN { 1185 SCB_CDB_LEN {
1117 size 1 1186 size 1
1187 dont_generate_debug_code
1118 } 1188 }
1119 SCB_SCSIRATE { 1189 SCB_SCSIRATE {
1120 size 1 1190 size 1
1191 dont_generate_debug_code
1121 } 1192 }
1122 SCB_SCSIOFFSET { 1193 SCB_SCSIOFFSET {
1123 size 1 1194 size 1
1124 count 1 1195 count 1
1196 dont_generate_debug_code
1125 } 1197 }
1126 SCB_NEXT { 1198 SCB_NEXT {
1127 size 1 1199 size 1
1200 dont_generate_debug_code
1128 } 1201 }
1129 SCB_64_SPARE { 1202 SCB_64_SPARE {
1130 size 16 1203 size 16
1131 } 1204 }
1132 SCB_64_BTT { 1205 SCB_64_BTT {
1133 size 16 1206 size 16
1207 dont_generate_debug_code
1134 } 1208 }
1135} 1209}
1136 1210
@@ -1149,6 +1223,7 @@ register SEECTL_2840 {
1149 field CS_2840 0x04 1223 field CS_2840 0x04
1150 field CK_2840 0x02 1224 field CK_2840 0x02
1151 field DO_2840 0x01 1225 field DO_2840 0x01
1226 dont_generate_debug_code
1152} 1227}
1153 1228
1154register STATUS_2840 { 1229register STATUS_2840 {
@@ -1159,6 +1234,7 @@ register STATUS_2840 {
1159 mask BIOS_SEL 0x60 1234 mask BIOS_SEL 0x60
1160 mask ADSEL 0x1e 1235 mask ADSEL 0x1e
1161 field DI_2840 0x01 1236 field DI_2840 0x01
1237 dont_generate_debug_code
1162} 1238}
1163 1239
1164/* --------------------- AIC-7870-only definitions -------------------- */ 1240/* --------------------- AIC-7870-only definitions -------------------- */
@@ -1166,18 +1242,22 @@ register STATUS_2840 {
1166register CCHADDR { 1242register CCHADDR {
1167 address 0x0E0 1243 address 0x0E0
1168 size 8 1244 size 8
1245 dont_generate_debug_code
1169} 1246}
1170 1247
1171register CCHCNT { 1248register CCHCNT {
1172 address 0x0E8 1249 address 0x0E8
1250 dont_generate_debug_code
1173} 1251}
1174 1252
1175register CCSGRAM { 1253register CCSGRAM {
1176 address 0x0E9 1254 address 0x0E9
1255 dont_generate_debug_code
1177} 1256}
1178 1257
1179register CCSGADDR { 1258register CCSGADDR {
1180 address 0x0EA 1259 address 0x0EA
1260 dont_generate_debug_code
1181} 1261}
1182 1262
1183register CCSGCTL { 1263register CCSGCTL {
@@ -1186,11 +1266,13 @@ register CCSGCTL {
1186 field CCSGEN 0x08 1266 field CCSGEN 0x08
1187 field SG_FETCH_NEEDED 0x02 /* Bit used for software state */ 1267 field SG_FETCH_NEEDED 0x02 /* Bit used for software state */
1188 field CCSGRESET 0x01 1268 field CCSGRESET 0x01
1269 dont_generate_debug_code
1189} 1270}
1190 1271
1191register CCSCBCNT { 1272register CCSCBCNT {
1192 address 0xEF 1273 address 0xEF
1193 count 1 1274 count 1
1275 dont_generate_debug_code
1194} 1276}
1195 1277
1196register CCSCBCTL { 1278register CCSCBCTL {
@@ -1201,14 +1283,17 @@ register CCSCBCTL {
1201 field CCSCBEN 0x08 1283 field CCSCBEN 0x08
1202 field CCSCBDIR 0x04 1284 field CCSCBDIR 0x04
1203 field CCSCBRESET 0x01 1285 field CCSCBRESET 0x01
1286 dont_generate_debug_code
1204} 1287}
1205 1288
1206register CCSCBADDR { 1289register CCSCBADDR {
1207 address 0x0ED 1290 address 0x0ED
1291 dont_generate_debug_code
1208} 1292}
1209 1293
1210register CCSCBRAM { 1294register CCSCBRAM {
1211 address 0xEC 1295 address 0xEC
1296 dont_generate_debug_code
1212} 1297}
1213 1298
1214/* 1299/*
@@ -1218,23 +1303,28 @@ register SCBBADDR {
1218 address 0x0F0 1303 address 0x0F0
1219 access_mode RW 1304 access_mode RW
1220 count 3 1305 count 3
1306 dont_generate_debug_code
1221} 1307}
1222 1308
1223register CCSCBPTR { 1309register CCSCBPTR {
1224 address 0x0F1 1310 address 0x0F1
1311 dont_generate_debug_code
1225} 1312}
1226 1313
1227register HNSCB_QOFF { 1314register HNSCB_QOFF {
1228 address 0x0F4 1315 address 0x0F4
1229 count 4 1316 count 4
1317 dont_generate_debug_code
1230} 1318}
1231 1319
1232register SNSCB_QOFF { 1320register SNSCB_QOFF {
1233 address 0x0F6 1321 address 0x0F6
1322 dont_generate_debug_code
1234} 1323}
1235 1324
1236register SDSCB_QOFF { 1325register SDSCB_QOFF {
1237 address 0x0F8 1326 address 0x0F8
1327 dont_generate_debug_code
1238} 1328}
1239 1329
1240register QOFF_CTLSTA { 1330register QOFF_CTLSTA {
@@ -1244,6 +1334,7 @@ register QOFF_CTLSTA {
1244 field SDSCB_ROLLOVER 0x10 1334 field SDSCB_ROLLOVER 0x10
1245 mask SCB_QSIZE 0x07 1335 mask SCB_QSIZE 0x07
1246 mask SCB_QSIZE_256 0x06 1336 mask SCB_QSIZE_256 0x06
1337 dont_generate_debug_code
1247} 1338}
1248 1339
1249register DFF_THRSH { 1340register DFF_THRSH {
@@ -1267,6 +1358,7 @@ register DFF_THRSH {
1267 mask WR_DFTHRSH_90 0x60 1358 mask WR_DFTHRSH_90 0x60
1268 mask WR_DFTHRSH_MAX 0x70 1359 mask WR_DFTHRSH_MAX 0x70
1269 count 4 1360 count 4
1361 dont_generate_debug_code
1270} 1362}
1271 1363
1272register SG_CACHE_PRE { 1364register SG_CACHE_PRE {
@@ -1275,6 +1367,7 @@ register SG_CACHE_PRE {
1275 mask SG_ADDR_MASK 0xf8 1367 mask SG_ADDR_MASK 0xf8
1276 field LAST_SEG 0x02 1368 field LAST_SEG 0x02
1277 field LAST_SEG_DONE 0x01 1369 field LAST_SEG_DONE 0x01
1370 dont_generate_debug_code
1278} 1371}
1279 1372
1280register SG_CACHE_SHADOW { 1373register SG_CACHE_SHADOW {
@@ -1283,6 +1376,7 @@ register SG_CACHE_SHADOW {
1283 mask SG_ADDR_MASK 0xf8 1376 mask SG_ADDR_MASK 0xf8
1284 field LAST_SEG 0x02 1377 field LAST_SEG 0x02
1285 field LAST_SEG_DONE 0x01 1378 field LAST_SEG_DONE 0x01
1379 dont_generate_debug_code
1286} 1380}
1287/* ---------------------- Scratch RAM Offsets ------------------------- */ 1381/* ---------------------- Scratch RAM Offsets ------------------------- */
1288/* These offsets are either to values that are initialized by the board's 1382/* These offsets are either to values that are initialized by the board's
@@ -1309,6 +1403,7 @@ scratch_ram {
1309 BUSY_TARGETS { 1403 BUSY_TARGETS {
1310 alias TARG_SCSIRATE 1404 alias TARG_SCSIRATE
1311 size 16 1405 size 16
1406 dont_generate_debug_code
1312 } 1407 }
1313 /* 1408 /*
1314 * Bit vector of targets that have ULTRA enabled as set by 1409 * Bit vector of targets that have ULTRA enabled as set by
@@ -1321,6 +1416,7 @@ scratch_ram {
1321 alias CMDSIZE_TABLE 1416 alias CMDSIZE_TABLE
1322 size 2 1417 size 2
1323 count 2 1418 count 2
1419 dont_generate_debug_code
1324 } 1420 }
1325 /* 1421 /*
1326 * Bit vector of targets that have disconnection disabled as set by 1422 * Bit vector of targets that have disconnection disabled as set by
@@ -1331,6 +1427,7 @@ scratch_ram {
1331 DISC_DSB { 1427 DISC_DSB {
1332 size 2 1428 size 2
1333 count 6 1429 count 6
1430 dont_generate_debug_code
1334 } 1431 }
1335 CMDSIZE_TABLE_TAIL { 1432 CMDSIZE_TABLE_TAIL {
1336 size 4 1433 size 4
@@ -1341,12 +1438,14 @@ scratch_ram {
1341 */ 1438 */
1342 MWI_RESIDUAL { 1439 MWI_RESIDUAL {
1343 size 1 1440 size 1
1441 dont_generate_debug_code
1344 } 1442 }
1345 /* 1443 /*
1346 * SCBID of the next SCB to be started by the controller. 1444 * SCBID of the next SCB to be started by the controller.
1347 */ 1445 */
1348 NEXT_QUEUED_SCB { 1446 NEXT_QUEUED_SCB {
1349 size 1 1447 size 1
1448 dont_generate_debug_code
1350 } 1449 }
1351 /* 1450 /*
1352 * Single byte buffer used to designate the type or message 1451 * Single byte buffer used to designate the type or message
@@ -1354,6 +1453,7 @@ scratch_ram {
1354 */ 1453 */
1355 MSG_OUT { 1454 MSG_OUT {
1356 size 1 1455 size 1
1456 dont_generate_debug_code
1357 } 1457 }
1358 /* Parameters for DMA Logic */ 1458 /* Parameters for DMA Logic */
1359 DMAPARAMS { 1459 DMAPARAMS {
@@ -1369,6 +1469,7 @@ scratch_ram {
1369 field DIRECTION 0x04 /* Set indicates PCI->SCSI */ 1469 field DIRECTION 0x04 /* Set indicates PCI->SCSI */
1370 field FIFOFLUSH 0x02 1470 field FIFOFLUSH 0x02
1371 field FIFORESET 0x01 1471 field FIFORESET 0x01
1472 dont_generate_debug_code
1372 } 1473 }
1373 SEQ_FLAGS { 1474 SEQ_FLAGS {
1374 size 1 1475 size 1
@@ -1390,9 +1491,11 @@ scratch_ram {
1390 */ 1491 */
1391 SAVED_SCSIID { 1492 SAVED_SCSIID {
1392 size 1 1493 size 1
1494 dont_generate_debug_code
1393 } 1495 }
1394 SAVED_LUN { 1496 SAVED_LUN {
1395 size 1 1497 size 1
1498 dont_generate_debug_code
1396 } 1499 }
1397 /* 1500 /*
1398 * The last bus phase as seen by the sequencer. 1501 * The last bus phase as seen by the sequencer.
@@ -1417,6 +1520,7 @@ scratch_ram {
1417 */ 1520 */
1418 WAITING_SCBH { 1521 WAITING_SCBH {
1419 size 1 1522 size 1
1523 dont_generate_debug_code
1420 } 1524 }
1421 /* 1525 /*
1422 * head of list of SCBs that are 1526 * head of list of SCBs that are
@@ -1425,6 +1529,7 @@ scratch_ram {
1425 */ 1529 */
1426 DISCONNECTED_SCBH { 1530 DISCONNECTED_SCBH {
1427 size 1 1531 size 1
1532 dont_generate_debug_code
1428 } 1533 }
1429 /* 1534 /*
1430 * head of list of SCBs that are 1535 * head of list of SCBs that are
@@ -1432,6 +1537,7 @@ scratch_ram {
1432 */ 1537 */
1433 FREE_SCBH { 1538 FREE_SCBH {
1434 size 1 1539 size 1
1540 dont_generate_debug_code
1435 } 1541 }
1436 /* 1542 /*
1437 * head of list of SCBs that have 1543 * head of list of SCBs that have
@@ -1446,6 +1552,7 @@ scratch_ram {
1446 */ 1552 */
1447 HSCB_ADDR { 1553 HSCB_ADDR {
1448 size 4 1554 size 4
1555 dont_generate_debug_code
1449 } 1556 }
1450 /* 1557 /*
1451 * Base address of our shared data with the kernel driver in host 1558 * Base address of our shared data with the kernel driver in host
@@ -1454,15 +1561,19 @@ scratch_ram {
1454 */ 1561 */
1455 SHARED_DATA_ADDR { 1562 SHARED_DATA_ADDR {
1456 size 4 1563 size 4
1564 dont_generate_debug_code
1457 } 1565 }
1458 KERNEL_QINPOS { 1566 KERNEL_QINPOS {
1459 size 1 1567 size 1
1568 dont_generate_debug_code
1460 } 1569 }
1461 QINPOS { 1570 QINPOS {
1462 size 1 1571 size 1
1572 dont_generate_debug_code
1463 } 1573 }
1464 QOUTPOS { 1574 QOUTPOS {
1465 size 1 1575 size 1
1576 dont_generate_debug_code
1466 } 1577 }
1467 /* 1578 /*
1468 * Kernel and sequencer offsets into the queue of 1579 * Kernel and sequencer offsets into the queue of
@@ -1471,9 +1582,11 @@ scratch_ram {
1471 */ 1582 */
1472 KERNEL_TQINPOS { 1583 KERNEL_TQINPOS {
1473 size 1 1584 size 1
1585 dont_generate_debug_code
1474 } 1586 }
1475 TQINPOS { 1587 TQINPOS {
1476 size 1 1588 size 1
1589 dont_generate_debug_code
1477 } 1590 }
1478 ARG_1 { 1591 ARG_1 {
1479 size 1 1592 size 1
@@ -1486,10 +1599,12 @@ scratch_ram {
1486 mask CONT_MSG_LOOP 0x04 1599 mask CONT_MSG_LOOP 0x04
1487 mask CONT_TARG_SESSION 0x02 1600 mask CONT_TARG_SESSION 0x02
1488 alias RETURN_1 1601 alias RETURN_1
1602 dont_generate_debug_code
1489 } 1603 }
1490 ARG_2 { 1604 ARG_2 {
1491 size 1 1605 size 1
1492 alias RETURN_2 1606 alias RETURN_2
1607 dont_generate_debug_code
1493 } 1608 }
1494 1609
1495 /* 1610 /*
@@ -1498,6 +1613,7 @@ scratch_ram {
1498 LAST_MSG { 1613 LAST_MSG {
1499 size 1 1614 size 1
1500 alias TARG_IMMEDIATE_SCB 1615 alias TARG_IMMEDIATE_SCB
1616 dont_generate_debug_code
1501 } 1617 }
1502 1618
1503 /* 1619 /*
@@ -1513,6 +1629,7 @@ scratch_ram {
1513 field ENAUTOATNO 0x08 1629 field ENAUTOATNO 0x08
1514 field ENAUTOATNI 0x04 1630 field ENAUTOATNI 0x04
1515 field ENAUTOATNP 0x02 1631 field ENAUTOATNP 0x02
1632 dont_generate_debug_code
1516 } 1633 }
1517} 1634}
1518 1635
@@ -1533,12 +1650,14 @@ scratch_ram {
1533 field HA_274_EXTENDED_TRANS 0x01 1650 field HA_274_EXTENDED_TRANS 0x01
1534 alias INITIATOR_TAG 1651 alias INITIATOR_TAG
1535 count 1 1652 count 1
1653 dont_generate_debug_code
1536 } 1654 }
1537 1655
1538 SEQ_FLAGS2 { 1656 SEQ_FLAGS2 {
1539 size 1 1657 size 1
1540 field SCB_DMA 0x01 1658 field SCB_DMA 0x01
1541 field TARGET_MSG_PENDING 0x02 1659 field TARGET_MSG_PENDING 0x02
1660 dont_generate_debug_code
1542 } 1661 }
1543} 1662}
1544 1663
@@ -1562,6 +1681,7 @@ scratch_ram {
1562 field ENSPCHK 0x20 1681 field ENSPCHK 0x20
1563 mask HSCSIID 0x07 /* our SCSI ID */ 1682 mask HSCSIID 0x07 /* our SCSI ID */
1564 mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */ 1683 mask HWSCSIID 0x0f /* our SCSI ID if Wide Bus */
1684 dont_generate_debug_code
1565 } 1685 }
1566 INTDEF { 1686 INTDEF {
1567 address 0x05c 1687 address 0x05c
@@ -1569,11 +1689,13 @@ scratch_ram {
1569 count 1 1689 count 1
1570 field EDGE_TRIG 0x80 1690 field EDGE_TRIG 0x80
1571 mask VECTOR 0x0f 1691 mask VECTOR 0x0f
1692 dont_generate_debug_code
1572 } 1693 }
1573 HOSTCONF { 1694 HOSTCONF {
1574 address 0x05d 1695 address 0x05d
1575 size 1 1696 size 1
1576 count 1 1697 count 1
1698 dont_generate_debug_code
1577 } 1699 }
1578 HA_274_BIOSCTRL { 1700 HA_274_BIOSCTRL {
1579 address 0x05f 1701 address 0x05f
@@ -1582,6 +1704,7 @@ scratch_ram {
1582 mask BIOSMODE 0x30 1704 mask BIOSMODE 0x30
1583 mask BIOSDISABLED 0x30 1705 mask BIOSDISABLED 0x30
1584 field CHANNEL_B_PRIMARY 0x08 1706 field CHANNEL_B_PRIMARY 0x08
1707 dont_generate_debug_code
1585 } 1708 }
1586} 1709}
1587 1710
@@ -1595,6 +1718,7 @@ scratch_ram {
1595 TARG_OFFSET { 1718 TARG_OFFSET {
1596 size 16 1719 size 16
1597 count 1 1720 count 1
1721 dont_generate_debug_code
1598 } 1722 }
1599} 1723}
1600 1724
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-20 04:43:38 -0400