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path: root/drivers/pci/pcie/aer/aerdrv.c
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Diffstat (limited to 'drivers/pci/pcie/aer/aerdrv.c')
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c18
1 files changed, 11 insertions, 7 deletions
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 7a711ee314b..4e845ab1864 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -234,13 +234,15 @@ static int __devinit aer_probe(struct pcie_device *dev)
234static pci_ers_result_t aer_root_reset(struct pci_dev *dev) 234static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
235{ 235{
236 u16 p2p_ctrl; 236 u16 p2p_ctrl;
237 u32 status; 237 u32 reg32;
238 int pos; 238 int pos;
239 239
240 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); 240 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
241 241
242 /* Disable Root's interrupt in response to error messages */ 242 /* Disable Root's interrupt in response to error messages */
243 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, 0); 243 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);
244 reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;
245 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
244 246
245 /* Assert Secondary Bus Reset */ 247 /* Assert Secondary Bus Reset */
246 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl); 248 pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);
@@ -265,12 +267,14 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev)
265 msleep(200); 267 msleep(200);
266 dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n"); 268 dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n");
267 269
270 /* Clear Root Error Status */
271 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &reg32);
272 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, reg32);
273
268 /* Enable Root Port's interrupt in response to error messages */ 274 /* Enable Root Port's interrupt in response to error messages */
269 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &status); 275 pci_read_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, &reg32);
270 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, status); 276 reg32 |= ROOT_PORT_INTR_ON_MESG_MASK;
271 pci_write_config_dword(dev, 277 pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);
272 pos + PCI_ERR_ROOT_COMMAND,
273 ROOT_PORT_INTR_ON_MESG_MASK);
274 278
275 return PCI_ERS_RESULT_RECOVERED; 279 return PCI_ERS_RESULT_RECOVERED;
276} 280}