1 files changed, 31 insertions, 20 deletions

diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c
index 3a775992919..97b3935f615 100644
--- a/drivers/net/wireless/rt2x00/rt61pci.c
+++ b/drivers/net/wireless/rt2x00/rt61pci.c
@@ -594,7 +594,8 @@ static void rt61pci_config_intf(struct rt2x00_dev *rt2x00dev,
 }
 
 static void rt61pci_config_erp(struct rt2x00_dev *rt2x00dev,
-                               struct rt2x00lib_erp *erp)
+                               struct rt2x00lib_erp *erp,
+                               u32 changed)
 {
         u32 reg;
 
@@ -603,28 +604,36 @@ static void rt61pci_config_erp(struct rt2x00_dev *rt2x00dev,
         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
         rt2x00pci_register_write(rt2x00dev, TXRX_CSR0, reg);
 
-        rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
-        rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
-        rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
-                           !!erp->short_preamble);
-        rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
+        if (changed & BSS_CHANGED_ERP_PREAMBLE) {
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR4, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
+                rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
+                                   !!erp->short_preamble);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR4, reg);
+        }
 
-        rt2x00pci_register_write(rt2x00dev, TXRX_CSR5, erp->basic_rates);
+        if (changed & BSS_CHANGED_BASIC_RATES)
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR5,
+                                         erp->basic_rates);
 
-        rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
-        rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
-                           erp->beacon_int * 16);
-        rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
+        if (changed & BSS_CHANGED_BEACON_INT) {
+                rt2x00pci_register_read(rt2x00dev, TXRX_CSR9, &reg);
+                rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
+                                   erp->beacon_int * 16);
+                rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg);
+        }
 
-        rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
-        rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
-        rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
+        if (changed & BSS_CHANGED_ERP_SLOT) {
+                rt2x00pci_register_read(rt2x00dev, MAC_CSR9, &reg);
+                rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, erp->slot_time);
+                rt2x00pci_register_write(rt2x00dev, MAC_CSR9, reg);
 
-        rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
-        rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
-        rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
-        rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
-        rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
+                rt2x00pci_register_read(rt2x00dev, MAC_CSR8, &reg);
+                rt2x00_set_field32(&reg, MAC_CSR8_SIFS, erp->sifs);
+                rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
+                rt2x00_set_field32(&reg, MAC_CSR8_EIFS, erp->eifs);
+                rt2x00pci_register_write(rt2x00dev, MAC_CSR8, reg);
+        }
 }
 
 static void rt61pci_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
@@ -1645,6 +1654,7 @@ static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
         rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, &reg);
         rt2x00_set_field32(&reg, INT_MASK_CSR_TXDONE, mask);
         rt2x00_set_field32(&reg, INT_MASK_CSR_RXDONE, mask);
+        rt2x00_set_field32(&reg, INT_MASK_CSR_BEACON_DONE, mask);
         rt2x00_set_field32(&reg, INT_MASK_CSR_ENABLE_MITIGATION, mask);
         rt2x00_set_field32(&reg, INT_MASK_CSR_MITIGATION_PERIOD, 0xff);
         rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg);
@@ -1658,6 +1668,7 @@ static void rt61pci_toggle_irq(struct rt2x00_dev *rt2x00dev,
         rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_5, mask);
         rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_6, mask);
         rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_7, mask);
+        rt2x00_set_field32(&reg, MCU_INT_MASK_CSR_TWAKEUP, mask);
         rt2x00pci_register_write(rt2x00dev, MCU_INT_MASK_CSR, reg);
 }
 
@@ -2106,7 +2117,7 @@ static void rt61pci_txdone(struct rt2x00_dev *rt2x00dev)
                                 "TX status report missed for entry %d\n",
                                 entry_done->entry_idx);
 
-                        rt2x00lib_txdone_noinfo(entry, TXDONE_UNKNOWN);
+                        rt2x00lib_txdone_noinfo(entry_done, TXDONE_UNKNOWN);
                         entry_done = rt2x00queue_get_entry(queue, Q_INDEX_DONE);
                 }