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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_eeprom.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9003_eeprom.c2634
1 files changed, 2586 insertions, 48 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index a88fe0d6142..3161a5901a7 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -22,12 +22,14 @@
22#define COMP_CKSUM_LEN 2 22#define COMP_CKSUM_LEN 2
23 23
24#define AR_CH0_TOP (0x00016288) 24#define AR_CH0_TOP (0x00016288)
25#define AR_CH0_TOP_XPABIASLVL (0x3) 25#define AR_CH0_TOP_XPABIASLVL (0x300)
26#define AR_CH0_TOP_XPABIASLVL_S (8) 26#define AR_CH0_TOP_XPABIASLVL_S (8)
27 27
28#define AR_CH0_THERM (0x00016290) 28#define AR_CH0_THERM (0x00016290)
29#define AR_CH0_THERM_SPARE (0x3f) 29#define AR_CH0_THERM_XPABIASLVL_MSB 0x3
30#define AR_CH0_THERM_SPARE_S (0) 30#define AR_CH0_THERM_XPABIASLVL_MSB_S 0
31#define AR_CH0_THERM_XPASHORT2GND 0x4
32#define AR_CH0_THERM_XPASHORT2GND_S 2
31 33
32#define AR_SWITCH_TABLE_COM_ALL (0xffff) 34#define AR_SWITCH_TABLE_COM_ALL (0xffff)
33#define AR_SWITCH_TABLE_COM_ALL_S (0) 35#define AR_SWITCH_TABLE_COM_ALL_S (0)
@@ -55,6 +57,8 @@
55#define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */ 57#define SUB_NUM_CTL_MODES_AT_5G_40 2 /* excluding HT40, EXT-OFDM */
56#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */ 58#define SUB_NUM_CTL_MODES_AT_2G_40 3 /* excluding HT40, EXT-OFDM, EXT-CCK */
57 59
60static int ar9003_hw_power_interpolate(int32_t x,
61 int32_t *px, int32_t *py, u_int16_t np);
58static const struct ar9300_eeprom ar9300_default = { 62static const struct ar9300_eeprom ar9300_default = {
59 .eepromVersion = 2, 63 .eepromVersion = 2,
60 .templateVersion = 2, 64 .templateVersion = 2,
@@ -144,13 +148,16 @@ static const struct ar9300_eeprom ar9300_default = {
144 .txEndToRxOn = 0x2, 148 .txEndToRxOn = 0x2,
145 .txFrameToXpaOn = 0xe, 149 .txFrameToXpaOn = 0xe,
146 .thresh62 = 28, 150 .thresh62 = 28,
147 .papdRateMaskHt20 = LE32(0x80c080), 151 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
148 .papdRateMaskHt40 = LE32(0x80c080), 152 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
149 .futureModal = { 153 .futureModal = {
150 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 154 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
151 0, 0, 0, 0, 0, 0, 0, 0
152 }, 155 },
153 }, 156 },
157 .base_ext1 = {
158 .ant_div_control = 0,
159 .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
160 },
154 .calFreqPier2G = { 161 .calFreqPier2G = {
155 FREQ2FBIN(2412, 1), 162 FREQ2FBIN(2412, 1),
156 FREQ2FBIN(2437, 1), 163 FREQ2FBIN(2437, 1),
@@ -285,8 +292,7 @@ static const struct ar9300_eeprom ar9300_default = {
285 /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1), 292 /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
286 /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1), 293 /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
287 /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1), 294 /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
288 /* Data[11].ctlEdges[3].bChannel */ 295 /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
289 FREQ2FBIN(2462, 1),
290 } 296 }
291 }, 297 },
292 .ctlPowerData_2G = { 298 .ctlPowerData_2G = {
@@ -304,6 +310,7 @@ static const struct ar9300_eeprom ar9300_default = {
304 310
305 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } }, 311 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
306 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } }, 312 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
313 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
307 }, 314 },
308 .modalHeader5G = { 315 .modalHeader5G = {
309 /* 4 idle,t1,t2,b (4 bits per setting) */ 316 /* 4 idle,t1,t2,b (4 bits per setting) */
@@ -343,13 +350,20 @@ static const struct ar9300_eeprom ar9300_default = {
343 .txEndToRxOn = 0x2, 350 .txEndToRxOn = 0x2,
344 .txFrameToXpaOn = 0xe, 351 .txFrameToXpaOn = 0xe,
345 .thresh62 = 28, 352 .thresh62 = 28,
346 .papdRateMaskHt20 = LE32(0xf0e0e0), 353 .papdRateMaskHt20 = LE32(0x0c80c080),
347 .papdRateMaskHt40 = LE32(0xf0e0e0), 354 .papdRateMaskHt40 = LE32(0x0080c080),
348 .futureModal = { 355 .futureModal = {
349 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 356 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
350 0, 0, 0, 0, 0, 0, 0, 0
351 }, 357 },
352 }, 358 },
359 .base_ext2 = {
360 .tempSlopeLow = 0,
361 .tempSlopeHigh = 0,
362 .xatten1DBLow = {0, 0, 0},
363 .xatten1MarginLow = {0, 0, 0},
364 .xatten1DBHigh = {0, 0, 0},
365 .xatten1MarginHigh = {0, 0, 0}
366 },
353 .calFreqPier5G = { 367 .calFreqPier5G = {
354 FREQ2FBIN(5180, 0), 368 FREQ2FBIN(5180, 0),
355 FREQ2FBIN(5220, 0), 369 FREQ2FBIN(5220, 0),
@@ -623,6 +637,2338 @@ static const struct ar9300_eeprom ar9300_default = {
623 } 637 }
624}; 638};
625 639
640static const struct ar9300_eeprom ar9300_x113 = {
641 .eepromVersion = 2,
642 .templateVersion = 6,
643 .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
644 .custData = {"x113-023-f0000"},
645 .baseEepHeader = {
646 .regDmn = { LE16(0), LE16(0x1f) },
647 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
648 .opCapFlags = {
649 .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
650 .eepMisc = 0,
651 },
652 .rfSilent = 0,
653 .blueToothOptions = 0,
654 .deviceCap = 0,
655 .deviceType = 5, /* takes lower byte in eeprom location */
656 .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
657 .params_for_tuning_caps = {0, 0},
658 .featureEnable = 0x0d,
659 /*
660 * bit0 - enable tx temp comp - disabled
661 * bit1 - enable tx volt comp - disabled
662 * bit2 - enable fastClock - enabled
663 * bit3 - enable doubling - enabled
664 * bit4 - enable internal regulator - disabled
665 * bit5 - enable pa predistortion - disabled
666 */
667 .miscConfiguration = 0, /* bit0 - turn down drivestrength */
668 .eepromWriteEnableGpio = 6,
669 .wlanDisableGpio = 0,
670 .wlanLedGpio = 8,
671 .rxBandSelectGpio = 0xff,
672 .txrxgain = 0x21,
673 .swreg = 0,
674 },
675 .modalHeader2G = {
676 /* ar9300_modal_eep_header 2g */
677 /* 4 idle,t1,t2,b(4 bits per setting) */
678 .antCtrlCommon = LE32(0x110),
679 /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
680 .antCtrlCommon2 = LE32(0x44444),
681
682 /*
683 * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
684 * rx1, rx12, b (2 bits each)
685 */
686 .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
687
688 /*
689 * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db
690 * for ar9280 (0xa20c/b20c 5:0)
691 */
692 .xatten1DB = {0, 0, 0},
693
694 /*
695 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
696 * for ar9280 (0xa20c/b20c 16:12
697 */
698 .xatten1Margin = {0, 0, 0},
699 .tempSlope = 25,
700 .voltSlope = 0,
701
702 /*
703 * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
704 * channels in usual fbin coding format
705 */
706 .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
707
708 /*
709 * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
710 * if the register is per chain
711 */
712 .noiseFloorThreshCh = {-1, 0, 0},
713 .ob = {1, 1, 1},/* 3 chain */
714 .db_stage2 = {1, 1, 1}, /* 3 chain */
715 .db_stage3 = {0, 0, 0},
716 .db_stage4 = {0, 0, 0},
717 .xpaBiasLvl = 0,
718 .txFrameToDataStart = 0x0e,
719 .txFrameToPaOn = 0x0e,
720 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
721 .antennaGain = 0,
722 .switchSettling = 0x2c,
723 .adcDesiredSize = -30,
724 .txEndToXpaOff = 0,
725 .txEndToRxOn = 0x2,
726 .txFrameToXpaOn = 0xe,
727 .thresh62 = 28,
728 .papdRateMaskHt20 = LE32(0x0c80c080),
729 .papdRateMaskHt40 = LE32(0x0080c080),
730 .futureModal = {
731 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
732 },
733 },
734 .base_ext1 = {
735 .ant_div_control = 0,
736 .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
737 },
738 .calFreqPier2G = {
739 FREQ2FBIN(2412, 1),
740 FREQ2FBIN(2437, 1),
741 FREQ2FBIN(2472, 1),
742 },
743 /* ar9300_cal_data_per_freq_op_loop 2g */
744 .calPierData2G = {
745 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
746 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
747 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
748 },
749 .calTarget_freqbin_Cck = {
750 FREQ2FBIN(2412, 1),
751 FREQ2FBIN(2472, 1),
752 },
753 .calTarget_freqbin_2G = {
754 FREQ2FBIN(2412, 1),
755 FREQ2FBIN(2437, 1),
756 FREQ2FBIN(2472, 1)
757 },
758 .calTarget_freqbin_2GHT20 = {
759 FREQ2FBIN(2412, 1),
760 FREQ2FBIN(2437, 1),
761 FREQ2FBIN(2472, 1)
762 },
763 .calTarget_freqbin_2GHT40 = {
764 FREQ2FBIN(2412, 1),
765 FREQ2FBIN(2437, 1),
766 FREQ2FBIN(2472, 1)
767 },
768 .calTargetPowerCck = {
769 /* 1L-5L,5S,11L,11S */
770 { {34, 34, 34, 34} },
771 { {34, 34, 34, 34} },
772 },
773 .calTargetPower2G = {
774 /* 6-24,36,48,54 */
775 { {34, 34, 32, 32} },
776 { {34, 34, 32, 32} },
777 { {34, 34, 32, 32} },
778 },
779 .calTargetPower2GHT20 = {
780 { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
781 { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
782 { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
783 },
784 .calTargetPower2GHT40 = {
785 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
786 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
787 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
788 },
789 .ctlIndex_2G = {
790 0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
791 0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
792 },
793 .ctl_freqbin_2G = {
794 {
795 FREQ2FBIN(2412, 1),
796 FREQ2FBIN(2417, 1),
797 FREQ2FBIN(2457, 1),
798 FREQ2FBIN(2462, 1)
799 },
800 {
801 FREQ2FBIN(2412, 1),
802 FREQ2FBIN(2417, 1),
803 FREQ2FBIN(2462, 1),
804 0xFF,
805 },
806
807 {
808 FREQ2FBIN(2412, 1),
809 FREQ2FBIN(2417, 1),
810 FREQ2FBIN(2462, 1),
811 0xFF,
812 },
813 {
814 FREQ2FBIN(2422, 1),
815 FREQ2FBIN(2427, 1),
816 FREQ2FBIN(2447, 1),
817 FREQ2FBIN(2452, 1)
818 },
819
820 {
821 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
822 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
823 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
824 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
825 },
826
827 {
828 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
829 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
830 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
831 0,
832 },
833
834 {
835 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
836 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
837 FREQ2FBIN(2472, 1),
838 0,
839 },
840
841 {
842 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
843 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
844 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
845 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
846 },
847
848 {
849 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
850 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
851 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
852 },
853
854 {
855 /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
856 /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
857 /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
858 0
859 },
860
861 {
862 /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
863 /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
864 /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
865 0
866 },
867
868 {
869 /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
870 /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
871 /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
872 /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
873 }
874 },
875 .ctlPowerData_2G = {
876 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
877 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
878 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
879
880 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
881 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
882 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
883
884 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
885 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
886 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
887
888 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
889 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
890 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
891 },
892 .modalHeader5G = {
893 /* 4 idle,t1,t2,b (4 bits per setting) */
894 .antCtrlCommon = LE32(0x220),
895 /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
896 .antCtrlCommon2 = LE32(0x11111),
897 /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
898 .antCtrlChain = {
899 LE16(0x150), LE16(0x150), LE16(0x150),
900 },
901 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
902 .xatten1DB = {0, 0, 0},
903
904 /*
905 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
906 * for merlin (0xa20c/b20c 16:12
907 */
908 .xatten1Margin = {0, 0, 0},
909 .tempSlope = 68,
910 .voltSlope = 0,
911 /* spurChans spur channels in usual fbin coding format */
912 .spurChans = {FREQ2FBIN(5500, 0), 0, 0, 0, 0},
913 /* noiseFloorThreshCh Check if the register is per chain */
914 .noiseFloorThreshCh = {-1, 0, 0},
915 .ob = {3, 3, 3}, /* 3 chain */
916 .db_stage2 = {3, 3, 3}, /* 3 chain */
917 .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
918 .db_stage4 = {3, 3, 3}, /* don't exist for 2G */
919 .xpaBiasLvl = 0,
920 .txFrameToDataStart = 0x0e,
921 .txFrameToPaOn = 0x0e,
922 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
923 .antennaGain = 0,
924 .switchSettling = 0x2d,
925 .adcDesiredSize = -30,
926 .txEndToXpaOff = 0,
927 .txEndToRxOn = 0x2,
928 .txFrameToXpaOn = 0xe,
929 .thresh62 = 28,
930 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
931 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
932 .futureModal = {
933 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
934 },
935 },
936 .base_ext2 = {
937 .tempSlopeLow = 72,
938 .tempSlopeHigh = 105,
939 .xatten1DBLow = {0, 0, 0},
940 .xatten1MarginLow = {0, 0, 0},
941 .xatten1DBHigh = {0, 0, 0},
942 .xatten1MarginHigh = {0, 0, 0}
943 },
944 .calFreqPier5G = {
945 FREQ2FBIN(5180, 0),
946 FREQ2FBIN(5240, 0),
947 FREQ2FBIN(5320, 0),
948 FREQ2FBIN(5400, 0),
949 FREQ2FBIN(5500, 0),
950 FREQ2FBIN(5600, 0),
951 FREQ2FBIN(5745, 0),
952 FREQ2FBIN(5785, 0)
953 },
954 .calPierData5G = {
955 {
956 {0, 0, 0, 0, 0},
957 {0, 0, 0, 0, 0},
958 {0, 0, 0, 0, 0},
959 {0, 0, 0, 0, 0},
960 {0, 0, 0, 0, 0},
961 {0, 0, 0, 0, 0},
962 {0, 0, 0, 0, 0},
963 {0, 0, 0, 0, 0},
964 },
965 {
966 {0, 0, 0, 0, 0},
967 {0, 0, 0, 0, 0},
968 {0, 0, 0, 0, 0},
969 {0, 0, 0, 0, 0},
970 {0, 0, 0, 0, 0},
971 {0, 0, 0, 0, 0},
972 {0, 0, 0, 0, 0},
973 {0, 0, 0, 0, 0},
974 },
975 {
976 {0, 0, 0, 0, 0},
977 {0, 0, 0, 0, 0},
978 {0, 0, 0, 0, 0},
979 {0, 0, 0, 0, 0},
980 {0, 0, 0, 0, 0},
981 {0, 0, 0, 0, 0},
982 {0, 0, 0, 0, 0},
983 {0, 0, 0, 0, 0},
984 },
985
986 },
987 .calTarget_freqbin_5G = {
988 FREQ2FBIN(5180, 0),
989 FREQ2FBIN(5220, 0),
990 FREQ2FBIN(5320, 0),
991 FREQ2FBIN(5400, 0),
992 FREQ2FBIN(5500, 0),
993 FREQ2FBIN(5600, 0),
994 FREQ2FBIN(5745, 0),
995 FREQ2FBIN(5785, 0)
996 },
997 .calTarget_freqbin_5GHT20 = {
998 FREQ2FBIN(5180, 0),
999 FREQ2FBIN(5240, 0),
1000 FREQ2FBIN(5320, 0),
1001 FREQ2FBIN(5400, 0),
1002 FREQ2FBIN(5500, 0),
1003 FREQ2FBIN(5700, 0),
1004 FREQ2FBIN(5745, 0),
1005 FREQ2FBIN(5825, 0)
1006 },
1007 .calTarget_freqbin_5GHT40 = {
1008 FREQ2FBIN(5190, 0),
1009 FREQ2FBIN(5230, 0),
1010 FREQ2FBIN(5320, 0),
1011 FREQ2FBIN(5410, 0),
1012 FREQ2FBIN(5510, 0),
1013 FREQ2FBIN(5670, 0),
1014 FREQ2FBIN(5755, 0),
1015 FREQ2FBIN(5825, 0)
1016 },
1017 .calTargetPower5G = {
1018 /* 6-24,36,48,54 */
1019 { {42, 40, 40, 34} },
1020 { {42, 40, 40, 34} },
1021 { {42, 40, 40, 34} },
1022 { {42, 40, 40, 34} },
1023 { {42, 40, 40, 34} },
1024 { {42, 40, 40, 34} },
1025 { {42, 40, 40, 34} },
1026 { {42, 40, 40, 34} },
1027 },
1028 .calTargetPower5GHT20 = {
1029 /*
1030 * 0_8_16,1-3_9-11_17-19,
1031 * 4,5,6,7,12,13,14,15,20,21,22,23
1032 */
1033 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1034 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1035 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1036 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1037 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1038 { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
1039 { {38, 38, 38, 38, 32, 28, 38, 38, 32, 28, 38, 38, 32, 26} },
1040 { {36, 36, 36, 36, 32, 28, 36, 36, 32, 28, 36, 36, 32, 26} },
1041 },
1042 .calTargetPower5GHT40 = {
1043 /*
1044 * 0_8_16,1-3_9-11_17-19,
1045 * 4,5,6,7,12,13,14,15,20,21,22,23
1046 */
1047 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1048 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1049 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1050 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1051 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1052 { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
1053 { {36, 36, 36, 36, 30, 26, 36, 36, 30, 26, 36, 36, 30, 24} },
1054 { {34, 34, 34, 34, 30, 26, 34, 34, 30, 26, 34, 34, 30, 24} },
1055 },
1056 .ctlIndex_5G = {
1057 0x10, 0x16, 0x18, 0x40, 0x46,
1058 0x48, 0x30, 0x36, 0x38
1059 },
1060 .ctl_freqbin_5G = {
1061 {
1062 /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1063 /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1064 /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
1065 /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1066 /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
1067 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1068 /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1069 /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1070 },
1071 {
1072 /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1073 /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1074 /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
1075 /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1076 /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
1077 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1078 /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1079 /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1080 },
1081
1082 {
1083 /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1084 /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
1085 /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
1086 /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
1087 /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
1088 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
1089 /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
1090 /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
1091 },
1092
1093 {
1094 /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1095 /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
1096 /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
1097 /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
1098 /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
1099 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1100 /* Data[3].ctlEdges[6].bChannel */ 0xFF,
1101 /* Data[3].ctlEdges[7].bChannel */ 0xFF,
1102 },
1103
1104 {
1105 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1106 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1107 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
1108 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
1109 /* Data[4].ctlEdges[4].bChannel */ 0xFF,
1110 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
1111 /* Data[4].ctlEdges[6].bChannel */ 0xFF,
1112 /* Data[4].ctlEdges[7].bChannel */ 0xFF,
1113 },
1114
1115 {
1116 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1117 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
1118 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
1119 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1120 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
1121 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1122 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
1123 /* Data[5].ctlEdges[7].bChannel */ 0xFF
1124 },
1125
1126 {
1127 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1128 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
1129 /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
1130 /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
1131 /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
1132 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
1133 /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
1134 /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
1135 },
1136
1137 {
1138 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1139 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1140 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
1141 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1142 /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
1143 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1144 /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1145 /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1146 },
1147
1148 {
1149 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1150 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
1151 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
1152 /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1153 /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
1154 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1155 /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
1156 /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
1157 }
1158 },
1159 .ctlPowerData_5G = {
1160 {
1161 {
1162 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1163 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1164 }
1165 },
1166 {
1167 {
1168 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1169 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1170 }
1171 },
1172 {
1173 {
1174 {60, 0}, {60, 1}, {60, 0}, {60, 1},
1175 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1176 }
1177 },
1178 {
1179 {
1180 {60, 0}, {60, 1}, {60, 1}, {60, 0},
1181 {60, 1}, {60, 0}, {60, 0}, {60, 0},
1182 }
1183 },
1184 {
1185 {
1186 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1187 {60, 0}, {60, 0}, {60, 0}, {60, 0},
1188 }
1189 },
1190 {
1191 {
1192 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1193 {60, 1}, {60, 0}, {60, 0}, {60, 0},
1194 }
1195 },
1196 {
1197 {
1198 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1199 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1200 }
1201 },
1202 {
1203 {
1204 {60, 1}, {60, 1}, {60, 0}, {60, 1},
1205 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1206 }
1207 },
1208 {
1209 {
1210 {60, 1}, {60, 0}, {60, 1}, {60, 1},
1211 {60, 1}, {60, 1}, {60, 0}, {60, 1},
1212 }
1213 },
1214 }
1215};
1216
1217
1218static const struct ar9300_eeprom ar9300_h112 = {
1219 .eepromVersion = 2,
1220 .templateVersion = 3,
1221 .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
1222 .custData = {"h112-241-f0000"},
1223 .baseEepHeader = {
1224 .regDmn = { LE16(0), LE16(0x1f) },
1225 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
1226 .opCapFlags = {
1227 .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
1228 .eepMisc = 0,
1229 },
1230 .rfSilent = 0,
1231 .blueToothOptions = 0,
1232 .deviceCap = 0,
1233 .deviceType = 5, /* takes lower byte in eeprom location */
1234 .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
1235 .params_for_tuning_caps = {0, 0},
1236 .featureEnable = 0x0d,
1237 /*
1238 * bit0 - enable tx temp comp - disabled
1239 * bit1 - enable tx volt comp - disabled
1240 * bit2 - enable fastClock - enabled
1241 * bit3 - enable doubling - enabled
1242 * bit4 - enable internal regulator - disabled
1243 * bit5 - enable pa predistortion - disabled
1244 */
1245 .miscConfiguration = 0, /* bit0 - turn down drivestrength */
1246 .eepromWriteEnableGpio = 6,
1247 .wlanDisableGpio = 0,
1248 .wlanLedGpio = 8,
1249 .rxBandSelectGpio = 0xff,
1250 .txrxgain = 0x10,
1251 .swreg = 0,
1252 },
1253 .modalHeader2G = {
1254 /* ar9300_modal_eep_header 2g */
1255 /* 4 idle,t1,t2,b(4 bits per setting) */
1256 .antCtrlCommon = LE32(0x110),
1257 /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
1258 .antCtrlCommon2 = LE32(0x44444),
1259
1260 /*
1261 * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
1262 * rx1, rx12, b (2 bits each)
1263 */
1264 .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
1265
1266 /*
1267 * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db
1268 * for ar9280 (0xa20c/b20c 5:0)
1269 */
1270 .xatten1DB = {0, 0, 0},
1271
1272 /*
1273 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
1274 * for ar9280 (0xa20c/b20c 16:12
1275 */
1276 .xatten1Margin = {0, 0, 0},
1277 .tempSlope = 25,
1278 .voltSlope = 0,
1279
1280 /*
1281 * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
1282 * channels in usual fbin coding format
1283 */
1284 .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
1285
1286 /*
1287 * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
1288 * if the register is per chain
1289 */
1290 .noiseFloorThreshCh = {-1, 0, 0},
1291 .ob = {1, 1, 1},/* 3 chain */
1292 .db_stage2 = {1, 1, 1}, /* 3 chain */
1293 .db_stage3 = {0, 0, 0},
1294 .db_stage4 = {0, 0, 0},
1295 .xpaBiasLvl = 0,
1296 .txFrameToDataStart = 0x0e,
1297 .txFrameToPaOn = 0x0e,
1298 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
1299 .antennaGain = 0,
1300 .switchSettling = 0x2c,
1301 .adcDesiredSize = -30,
1302 .txEndToXpaOff = 0,
1303 .txEndToRxOn = 0x2,
1304 .txFrameToXpaOn = 0xe,
1305 .thresh62 = 28,
1306 .papdRateMaskHt20 = LE32(0x80c080),
1307 .papdRateMaskHt40 = LE32(0x80c080),
1308 .futureModal = {
1309 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1310 },
1311 },
1312 .base_ext1 = {
1313 .ant_div_control = 0,
1314 .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
1315 },
1316 .calFreqPier2G = {
1317 FREQ2FBIN(2412, 1),
1318 FREQ2FBIN(2437, 1),
1319 FREQ2FBIN(2472, 1),
1320 },
1321 /* ar9300_cal_data_per_freq_op_loop 2g */
1322 .calPierData2G = {
1323 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1324 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1325 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1326 },
1327 .calTarget_freqbin_Cck = {
1328 FREQ2FBIN(2412, 1),
1329 FREQ2FBIN(2484, 1),
1330 },
1331 .calTarget_freqbin_2G = {
1332 FREQ2FBIN(2412, 1),
1333 FREQ2FBIN(2437, 1),
1334 FREQ2FBIN(2472, 1)
1335 },
1336 .calTarget_freqbin_2GHT20 = {
1337 FREQ2FBIN(2412, 1),
1338 FREQ2FBIN(2437, 1),
1339 FREQ2FBIN(2472, 1)
1340 },
1341 .calTarget_freqbin_2GHT40 = {
1342 FREQ2FBIN(2412, 1),
1343 FREQ2FBIN(2437, 1),
1344 FREQ2FBIN(2472, 1)
1345 },
1346 .calTargetPowerCck = {
1347 /* 1L-5L,5S,11L,11S */
1348 { {34, 34, 34, 34} },
1349 { {34, 34, 34, 34} },
1350 },
1351 .calTargetPower2G = {
1352 /* 6-24,36,48,54 */
1353 { {34, 34, 32, 32} },
1354 { {34, 34, 32, 32} },
1355 { {34, 34, 32, 32} },
1356 },
1357 .calTargetPower2GHT20 = {
1358 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
1359 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
1360 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
1361 },
1362 .calTargetPower2GHT40 = {
1363 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
1364 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
1365 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
1366 },
1367 .ctlIndex_2G = {
1368 0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
1369 0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
1370 },
1371 .ctl_freqbin_2G = {
1372 {
1373 FREQ2FBIN(2412, 1),
1374 FREQ2FBIN(2417, 1),
1375 FREQ2FBIN(2457, 1),
1376 FREQ2FBIN(2462, 1)
1377 },
1378 {
1379 FREQ2FBIN(2412, 1),
1380 FREQ2FBIN(2417, 1),
1381 FREQ2FBIN(2462, 1),
1382 0xFF,
1383 },
1384
1385 {
1386 FREQ2FBIN(2412, 1),
1387 FREQ2FBIN(2417, 1),
1388 FREQ2FBIN(2462, 1),
1389 0xFF,
1390 },
1391 {
1392 FREQ2FBIN(2422, 1),
1393 FREQ2FBIN(2427, 1),
1394 FREQ2FBIN(2447, 1),
1395 FREQ2FBIN(2452, 1)
1396 },
1397
1398 {
1399 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1400 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1401 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1402 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
1403 },
1404
1405 {
1406 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1407 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1408 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1409 0,
1410 },
1411
1412 {
1413 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1414 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1415 FREQ2FBIN(2472, 1),
1416 0,
1417 },
1418
1419 {
1420 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
1421 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
1422 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
1423 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
1424 },
1425
1426 {
1427 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1428 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1429 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1430 },
1431
1432 {
1433 /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1434 /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1435 /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1436 0
1437 },
1438
1439 {
1440 /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
1441 /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
1442 /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
1443 0
1444 },
1445
1446 {
1447 /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
1448 /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
1449 /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
1450 /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
1451 }
1452 },
1453 .ctlPowerData_2G = {
1454 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1455 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1456 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
1457
1458 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
1459 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1460 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1461
1462 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
1463 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1464 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1465
1466 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
1467 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
1468 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
1469 },
1470 .modalHeader5G = {
1471 /* 4 idle,t1,t2,b (4 bits per setting) */
1472 .antCtrlCommon = LE32(0x220),
1473 /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
1474 .antCtrlCommon2 = LE32(0x44444),
1475 /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
1476 .antCtrlChain = {
1477 LE16(0x150), LE16(0x150), LE16(0x150),
1478 },
1479 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
1480 .xatten1DB = {0, 0, 0},
1481
1482 /*
1483 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
1484 * for merlin (0xa20c/b20c 16:12
1485 */
1486 .xatten1Margin = {0, 0, 0},
1487 .tempSlope = 45,
1488 .voltSlope = 0,
1489 /* spurChans spur channels in usual fbin coding format */
1490 .spurChans = {0, 0, 0, 0, 0},
1491 /* noiseFloorThreshCh Check if the register is per chain */
1492 .noiseFloorThreshCh = {-1, 0, 0},
1493 .ob = {3, 3, 3}, /* 3 chain */
1494 .db_stage2 = {3, 3, 3}, /* 3 chain */
1495 .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
1496 .db_stage4 = {3, 3, 3}, /* don't exist for 2G */
1497 .xpaBiasLvl = 0,
1498 .txFrameToDataStart = 0x0e,
1499 .txFrameToPaOn = 0x0e,
1500 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
1501 .antennaGain = 0,
1502 .switchSettling = 0x2d,
1503 .adcDesiredSize = -30,
1504 .txEndToXpaOff = 0,
1505 .txEndToRxOn = 0x2,
1506 .txFrameToXpaOn = 0xe,
1507 .thresh62 = 28,
1508 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
1509 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
1510 .futureModal = {
1511 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1512 },
1513 },
1514 .base_ext2 = {
1515 .tempSlopeLow = 40,
1516 .tempSlopeHigh = 50,
1517 .xatten1DBLow = {0, 0, 0},
1518 .xatten1MarginLow = {0, 0, 0},
1519 .xatten1DBHigh = {0, 0, 0},
1520 .xatten1MarginHigh = {0, 0, 0}
1521 },
1522 .calFreqPier5G = {
1523 FREQ2FBIN(5180, 0),
1524 FREQ2FBIN(5220, 0),
1525 FREQ2FBIN(5320, 0),
1526 FREQ2FBIN(5400, 0),
1527 FREQ2FBIN(5500, 0),
1528 FREQ2FBIN(5600, 0),
1529 FREQ2FBIN(5700, 0),
1530 FREQ2FBIN(5825, 0)
1531 },
1532 .calPierData5G = {
1533 {
1534 {0, 0, 0, 0, 0},
1535 {0, 0, 0, 0, 0},
1536 {0, 0, 0, 0, 0},
1537 {0, 0, 0, 0, 0},
1538 {0, 0, 0, 0, 0},
1539 {0, 0, 0, 0, 0},
1540 {0, 0, 0, 0, 0},
1541 {0, 0, 0, 0, 0},
1542 },
1543 {
1544 {0, 0, 0, 0, 0},
1545 {0, 0, 0, 0, 0},
1546 {0, 0, 0, 0, 0},
1547 {0, 0, 0, 0, 0},
1548 {0, 0, 0, 0, 0},
1549 {0, 0, 0, 0, 0},
1550 {0, 0, 0, 0, 0},
1551 {0, 0, 0, 0, 0},
1552 },
1553 {
1554 {0, 0, 0, 0, 0},
1555 {0, 0, 0, 0, 0},
1556 {0, 0, 0, 0, 0},
1557 {0, 0, 0, 0, 0},
1558 {0, 0, 0, 0, 0},
1559 {0, 0, 0, 0, 0},
1560 {0, 0, 0, 0, 0},
1561 {0, 0, 0, 0, 0},
1562 },
1563
1564 },
1565 .calTarget_freqbin_5G = {
1566 FREQ2FBIN(5180, 0),
1567 FREQ2FBIN(5240, 0),
1568 FREQ2FBIN(5320, 0),
1569 FREQ2FBIN(5400, 0),
1570 FREQ2FBIN(5500, 0),
1571 FREQ2FBIN(5600, 0),
1572 FREQ2FBIN(5700, 0),
1573 FREQ2FBIN(5825, 0)
1574 },
1575 .calTarget_freqbin_5GHT20 = {
1576 FREQ2FBIN(5180, 0),
1577 FREQ2FBIN(5240, 0),
1578 FREQ2FBIN(5320, 0),
1579 FREQ2FBIN(5400, 0),
1580 FREQ2FBIN(5500, 0),
1581 FREQ2FBIN(5700, 0),
1582 FREQ2FBIN(5745, 0),
1583 FREQ2FBIN(5825, 0)
1584 },
1585 .calTarget_freqbin_5GHT40 = {
1586 FREQ2FBIN(5180, 0),
1587 FREQ2FBIN(5240, 0),
1588 FREQ2FBIN(5320, 0),
1589 FREQ2FBIN(5400, 0),
1590 FREQ2FBIN(5500, 0),
1591 FREQ2FBIN(5700, 0),
1592 FREQ2FBIN(5745, 0),
1593 FREQ2FBIN(5825, 0)
1594 },
1595 .calTargetPower5G = {
1596 /* 6-24,36,48,54 */
1597 { {30, 30, 28, 24} },
1598 { {30, 30, 28, 24} },
1599 { {30, 30, 28, 24} },
1600 { {30, 30, 28, 24} },
1601 { {30, 30, 28, 24} },
1602 { {30, 30, 28, 24} },
1603 { {30, 30, 28, 24} },
1604 { {30, 30, 28, 24} },
1605 },
1606 .calTargetPower5GHT20 = {
1607 /*
1608 * 0_8_16,1-3_9-11_17-19,
1609 * 4,5,6,7,12,13,14,15,20,21,22,23
1610 */
1611 { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} },
1612 { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} },
1613 { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} },
1614 { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} },
1615 { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} },
1616 { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} },
1617 { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} },
1618 { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} },
1619 },
1620 .calTargetPower5GHT40 = {
1621 /*
1622 * 0_8_16,1-3_9-11_17-19,
1623 * 4,5,6,7,12,13,14,15,20,21,22,23
1624 */
1625 { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} },
1626 { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} },
1627 { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} },
1628 { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} },
1629 { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} },
1630 { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} },
1631 { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} },
1632 { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} },
1633 },
1634 .ctlIndex_5G = {
1635 0x10, 0x16, 0x18, 0x40, 0x46,
1636 0x48, 0x30, 0x36, 0x38
1637 },
1638 .ctl_freqbin_5G = {
1639 {
1640 /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1641 /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1642 /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
1643 /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1644 /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
1645 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1646 /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1647 /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1648 },
1649 {
1650 /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1651 /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1652 /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
1653 /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1654 /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
1655 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1656 /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1657 /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1658 },
1659
1660 {
1661 /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1662 /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
1663 /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
1664 /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
1665 /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
1666 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
1667 /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
1668 /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
1669 },
1670
1671 {
1672 /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1673 /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
1674 /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
1675 /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
1676 /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
1677 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1678 /* Data[3].ctlEdges[6].bChannel */ 0xFF,
1679 /* Data[3].ctlEdges[7].bChannel */ 0xFF,
1680 },
1681
1682 {
1683 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1684 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1685 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
1686 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
1687 /* Data[4].ctlEdges[4].bChannel */ 0xFF,
1688 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
1689 /* Data[4].ctlEdges[6].bChannel */ 0xFF,
1690 /* Data[4].ctlEdges[7].bChannel */ 0xFF,
1691 },
1692
1693 {
1694 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1695 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
1696 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
1697 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1698 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
1699 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1700 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
1701 /* Data[5].ctlEdges[7].bChannel */ 0xFF
1702 },
1703
1704 {
1705 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1706 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
1707 /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
1708 /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
1709 /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
1710 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
1711 /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
1712 /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
1713 },
1714
1715 {
1716 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
1717 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
1718 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
1719 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
1720 /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
1721 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
1722 /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
1723 /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
1724 },
1725
1726 {
1727 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
1728 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
1729 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
1730 /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
1731 /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
1732 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
1733 /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
1734 /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
1735 }
1736 },
1737 .ctlPowerData_5G = {
1738 {
1739 {
1740 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1741 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1742 }
1743 },
1744 {
1745 {
1746 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1747 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1748 }
1749 },
1750 {
1751 {
1752 {60, 0}, {60, 1}, {60, 0}, {60, 1},
1753 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1754 }
1755 },
1756 {
1757 {
1758 {60, 0}, {60, 1}, {60, 1}, {60, 0},
1759 {60, 1}, {60, 0}, {60, 0}, {60, 0},
1760 }
1761 },
1762 {
1763 {
1764 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1765 {60, 0}, {60, 0}, {60, 0}, {60, 0},
1766 }
1767 },
1768 {
1769 {
1770 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1771 {60, 1}, {60, 0}, {60, 0}, {60, 0},
1772 }
1773 },
1774 {
1775 {
1776 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1777 {60, 1}, {60, 1}, {60, 1}, {60, 1},
1778 }
1779 },
1780 {
1781 {
1782 {60, 1}, {60, 1}, {60, 0}, {60, 1},
1783 {60, 1}, {60, 1}, {60, 1}, {60, 0},
1784 }
1785 },
1786 {
1787 {
1788 {60, 1}, {60, 0}, {60, 1}, {60, 1},
1789 {60, 1}, {60, 1}, {60, 0}, {60, 1},
1790 }
1791 },
1792 }
1793};
1794
1795
1796static const struct ar9300_eeprom ar9300_x112 = {
1797 .eepromVersion = 2,
1798 .templateVersion = 5,
1799 .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
1800 .custData = {"x112-041-f0000"},
1801 .baseEepHeader = {
1802 .regDmn = { LE16(0), LE16(0x1f) },
1803 .txrxMask = 0x77, /* 4 bits tx and 4 bits rx */
1804 .opCapFlags = {
1805 .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
1806 .eepMisc = 0,
1807 },
1808 .rfSilent = 0,
1809 .blueToothOptions = 0,
1810 .deviceCap = 0,
1811 .deviceType = 5, /* takes lower byte in eeprom location */
1812 .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
1813 .params_for_tuning_caps = {0, 0},
1814 .featureEnable = 0x0d,
1815 /*
1816 * bit0 - enable tx temp comp - disabled
1817 * bit1 - enable tx volt comp - disabled
1818 * bit2 - enable fastclock - enabled
1819 * bit3 - enable doubling - enabled
1820 * bit4 - enable internal regulator - disabled
1821 * bit5 - enable pa predistortion - disabled
1822 */
1823 .miscConfiguration = 0, /* bit0 - turn down drivestrength */
1824 .eepromWriteEnableGpio = 6,
1825 .wlanDisableGpio = 0,
1826 .wlanLedGpio = 8,
1827 .rxBandSelectGpio = 0xff,
1828 .txrxgain = 0x0,
1829 .swreg = 0,
1830 },
1831 .modalHeader2G = {
1832 /* ar9300_modal_eep_header 2g */
1833 /* 4 idle,t1,t2,b(4 bits per setting) */
1834 .antCtrlCommon = LE32(0x110),
1835 /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
1836 .antCtrlCommon2 = LE32(0x22222),
1837
1838 /*
1839 * antCtrlChain[ar9300_max_chains]; 6 idle, t, r,
1840 * rx1, rx12, b (2 bits each)
1841 */
1842 .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) },
1843
1844 /*
1845 * xatten1DB[AR9300_max_chains]; 3 xatten1_db
1846 * for ar9280 (0xa20c/b20c 5:0)
1847 */
1848 .xatten1DB = {0x1b, 0x1b, 0x1b},
1849
1850 /*
1851 * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin
1852 * for ar9280 (0xa20c/b20c 16:12
1853 */
1854 .xatten1Margin = {0x15, 0x15, 0x15},
1855 .tempSlope = 50,
1856 .voltSlope = 0,
1857
1858 /*
1859 * spurChans[OSPrey_eeprom_modal_sPURS]; spur
1860 * channels in usual fbin coding format
1861 */
1862 .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
1863
1864 /*
1865 * noiseFloorThreshch[ar9300_max_cHAINS]; 3 Check
1866 * if the register is per chain
1867 */
1868 .noiseFloorThreshCh = {-1, 0, 0},
1869 .ob = {1, 1, 1},/* 3 chain */
1870 .db_stage2 = {1, 1, 1}, /* 3 chain */
1871 .db_stage3 = {0, 0, 0},
1872 .db_stage4 = {0, 0, 0},
1873 .xpaBiasLvl = 0,
1874 .txFrameToDataStart = 0x0e,
1875 .txFrameToPaOn = 0x0e,
1876 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
1877 .antennaGain = 0,
1878 .switchSettling = 0x2c,
1879 .adcDesiredSize = -30,
1880 .txEndToXpaOff = 0,
1881 .txEndToRxOn = 0x2,
1882 .txFrameToXpaOn = 0xe,
1883 .thresh62 = 28,
1884 .papdRateMaskHt20 = LE32(0x0c80c080),
1885 .papdRateMaskHt40 = LE32(0x0080c080),
1886 .futureModal = {
1887 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1888 },
1889 },
1890 .base_ext1 = {
1891 .ant_div_control = 0,
1892 .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
1893 },
1894 .calFreqPier2G = {
1895 FREQ2FBIN(2412, 1),
1896 FREQ2FBIN(2437, 1),
1897 FREQ2FBIN(2472, 1),
1898 },
1899 /* ar9300_cal_data_per_freq_op_loop 2g */
1900 .calPierData2G = {
1901 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1902 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1903 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
1904 },
1905 .calTarget_freqbin_Cck = {
1906 FREQ2FBIN(2412, 1),
1907 FREQ2FBIN(2472, 1),
1908 },
1909 .calTarget_freqbin_2G = {
1910 FREQ2FBIN(2412, 1),
1911 FREQ2FBIN(2437, 1),
1912 FREQ2FBIN(2472, 1)
1913 },
1914 .calTarget_freqbin_2GHT20 = {
1915 FREQ2FBIN(2412, 1),
1916 FREQ2FBIN(2437, 1),
1917 FREQ2FBIN(2472, 1)
1918 },
1919 .calTarget_freqbin_2GHT40 = {
1920 FREQ2FBIN(2412, 1),
1921 FREQ2FBIN(2437, 1),
1922 FREQ2FBIN(2472, 1)
1923 },
1924 .calTargetPowerCck = {
1925 /* 1L-5L,5S,11L,11s */
1926 { {38, 38, 38, 38} },
1927 { {38, 38, 38, 38} },
1928 },
1929 .calTargetPower2G = {
1930 /* 6-24,36,48,54 */
1931 { {38, 38, 36, 34} },
1932 { {38, 38, 36, 34} },
1933 { {38, 38, 34, 32} },
1934 },
1935 .calTargetPower2GHT20 = {
1936 { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} },
1937 { {36, 36, 36, 36, 36, 34, 36, 34, 32, 30, 30, 30, 28, 26} },
1938 { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} },
1939 },
1940 .calTargetPower2GHT40 = {
1941 { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} },
1942 { {36, 36, 36, 36, 34, 32, 34, 32, 30, 28, 28, 28, 28, 24} },
1943 { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} },
1944 },
1945 .ctlIndex_2G = {
1946 0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
1947 0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
1948 },
1949 .ctl_freqbin_2G = {
1950 {
1951 FREQ2FBIN(2412, 1),
1952 FREQ2FBIN(2417, 1),
1953 FREQ2FBIN(2457, 1),
1954 FREQ2FBIN(2462, 1)
1955 },
1956 {
1957 FREQ2FBIN(2412, 1),
1958 FREQ2FBIN(2417, 1),
1959 FREQ2FBIN(2462, 1),
1960 0xFF,
1961 },
1962
1963 {
1964 FREQ2FBIN(2412, 1),
1965 FREQ2FBIN(2417, 1),
1966 FREQ2FBIN(2462, 1),
1967 0xFF,
1968 },
1969 {
1970 FREQ2FBIN(2422, 1),
1971 FREQ2FBIN(2427, 1),
1972 FREQ2FBIN(2447, 1),
1973 FREQ2FBIN(2452, 1)
1974 },
1975
1976 {
1977 /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
1978 /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
1979 /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
1980 /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(2484, 1),
1981 },
1982
1983 {
1984 /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
1985 /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
1986 /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
1987 0,
1988 },
1989
1990 {
1991 /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
1992 /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
1993 FREQ2FBIN(2472, 1),
1994 0,
1995 },
1996
1997 {
1998 /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(2422, 1),
1999 /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(2427, 1),
2000 /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(2447, 1),
2001 /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(2462, 1),
2002 },
2003
2004 {
2005 /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
2006 /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
2007 /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
2008 },
2009
2010 {
2011 /* Data[9].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
2012 /* Data[9].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
2013 /* Data[9].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
2014 0
2015 },
2016
2017 {
2018 /* Data[10].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
2019 /* Data[10].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
2020 /* Data[10].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
2021 0
2022 },
2023
2024 {
2025 /* Data[11].ctledges[0].bchannel */ FREQ2FBIN(2422, 1),
2026 /* Data[11].ctledges[1].bchannel */ FREQ2FBIN(2427, 1),
2027 /* Data[11].ctledges[2].bchannel */ FREQ2FBIN(2447, 1),
2028 /* Data[11].ctledges[3].bchannel */ FREQ2FBIN(2462, 1),
2029 }
2030 },
2031 .ctlPowerData_2G = {
2032 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2033 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2034 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
2035
2036 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
2037 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2038 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2039
2040 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
2041 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2042 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2043
2044 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2045 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
2046 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
2047 },
2048 .modalHeader5G = {
2049 /* 4 idle,t1,t2,b (4 bits per setting) */
2050 .antCtrlCommon = LE32(0x110),
2051 /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
2052 .antCtrlCommon2 = LE32(0x22222),
2053 /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
2054 .antCtrlChain = {
2055 LE16(0x0), LE16(0x0), LE16(0x0),
2056 },
2057 /* xatten1DB 3 xatten1_db for ar9280 (0xa20c/b20c 5:0) */
2058 .xatten1DB = {0x13, 0x19, 0x17},
2059
2060 /*
2061 * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin
2062 * for merlin (0xa20c/b20c 16:12
2063 */
2064 .xatten1Margin = {0x19, 0x19, 0x19},
2065 .tempSlope = 70,
2066 .voltSlope = 15,
2067 /* spurChans spur channels in usual fbin coding format */
2068 .spurChans = {0, 0, 0, 0, 0},
2069 /* noiseFloorThreshch check if the register is per chain */
2070 .noiseFloorThreshCh = {-1, 0, 0},
2071 .ob = {3, 3, 3}, /* 3 chain */
2072 .db_stage2 = {3, 3, 3}, /* 3 chain */
2073 .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
2074 .db_stage4 = {3, 3, 3}, /* don't exist for 2G */
2075 .xpaBiasLvl = 0,
2076 .txFrameToDataStart = 0x0e,
2077 .txFrameToPaOn = 0x0e,
2078 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
2079 .antennaGain = 0,
2080 .switchSettling = 0x2d,
2081 .adcDesiredSize = -30,
2082 .txEndToXpaOff = 0,
2083 .txEndToRxOn = 0x2,
2084 .txFrameToXpaOn = 0xe,
2085 .thresh62 = 28,
2086 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
2087 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
2088 .futureModal = {
2089 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2090 },
2091 },
2092 .base_ext2 = {
2093 .tempSlopeLow = 72,
2094 .tempSlopeHigh = 105,
2095 .xatten1DBLow = {0x10, 0x14, 0x10},
2096 .xatten1MarginLow = {0x19, 0x19 , 0x19},
2097 .xatten1DBHigh = {0x1d, 0x20, 0x24},
2098 .xatten1MarginHigh = {0x10, 0x10, 0x10}
2099 },
2100 .calFreqPier5G = {
2101 FREQ2FBIN(5180, 0),
2102 FREQ2FBIN(5220, 0),
2103 FREQ2FBIN(5320, 0),
2104 FREQ2FBIN(5400, 0),
2105 FREQ2FBIN(5500, 0),
2106 FREQ2FBIN(5600, 0),
2107 FREQ2FBIN(5700, 0),
2108 FREQ2FBIN(5785, 0)
2109 },
2110 .calPierData5G = {
2111 {
2112 {0, 0, 0, 0, 0},
2113 {0, 0, 0, 0, 0},
2114 {0, 0, 0, 0, 0},
2115 {0, 0, 0, 0, 0},
2116 {0, 0, 0, 0, 0},
2117 {0, 0, 0, 0, 0},
2118 {0, 0, 0, 0, 0},
2119 {0, 0, 0, 0, 0},
2120 },
2121 {
2122 {0, 0, 0, 0, 0},
2123 {0, 0, 0, 0, 0},
2124 {0, 0, 0, 0, 0},
2125 {0, 0, 0, 0, 0},
2126 {0, 0, 0, 0, 0},
2127 {0, 0, 0, 0, 0},
2128 {0, 0, 0, 0, 0},
2129 {0, 0, 0, 0, 0},
2130 },
2131 {
2132 {0, 0, 0, 0, 0},
2133 {0, 0, 0, 0, 0},
2134 {0, 0, 0, 0, 0},
2135 {0, 0, 0, 0, 0},
2136 {0, 0, 0, 0, 0},
2137 {0, 0, 0, 0, 0},
2138 {0, 0, 0, 0, 0},
2139 {0, 0, 0, 0, 0},
2140 },
2141
2142 },
2143 .calTarget_freqbin_5G = {
2144 FREQ2FBIN(5180, 0),
2145 FREQ2FBIN(5220, 0),
2146 FREQ2FBIN(5320, 0),
2147 FREQ2FBIN(5400, 0),
2148 FREQ2FBIN(5500, 0),
2149 FREQ2FBIN(5600, 0),
2150 FREQ2FBIN(5725, 0),
2151 FREQ2FBIN(5825, 0)
2152 },
2153 .calTarget_freqbin_5GHT20 = {
2154 FREQ2FBIN(5180, 0),
2155 FREQ2FBIN(5220, 0),
2156 FREQ2FBIN(5320, 0),
2157 FREQ2FBIN(5400, 0),
2158 FREQ2FBIN(5500, 0),
2159 FREQ2FBIN(5600, 0),
2160 FREQ2FBIN(5725, 0),
2161 FREQ2FBIN(5825, 0)
2162 },
2163 .calTarget_freqbin_5GHT40 = {
2164 FREQ2FBIN(5180, 0),
2165 FREQ2FBIN(5220, 0),
2166 FREQ2FBIN(5320, 0),
2167 FREQ2FBIN(5400, 0),
2168 FREQ2FBIN(5500, 0),
2169 FREQ2FBIN(5600, 0),
2170 FREQ2FBIN(5725, 0),
2171 FREQ2FBIN(5825, 0)
2172 },
2173 .calTargetPower5G = {
2174 /* 6-24,36,48,54 */
2175 { {32, 32, 28, 26} },
2176 { {32, 32, 28, 26} },
2177 { {32, 32, 28, 26} },
2178 { {32, 32, 26, 24} },
2179 { {32, 32, 26, 24} },
2180 { {32, 32, 24, 22} },
2181 { {30, 30, 24, 22} },
2182 { {30, 30, 24, 22} },
2183 },
2184 .calTargetPower5GHT20 = {
2185 /*
2186 * 0_8_16,1-3_9-11_17-19,
2187 * 4,5,6,7,12,13,14,15,20,21,22,23
2188 */
2189 { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
2190 { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
2191 { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
2192 { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 22, 22, 20, 20} },
2193 { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 20, 18, 16, 16} },
2194 { {32, 32, 32, 32, 28, 26, 32, 24, 20, 16, 18, 16, 14, 14} },
2195 { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} },
2196 { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} },
2197 },
2198 .calTargetPower5GHT40 = {
2199 /*
2200 * 0_8_16,1-3_9-11_17-19,
2201 * 4,5,6,7,12,13,14,15,20,21,22,23
2202 */
2203 { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
2204 { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
2205 { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
2206 { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 22, 22, 20, 20} },
2207 { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 20, 18, 16, 16} },
2208 { {32, 32, 32, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
2209 { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
2210 { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
2211 },
2212 .ctlIndex_5G = {
2213 0x10, 0x16, 0x18, 0x40, 0x46,
2214 0x48, 0x30, 0x36, 0x38
2215 },
2216 .ctl_freqbin_5G = {
2217 {
2218 /* Data[0].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2219 /* Data[0].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
2220 /* Data[0].ctledges[2].bchannel */ FREQ2FBIN(5280, 0),
2221 /* Data[0].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
2222 /* Data[0].ctledges[4].bchannel */ FREQ2FBIN(5600, 0),
2223 /* Data[0].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2224 /* Data[0].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
2225 /* Data[0].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
2226 },
2227 {
2228 /* Data[1].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2229 /* Data[1].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
2230 /* Data[1].ctledges[2].bchannel */ FREQ2FBIN(5280, 0),
2231 /* Data[1].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
2232 /* Data[1].ctledges[4].bchannel */ FREQ2FBIN(5520, 0),
2233 /* Data[1].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2234 /* Data[1].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
2235 /* Data[1].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
2236 },
2237
2238 {
2239 /* Data[2].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
2240 /* Data[2].ctledges[1].bchannel */ FREQ2FBIN(5230, 0),
2241 /* Data[2].ctledges[2].bchannel */ FREQ2FBIN(5270, 0),
2242 /* Data[2].ctledges[3].bchannel */ FREQ2FBIN(5310, 0),
2243 /* Data[2].ctledges[4].bchannel */ FREQ2FBIN(5510, 0),
2244 /* Data[2].ctledges[5].bchannel */ FREQ2FBIN(5550, 0),
2245 /* Data[2].ctledges[6].bchannel */ FREQ2FBIN(5670, 0),
2246 /* Data[2].ctledges[7].bchannel */ FREQ2FBIN(5755, 0)
2247 },
2248
2249 {
2250 /* Data[3].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2251 /* Data[3].ctledges[1].bchannel */ FREQ2FBIN(5200, 0),
2252 /* Data[3].ctledges[2].bchannel */ FREQ2FBIN(5260, 0),
2253 /* Data[3].ctledges[3].bchannel */ FREQ2FBIN(5320, 0),
2254 /* Data[3].ctledges[4].bchannel */ FREQ2FBIN(5500, 0),
2255 /* Data[3].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2256 /* Data[3].ctledges[6].bchannel */ 0xFF,
2257 /* Data[3].ctledges[7].bchannel */ 0xFF,
2258 },
2259
2260 {
2261 /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2262 /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
2263 /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(5500, 0),
2264 /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(5700, 0),
2265 /* Data[4].ctledges[4].bchannel */ 0xFF,
2266 /* Data[4].ctledges[5].bchannel */ 0xFF,
2267 /* Data[4].ctledges[6].bchannel */ 0xFF,
2268 /* Data[4].ctledges[7].bchannel */ 0xFF,
2269 },
2270
2271 {
2272 /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
2273 /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(5270, 0),
2274 /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(5310, 0),
2275 /* Data[5].ctledges[3].bchannel */ FREQ2FBIN(5510, 0),
2276 /* Data[5].ctledges[4].bchannel */ FREQ2FBIN(5590, 0),
2277 /* Data[5].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
2278 /* Data[5].ctledges[6].bchannel */ 0xFF,
2279 /* Data[5].ctledges[7].bchannel */ 0xFF
2280 },
2281
2282 {
2283 /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2284 /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(5200, 0),
2285 /* Data[6].ctledges[2].bchannel */ FREQ2FBIN(5220, 0),
2286 /* Data[6].ctledges[3].bchannel */ FREQ2FBIN(5260, 0),
2287 /* Data[6].ctledges[4].bchannel */ FREQ2FBIN(5500, 0),
2288 /* Data[6].ctledges[5].bchannel */ FREQ2FBIN(5600, 0),
2289 /* Data[6].ctledges[6].bchannel */ FREQ2FBIN(5700, 0),
2290 /* Data[6].ctledges[7].bchannel */ FREQ2FBIN(5745, 0)
2291 },
2292
2293 {
2294 /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
2295 /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
2296 /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(5320, 0),
2297 /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
2298 /* Data[7].ctledges[4].bchannel */ FREQ2FBIN(5560, 0),
2299 /* Data[7].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
2300 /* Data[7].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
2301 /* Data[7].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
2302 },
2303
2304 {
2305 /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
2306 /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(5230, 0),
2307 /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(5270, 0),
2308 /* Data[8].ctledges[3].bchannel */ FREQ2FBIN(5510, 0),
2309 /* Data[8].ctledges[4].bchannel */ FREQ2FBIN(5550, 0),
2310 /* Data[8].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
2311 /* Data[8].ctledges[6].bchannel */ FREQ2FBIN(5755, 0),
2312 /* Data[8].ctledges[7].bchannel */ FREQ2FBIN(5795, 0)
2313 }
2314 },
2315 .ctlPowerData_5G = {
2316 {
2317 {
2318 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2319 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2320 }
2321 },
2322 {
2323 {
2324 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2325 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2326 }
2327 },
2328 {
2329 {
2330 {60, 0}, {60, 1}, {60, 0}, {60, 1},
2331 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2332 }
2333 },
2334 {
2335 {
2336 {60, 0}, {60, 1}, {60, 1}, {60, 0},
2337 {60, 1}, {60, 0}, {60, 0}, {60, 0},
2338 }
2339 },
2340 {
2341 {
2342 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2343 {60, 0}, {60, 0}, {60, 0}, {60, 0},
2344 }
2345 },
2346 {
2347 {
2348 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2349 {60, 1}, {60, 0}, {60, 0}, {60, 0},
2350 }
2351 },
2352 {
2353 {
2354 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2355 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2356 }
2357 },
2358 {
2359 {
2360 {60, 1}, {60, 1}, {60, 0}, {60, 1},
2361 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2362 }
2363 },
2364 {
2365 {
2366 {60, 1}, {60, 0}, {60, 1}, {60, 1},
2367 {60, 1}, {60, 1}, {60, 0}, {60, 1},
2368 }
2369 },
2370 }
2371};
2372
2373static const struct ar9300_eeprom ar9300_h116 = {
2374 .eepromVersion = 2,
2375 .templateVersion = 4,
2376 .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
2377 .custData = {"h116-041-f0000"},
2378 .baseEepHeader = {
2379 .regDmn = { LE16(0), LE16(0x1f) },
2380 .txrxMask = 0x33, /* 4 bits tx and 4 bits rx */
2381 .opCapFlags = {
2382 .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
2383 .eepMisc = 0,
2384 },
2385 .rfSilent = 0,
2386 .blueToothOptions = 0,
2387 .deviceCap = 0,
2388 .deviceType = 5, /* takes lower byte in eeprom location */
2389 .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
2390 .params_for_tuning_caps = {0, 0},
2391 .featureEnable = 0x0d,
2392 /*
2393 * bit0 - enable tx temp comp - disabled
2394 * bit1 - enable tx volt comp - disabled
2395 * bit2 - enable fastClock - enabled
2396 * bit3 - enable doubling - enabled
2397 * bit4 - enable internal regulator - disabled
2398 * bit5 - enable pa predistortion - disabled
2399 */
2400 .miscConfiguration = 0, /* bit0 - turn down drivestrength */
2401 .eepromWriteEnableGpio = 6,
2402 .wlanDisableGpio = 0,
2403 .wlanLedGpio = 8,
2404 .rxBandSelectGpio = 0xff,
2405 .txrxgain = 0x10,
2406 .swreg = 0,
2407 },
2408 .modalHeader2G = {
2409 /* ar9300_modal_eep_header 2g */
2410 /* 4 idle,t1,t2,b(4 bits per setting) */
2411 .antCtrlCommon = LE32(0x110),
2412 /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
2413 .antCtrlCommon2 = LE32(0x44444),
2414
2415 /*
2416 * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
2417 * rx1, rx12, b (2 bits each)
2418 */
2419 .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) },
2420
2421 /*
2422 * xatten1DB[AR9300_MAX_CHAINS]; 3 xatten1_db
2423 * for ar9280 (0xa20c/b20c 5:0)
2424 */
2425 .xatten1DB = {0x1f, 0x1f, 0x1f},
2426
2427 /*
2428 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
2429 * for ar9280 (0xa20c/b20c 16:12
2430 */
2431 .xatten1Margin = {0x12, 0x12, 0x12},
2432 .tempSlope = 25,
2433 .voltSlope = 0,
2434
2435 /*
2436 * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
2437 * channels in usual fbin coding format
2438 */
2439 .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
2440
2441 /*
2442 * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
2443 * if the register is per chain
2444 */
2445 .noiseFloorThreshCh = {-1, 0, 0},
2446 .ob = {1, 1, 1},/* 3 chain */
2447 .db_stage2 = {1, 1, 1}, /* 3 chain */
2448 .db_stage3 = {0, 0, 0},
2449 .db_stage4 = {0, 0, 0},
2450 .xpaBiasLvl = 0,
2451 .txFrameToDataStart = 0x0e,
2452 .txFrameToPaOn = 0x0e,
2453 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
2454 .antennaGain = 0,
2455 .switchSettling = 0x2c,
2456 .adcDesiredSize = -30,
2457 .txEndToXpaOff = 0,
2458 .txEndToRxOn = 0x2,
2459 .txFrameToXpaOn = 0xe,
2460 .thresh62 = 28,
2461 .papdRateMaskHt20 = LE32(0x0c80C080),
2462 .papdRateMaskHt40 = LE32(0x0080C080),
2463 .futureModal = {
2464 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2465 },
2466 },
2467 .base_ext1 = {
2468 .ant_div_control = 0,
2469 .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
2470 },
2471 .calFreqPier2G = {
2472 FREQ2FBIN(2412, 1),
2473 FREQ2FBIN(2437, 1),
2474 FREQ2FBIN(2472, 1),
2475 },
2476 /* ar9300_cal_data_per_freq_op_loop 2g */
2477 .calPierData2G = {
2478 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
2479 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
2480 { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
2481 },
2482 .calTarget_freqbin_Cck = {
2483 FREQ2FBIN(2412, 1),
2484 FREQ2FBIN(2472, 1),
2485 },
2486 .calTarget_freqbin_2G = {
2487 FREQ2FBIN(2412, 1),
2488 FREQ2FBIN(2437, 1),
2489 FREQ2FBIN(2472, 1)
2490 },
2491 .calTarget_freqbin_2GHT20 = {
2492 FREQ2FBIN(2412, 1),
2493 FREQ2FBIN(2437, 1),
2494 FREQ2FBIN(2472, 1)
2495 },
2496 .calTarget_freqbin_2GHT40 = {
2497 FREQ2FBIN(2412, 1),
2498 FREQ2FBIN(2437, 1),
2499 FREQ2FBIN(2472, 1)
2500 },
2501 .calTargetPowerCck = {
2502 /* 1L-5L,5S,11L,11S */
2503 { {34, 34, 34, 34} },
2504 { {34, 34, 34, 34} },
2505 },
2506 .calTargetPower2G = {
2507 /* 6-24,36,48,54 */
2508 { {34, 34, 32, 32} },
2509 { {34, 34, 32, 32} },
2510 { {34, 34, 32, 32} },
2511 },
2512 .calTargetPower2GHT20 = {
2513 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
2514 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
2515 { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
2516 },
2517 .calTargetPower2GHT40 = {
2518 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
2519 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
2520 { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
2521 },
2522 .ctlIndex_2G = {
2523 0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
2524 0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
2525 },
2526 .ctl_freqbin_2G = {
2527 {
2528 FREQ2FBIN(2412, 1),
2529 FREQ2FBIN(2417, 1),
2530 FREQ2FBIN(2457, 1),
2531 FREQ2FBIN(2462, 1)
2532 },
2533 {
2534 FREQ2FBIN(2412, 1),
2535 FREQ2FBIN(2417, 1),
2536 FREQ2FBIN(2462, 1),
2537 0xFF,
2538 },
2539
2540 {
2541 FREQ2FBIN(2412, 1),
2542 FREQ2FBIN(2417, 1),
2543 FREQ2FBIN(2462, 1),
2544 0xFF,
2545 },
2546 {
2547 FREQ2FBIN(2422, 1),
2548 FREQ2FBIN(2427, 1),
2549 FREQ2FBIN(2447, 1),
2550 FREQ2FBIN(2452, 1)
2551 },
2552
2553 {
2554 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2555 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2556 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2557 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
2558 },
2559
2560 {
2561 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2562 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2563 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2564 0,
2565 },
2566
2567 {
2568 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2569 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2570 FREQ2FBIN(2472, 1),
2571 0,
2572 },
2573
2574 {
2575 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
2576 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
2577 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
2578 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
2579 },
2580
2581 {
2582 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2583 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2584 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2585 },
2586
2587 {
2588 /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2589 /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2590 /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2591 0
2592 },
2593
2594 {
2595 /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
2596 /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
2597 /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
2598 0
2599 },
2600
2601 {
2602 /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
2603 /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
2604 /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
2605 /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
2606 }
2607 },
2608 .ctlPowerData_2G = {
2609 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2610 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2611 { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
2612
2613 { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
2614 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2615 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2616
2617 { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
2618 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2619 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2620
2621 { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
2622 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
2623 { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
2624 },
2625 .modalHeader5G = {
2626 /* 4 idle,t1,t2,b (4 bits per setting) */
2627 .antCtrlCommon = LE32(0x220),
2628 /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
2629 .antCtrlCommon2 = LE32(0x44444),
2630 /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
2631 .antCtrlChain = {
2632 LE16(0x150), LE16(0x150), LE16(0x150),
2633 },
2634 /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
2635 .xatten1DB = {0x19, 0x19, 0x19},
2636
2637 /*
2638 * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
2639 * for merlin (0xa20c/b20c 16:12
2640 */
2641 .xatten1Margin = {0x14, 0x14, 0x14},
2642 .tempSlope = 70,
2643 .voltSlope = 0,
2644 /* spurChans spur channels in usual fbin coding format */
2645 .spurChans = {0, 0, 0, 0, 0},
2646 /* noiseFloorThreshCh Check if the register is per chain */
2647 .noiseFloorThreshCh = {-1, 0, 0},
2648 .ob = {3, 3, 3}, /* 3 chain */
2649 .db_stage2 = {3, 3, 3}, /* 3 chain */
2650 .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
2651 .db_stage4 = {3, 3, 3}, /* don't exist for 2G */
2652 .xpaBiasLvl = 0,
2653 .txFrameToDataStart = 0x0e,
2654 .txFrameToPaOn = 0x0e,
2655 .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
2656 .antennaGain = 0,
2657 .switchSettling = 0x2d,
2658 .adcDesiredSize = -30,
2659 .txEndToXpaOff = 0,
2660 .txEndToRxOn = 0x2,
2661 .txFrameToXpaOn = 0xe,
2662 .thresh62 = 28,
2663 .papdRateMaskHt20 = LE32(0x0cf0e0e0),
2664 .papdRateMaskHt40 = LE32(0x6cf0e0e0),
2665 .futureModal = {
2666 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2667 },
2668 },
2669 .base_ext2 = {
2670 .tempSlopeLow = 35,
2671 .tempSlopeHigh = 50,
2672 .xatten1DBLow = {0, 0, 0},
2673 .xatten1MarginLow = {0, 0, 0},
2674 .xatten1DBHigh = {0, 0, 0},
2675 .xatten1MarginHigh = {0, 0, 0}
2676 },
2677 .calFreqPier5G = {
2678 FREQ2FBIN(5180, 0),
2679 FREQ2FBIN(5220, 0),
2680 FREQ2FBIN(5320, 0),
2681 FREQ2FBIN(5400, 0),
2682 FREQ2FBIN(5500, 0),
2683 FREQ2FBIN(5600, 0),
2684 FREQ2FBIN(5700, 0),
2685 FREQ2FBIN(5785, 0)
2686 },
2687 .calPierData5G = {
2688 {
2689 {0, 0, 0, 0, 0},
2690 {0, 0, 0, 0, 0},
2691 {0, 0, 0, 0, 0},
2692 {0, 0, 0, 0, 0},
2693 {0, 0, 0, 0, 0},
2694 {0, 0, 0, 0, 0},
2695 {0, 0, 0, 0, 0},
2696 {0, 0, 0, 0, 0},
2697 },
2698 {
2699 {0, 0, 0, 0, 0},
2700 {0, 0, 0, 0, 0},
2701 {0, 0, 0, 0, 0},
2702 {0, 0, 0, 0, 0},
2703 {0, 0, 0, 0, 0},
2704 {0, 0, 0, 0, 0},
2705 {0, 0, 0, 0, 0},
2706 {0, 0, 0, 0, 0},
2707 },
2708 {
2709 {0, 0, 0, 0, 0},
2710 {0, 0, 0, 0, 0},
2711 {0, 0, 0, 0, 0},
2712 {0, 0, 0, 0, 0},
2713 {0, 0, 0, 0, 0},
2714 {0, 0, 0, 0, 0},
2715 {0, 0, 0, 0, 0},
2716 {0, 0, 0, 0, 0},
2717 },
2718
2719 },
2720 .calTarget_freqbin_5G = {
2721 FREQ2FBIN(5180, 0),
2722 FREQ2FBIN(5240, 0),
2723 FREQ2FBIN(5320, 0),
2724 FREQ2FBIN(5400, 0),
2725 FREQ2FBIN(5500, 0),
2726 FREQ2FBIN(5600, 0),
2727 FREQ2FBIN(5700, 0),
2728 FREQ2FBIN(5825, 0)
2729 },
2730 .calTarget_freqbin_5GHT20 = {
2731 FREQ2FBIN(5180, 0),
2732 FREQ2FBIN(5240, 0),
2733 FREQ2FBIN(5320, 0),
2734 FREQ2FBIN(5400, 0),
2735 FREQ2FBIN(5500, 0),
2736 FREQ2FBIN(5700, 0),
2737 FREQ2FBIN(5745, 0),
2738 FREQ2FBIN(5825, 0)
2739 },
2740 .calTarget_freqbin_5GHT40 = {
2741 FREQ2FBIN(5180, 0),
2742 FREQ2FBIN(5240, 0),
2743 FREQ2FBIN(5320, 0),
2744 FREQ2FBIN(5400, 0),
2745 FREQ2FBIN(5500, 0),
2746 FREQ2FBIN(5700, 0),
2747 FREQ2FBIN(5745, 0),
2748 FREQ2FBIN(5825, 0)
2749 },
2750 .calTargetPower5G = {
2751 /* 6-24,36,48,54 */
2752 { {30, 30, 28, 24} },
2753 { {30, 30, 28, 24} },
2754 { {30, 30, 28, 24} },
2755 { {30, 30, 28, 24} },
2756 { {30, 30, 28, 24} },
2757 { {30, 30, 28, 24} },
2758 { {30, 30, 28, 24} },
2759 { {30, 30, 28, 24} },
2760 },
2761 .calTargetPower5GHT20 = {
2762 /*
2763 * 0_8_16,1-3_9-11_17-19,
2764 * 4,5,6,7,12,13,14,15,20,21,22,23
2765 */
2766 { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} },
2767 { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} },
2768 { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} },
2769 { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} },
2770 { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} },
2771 { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} },
2772 { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} },
2773 { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} },
2774 },
2775 .calTargetPower5GHT40 = {
2776 /*
2777 * 0_8_16,1-3_9-11_17-19,
2778 * 4,5,6,7,12,13,14,15,20,21,22,23
2779 */
2780 { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} },
2781 { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} },
2782 { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} },
2783 { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} },
2784 { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} },
2785 { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} },
2786 { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} },
2787 { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} },
2788 },
2789 .ctlIndex_5G = {
2790 0x10, 0x16, 0x18, 0x40, 0x46,
2791 0x48, 0x30, 0x36, 0x38
2792 },
2793 .ctl_freqbin_5G = {
2794 {
2795 /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2796 /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
2797 /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
2798 /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
2799 /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
2800 /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2801 /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
2802 /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
2803 },
2804 {
2805 /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2806 /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
2807 /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
2808 /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
2809 /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
2810 /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2811 /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
2812 /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
2813 },
2814
2815 {
2816 /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
2817 /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
2818 /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
2819 /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
2820 /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
2821 /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
2822 /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
2823 /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
2824 },
2825
2826 {
2827 /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2828 /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
2829 /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
2830 /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
2831 /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
2832 /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2833 /* Data[3].ctlEdges[6].bChannel */ 0xFF,
2834 /* Data[3].ctlEdges[7].bChannel */ 0xFF,
2835 },
2836
2837 {
2838 /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2839 /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
2840 /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
2841 /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
2842 /* Data[4].ctlEdges[4].bChannel */ 0xFF,
2843 /* Data[4].ctlEdges[5].bChannel */ 0xFF,
2844 /* Data[4].ctlEdges[6].bChannel */ 0xFF,
2845 /* Data[4].ctlEdges[7].bChannel */ 0xFF,
2846 },
2847
2848 {
2849 /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
2850 /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
2851 /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
2852 /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
2853 /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
2854 /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
2855 /* Data[5].ctlEdges[6].bChannel */ 0xFF,
2856 /* Data[5].ctlEdges[7].bChannel */ 0xFF
2857 },
2858
2859 {
2860 /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2861 /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
2862 /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
2863 /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
2864 /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
2865 /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
2866 /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
2867 /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
2868 },
2869
2870 {
2871 /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
2872 /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
2873 /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
2874 /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
2875 /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
2876 /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
2877 /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
2878 /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
2879 },
2880
2881 {
2882 /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
2883 /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
2884 /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
2885 /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
2886 /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
2887 /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
2888 /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
2889 /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
2890 }
2891 },
2892 .ctlPowerData_5G = {
2893 {
2894 {
2895 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2896 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2897 }
2898 },
2899 {
2900 {
2901 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2902 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2903 }
2904 },
2905 {
2906 {
2907 {60, 0}, {60, 1}, {60, 0}, {60, 1},
2908 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2909 }
2910 },
2911 {
2912 {
2913 {60, 0}, {60, 1}, {60, 1}, {60, 0},
2914 {60, 1}, {60, 0}, {60, 0}, {60, 0},
2915 }
2916 },
2917 {
2918 {
2919 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2920 {60, 0}, {60, 0}, {60, 0}, {60, 0},
2921 }
2922 },
2923 {
2924 {
2925 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2926 {60, 1}, {60, 0}, {60, 0}, {60, 0},
2927 }
2928 },
2929 {
2930 {
2931 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2932 {60, 1}, {60, 1}, {60, 1}, {60, 1},
2933 }
2934 },
2935 {
2936 {
2937 {60, 1}, {60, 1}, {60, 0}, {60, 1},
2938 {60, 1}, {60, 1}, {60, 1}, {60, 0},
2939 }
2940 },
2941 {
2942 {
2943 {60, 1}, {60, 0}, {60, 1}, {60, 1},
2944 {60, 1}, {60, 1}, {60, 0}, {60, 1},
2945 }
2946 },
2947 }
2948};
2949
2950
2951static const struct ar9300_eeprom *ar9300_eep_templates[] = {
2952 &ar9300_default,
2953 &ar9300_x112,
2954 &ar9300_h116,
2955 &ar9300_h112,
2956 &ar9300_x113,
2957};
2958
2959static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id)
2960{
2961#define N_LOOP (sizeof(ar9300_eep_templates) / sizeof(ar9300_eep_templates[0]))
2962 int it;
2963
2964 for (it = 0; it < N_LOOP; it++)
2965 if (ar9300_eep_templates[it]->templateVersion == id)
2966 return ar9300_eep_templates[it];
2967 return NULL;
2968#undef N_LOOP
2969}
2970
2971
626static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz) 2972static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
627{ 2973{
628 if (fbin == AR9300_BCHAN_UNUSED) 2974 if (fbin == AR9300_BCHAN_UNUSED)
@@ -636,6 +2982,16 @@ static int ath9k_hw_ar9300_check_eeprom(struct ath_hw *ah)
636 return 0; 2982 return 0;
637} 2983}
638 2984
2985static int interpolate(int x, int xa, int xb, int ya, int yb)
2986{
2987 int bf, factor, plus;
2988
2989 bf = 2 * (yb - ya) * (x - xa) / (xb - xa);
2990 factor = bf / 2;
2991 plus = bf % 2;
2992 return ya + factor + plus;
2993}
2994
639static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah, 2995static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
640 enum eeprom_param param) 2996 enum eeprom_param param)
641{ 2997{
@@ -748,6 +3104,36 @@ error:
748 return false; 3104 return false;
749} 3105}
750 3106
3107static bool ar9300_otp_read_word(struct ath_hw *ah, int addr, u32 *data)
3108{
3109 REG_READ(ah, AR9300_OTP_BASE + (4 * addr));
3110
3111 if (!ath9k_hw_wait(ah, AR9300_OTP_STATUS, AR9300_OTP_STATUS_TYPE,
3112 AR9300_OTP_STATUS_VALID, 1000))
3113 return false;
3114
3115 *data = REG_READ(ah, AR9300_OTP_READ_DATA);
3116 return true;
3117}
3118
3119static bool ar9300_read_otp(struct ath_hw *ah, int address, u8 *buffer,
3120 int count)
3121{
3122 u32 data;
3123 int i;
3124
3125 for (i = 0; i < count; i++) {
3126 int offset = 8 * ((address - i) % 4);
3127 if (!ar9300_otp_read_word(ah, (address - i) / 4, &data))
3128 return false;
3129
3130 buffer[i] = (data >> offset) & 0xff;
3131 }
3132
3133 return true;
3134}
3135
3136
751static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference, 3137static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference,
752 int *length, int *major, int *minor) 3138 int *length, int *major, int *minor)
753{ 3139{
@@ -824,6 +3210,7 @@ static int ar9300_compress_decision(struct ath_hw *ah,
824{ 3210{
825 struct ath_common *common = ath9k_hw_common(ah); 3211 struct ath_common *common = ath9k_hw_common(ah);
826 u8 *dptr; 3212 u8 *dptr;
3213 const struct ar9300_eeprom *eep = NULL;
827 3214
828 switch (code) { 3215 switch (code) {
829 case _CompressNone: 3216 case _CompressNone:
@@ -841,13 +3228,14 @@ static int ar9300_compress_decision(struct ath_hw *ah,
841 if (reference == 0) { 3228 if (reference == 0) {
842 dptr = mptr; 3229 dptr = mptr;
843 } else { 3230 } else {
844 if (reference != 2) { 3231 eep = ar9003_eeprom_struct_find_by_id(reference);
3232 if (eep == NULL) {
845 ath_print(common, ATH_DBG_EEPROM, 3233 ath_print(common, ATH_DBG_EEPROM,
846 "cant find reference eeprom" 3234 "cant find reference eeprom"
847 "struct %d\n", reference); 3235 "struct %d\n", reference);
848 return -1; 3236 return -1;
849 } 3237 }
850 memcpy(mptr, &ar9300_default, mdata_size); 3238 memcpy(mptr, eep, mdata_size);
851 } 3239 }
852 ath_print(common, ATH_DBG_EEPROM, 3240 ath_print(common, ATH_DBG_EEPROM,
853 "restore eeprom %d: block, reference %d," 3241 "restore eeprom %d: block, reference %d,"
@@ -863,6 +3251,38 @@ static int ar9300_compress_decision(struct ath_hw *ah,
863 return 0; 3251 return 0;
864} 3252}
865 3253
3254typedef bool (*eeprom_read_op)(struct ath_hw *ah, int address, u8 *buffer,
3255 int count);
3256
3257static bool ar9300_check_header(void *data)
3258{
3259 u32 *word = data;
3260 return !(*word == 0 || *word == ~0);
3261}
3262
3263static bool ar9300_check_eeprom_header(struct ath_hw *ah, eeprom_read_op read,
3264 int base_addr)
3265{
3266 u8 header[4];
3267
3268 if (!read(ah, base_addr, header, 4))
3269 return false;
3270
3271 return ar9300_check_header(header);
3272}
3273
3274static int ar9300_eeprom_restore_flash(struct ath_hw *ah, u8 *mptr,
3275 int mdata_size)
3276{
3277 struct ath_common *common = ath9k_hw_common(ah);
3278 u16 *data = (u16 *) mptr;
3279 int i;
3280
3281 for (i = 0; i < mdata_size / 2; i++, data++)
3282 ath9k_hw_nvram_read(common, i, data);
3283
3284 return 0;
3285}
866/* 3286/*
867 * Read the configuration data from the eeprom. 3287 * Read the configuration data from the eeprom.
868 * The data can be put in any specified memory buffer. 3288 * The data can be put in any specified memory buffer.
@@ -883,6 +3303,10 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
883 int it; 3303 int it;
884 u16 checksum, mchecksum; 3304 u16 checksum, mchecksum;
885 struct ath_common *common = ath9k_hw_common(ah); 3305 struct ath_common *common = ath9k_hw_common(ah);
3306 eeprom_read_op read;
3307
3308 if (ath9k_hw_use_flash(ah))
3309 return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
886 3310
887 word = kzalloc(2048, GFP_KERNEL); 3311 word = kzalloc(2048, GFP_KERNEL);
888 if (!word) 3312 if (!word)
@@ -890,14 +3314,42 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
890 3314
891 memcpy(mptr, &ar9300_default, mdata_size); 3315 memcpy(mptr, &ar9300_default, mdata_size);
892 3316
3317 read = ar9300_read_eeprom;
3318 cptr = AR9300_BASE_ADDR;
3319 ath_print(common, ATH_DBG_EEPROM,
3320 "Trying EEPROM accesss at Address 0x%04x\n", cptr);
3321 if (ar9300_check_eeprom_header(ah, read, cptr))
3322 goto found;
3323
3324 cptr = AR9300_BASE_ADDR_512;
3325 ath_print(common, ATH_DBG_EEPROM,
3326 "Trying EEPROM accesss at Address 0x%04x\n", cptr);
3327 if (ar9300_check_eeprom_header(ah, read, cptr))
3328 goto found;
3329
3330 read = ar9300_read_otp;
893 cptr = AR9300_BASE_ADDR; 3331 cptr = AR9300_BASE_ADDR;
3332 ath_print(common, ATH_DBG_EEPROM,
3333 "Trying OTP accesss at Address 0x%04x\n", cptr);
3334 if (ar9300_check_eeprom_header(ah, read, cptr))
3335 goto found;
3336
3337 cptr = AR9300_BASE_ADDR_512;
3338 ath_print(common, ATH_DBG_EEPROM,
3339 "Trying OTP accesss at Address 0x%04x\n", cptr);
3340 if (ar9300_check_eeprom_header(ah, read, cptr))
3341 goto found;
3342
3343 goto fail;
3344
3345found:
3346 ath_print(common, ATH_DBG_EEPROM, "Found valid EEPROM data");
3347
894 for (it = 0; it < MSTATE; it++) { 3348 for (it = 0; it < MSTATE; it++) {
895 if (!ar9300_read_eeprom(ah, cptr, word, COMP_HDR_LEN)) 3349 if (!read(ah, cptr, word, COMP_HDR_LEN))
896 goto fail; 3350 goto fail;
897 3351
898 if ((word[0] == 0 && word[1] == 0 && word[2] == 0 && 3352 if (!ar9300_check_header(word))
899 word[3] == 0) || (word[0] == 0xff && word[1] == 0xff
900 && word[2] == 0xff && word[3] == 0xff))
901 break; 3353 break;
902 3354
903 ar9300_comp_hdr_unpack(word, &code, &reference, 3355 ar9300_comp_hdr_unpack(word, &code, &reference,
@@ -914,8 +3366,7 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah,
914 } 3366 }
915 3367
916 osize = length; 3368 osize = length;
917 ar9300_read_eeprom(ah, cptr, word, 3369 read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
918 COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
919 checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); 3370 checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length);
920 mchecksum = word[COMP_HDR_LEN + osize] | 3371 mchecksum = word[COMP_HDR_LEN + osize] |
921 (word[COMP_HDR_LEN + osize + 1] << 8); 3372 (word[COMP_HDR_LEN + osize + 1] << 8);
@@ -992,9 +3443,9 @@ static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
992static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz) 3443static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
993{ 3444{
994 int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz); 3445 int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
995 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, (bias & 0x3)); 3446 REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
996 REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_SPARE, 3447 REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2);
997 ((bias >> 2) & 0x3)); 3448 REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
998} 3449}
999 3450
1000static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz) 3451static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
@@ -1097,6 +3548,82 @@ static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
1097 REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg); 3548 REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg);
1098} 3549}
1099 3550
3551static u16 ar9003_hw_atten_chain_get(struct ath_hw *ah, int chain,
3552 struct ath9k_channel *chan)
3553{
3554 int f[3], t[3];
3555 u16 value;
3556 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
3557
3558 if (chain >= 0 && chain < 3) {
3559 if (IS_CHAN_2GHZ(chan))
3560 return eep->modalHeader2G.xatten1DB[chain];
3561 else if (eep->base_ext2.xatten1DBLow[chain] != 0) {
3562 t[0] = eep->base_ext2.xatten1DBLow[chain];
3563 f[0] = 5180;
3564 t[1] = eep->modalHeader5G.xatten1DB[chain];
3565 f[1] = 5500;
3566 t[2] = eep->base_ext2.xatten1DBHigh[chain];
3567 f[2] = 5785;
3568 value = ar9003_hw_power_interpolate((s32) chan->channel,
3569 f, t, 3);
3570 return value;
3571 } else
3572 return eep->modalHeader5G.xatten1DB[chain];
3573 }
3574
3575 return 0;
3576}
3577
3578
3579static u16 ar9003_hw_atten_chain_get_margin(struct ath_hw *ah, int chain,
3580 struct ath9k_channel *chan)
3581{
3582 int f[3], t[3];
3583 u16 value;
3584 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
3585
3586 if (chain >= 0 && chain < 3) {
3587 if (IS_CHAN_2GHZ(chan))
3588 return eep->modalHeader2G.xatten1Margin[chain];
3589 else if (eep->base_ext2.xatten1MarginLow[chain] != 0) {
3590 t[0] = eep->base_ext2.xatten1MarginLow[chain];
3591 f[0] = 5180;
3592 t[1] = eep->modalHeader5G.xatten1Margin[chain];
3593 f[1] = 5500;
3594 t[2] = eep->base_ext2.xatten1MarginHigh[chain];
3595 f[2] = 5785;
3596 value = ar9003_hw_power_interpolate((s32) chan->channel,
3597 f, t, 3);
3598 return value;
3599 } else
3600 return eep->modalHeader5G.xatten1Margin[chain];
3601 }
3602
3603 return 0;
3604}
3605
3606static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan)
3607{
3608 int i;
3609 u16 value;
3610 unsigned long ext_atten_reg[3] = {AR_PHY_EXT_ATTEN_CTL_0,
3611 AR_PHY_EXT_ATTEN_CTL_1,
3612 AR_PHY_EXT_ATTEN_CTL_2,
3613 };
3614
3615 /* Test value. if 0 then attenuation is unused. Don't load anything. */
3616 for (i = 0; i < 3; i++) {
3617 value = ar9003_hw_atten_chain_get(ah, i, chan);
3618 REG_RMW_FIELD(ah, ext_atten_reg[i],
3619 AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
3620
3621 value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
3622 REG_RMW_FIELD(ah, ext_atten_reg[i],
3623 AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value);
3624 }
3625}
3626
1100static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah) 3627static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
1101{ 3628{
1102 int internal_regulator = 3629 int internal_regulator =
@@ -1128,6 +3655,7 @@ static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
1128 ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan)); 3655 ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
1129 ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan)); 3656 ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
1130 ar9003_hw_drive_strength_apply(ah); 3657 ar9003_hw_drive_strength_apply(ah);
3658 ar9003_hw_atten_apply(ah, chan);
1131 ar9003_hw_internal_regulator_apply(ah); 3659 ar9003_hw_internal_regulator_apply(ah);
1132} 3660}
1133 3661
@@ -1189,7 +3717,7 @@ static int ar9003_hw_power_interpolate(int32_t x,
1189 if (hx == lx) 3717 if (hx == lx)
1190 y = ly; 3718 y = ly;
1191 else /* interpolate */ 3719 else /* interpolate */
1192 y = ly + (((x - lx) * (hy - ly)) / (hx - lx)); 3720 y = interpolate(x, lx, hx, ly, hy);
1193 } else /* only low is good, use it */ 3721 } else /* only low is good, use it */
1194 y = ly; 3722 y = ly;
1195 } else if (hhave) /* only high is good, use it */ 3723 } else if (hhave) /* only high is good, use it */
@@ -1637,6 +4165,7 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
1637{ 4165{
1638 int tempSlope = 0; 4166 int tempSlope = 0;
1639 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep; 4167 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
4168 int f[3], t[3];
1640 4169
1641 REG_RMW(ah, AR_PHY_TPC_11_B0, 4170 REG_RMW(ah, AR_PHY_TPC_11_B0,
1642 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S), 4171 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
@@ -1665,7 +4194,16 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
1665 */ 4194 */
1666 if (frequency < 4000) 4195 if (frequency < 4000)
1667 tempSlope = eep->modalHeader2G.tempSlope; 4196 tempSlope = eep->modalHeader2G.tempSlope;
1668 else 4197 else if (eep->base_ext2.tempSlopeLow != 0) {
4198 t[0] = eep->base_ext2.tempSlopeLow;
4199 f[0] = 5180;
4200 t[1] = eep->modalHeader5G.tempSlope;
4201 f[1] = 5500;
4202 t[2] = eep->base_ext2.tempSlopeHigh;
4203 f[2] = 5785;
4204 tempSlope = ar9003_hw_power_interpolate((s32) frequency,
4205 f, t, 3);
4206 } else
1669 tempSlope = eep->modalHeader5G.tempSlope; 4207 tempSlope = eep->modalHeader5G.tempSlope;
1670 4208
1671 REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope); 4209 REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
@@ -1769,25 +4307,23 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency)
1769 /* so is the high frequency, interpolate */ 4307 /* so is the high frequency, interpolate */
1770 if (hfrequency[ichain] - frequency < 1000) { 4308 if (hfrequency[ichain] - frequency < 1000) {
1771 4309
1772 correction[ichain] = lcorrection[ichain] + 4310 correction[ichain] = interpolate(frequency,
1773 (((frequency - lfrequency[ichain]) * 4311 lfrequency[ichain],
1774 (hcorrection[ichain] - 4312 hfrequency[ichain],
1775 lcorrection[ichain])) / 4313 lcorrection[ichain],
1776 (hfrequency[ichain] - lfrequency[ichain])); 4314 hcorrection[ichain]);
1777 4315
1778 temperature[ichain] = ltemperature[ichain] + 4316 temperature[ichain] = interpolate(frequency,
1779 (((frequency - lfrequency[ichain]) * 4317 lfrequency[ichain],
1780 (htemperature[ichain] - 4318 hfrequency[ichain],
1781 ltemperature[ichain])) / 4319 ltemperature[ichain],
1782 (hfrequency[ichain] - lfrequency[ichain])); 4320 htemperature[ichain]);
1783 4321
1784 voltage[ichain] = 4322 voltage[ichain] = interpolate(frequency,
1785 lvoltage[ichain] + 4323 lfrequency[ichain],
1786 (((frequency - 4324 hfrequency[ichain],
1787 lfrequency[ichain]) * (hvoltage[ichain] - 4325 lvoltage[ichain],
1788 lvoltage[ichain])) 4326 hvoltage[ichain]);
1789 / (hfrequency[ichain] -
1790 lfrequency[ichain]));
1791 } 4327 }
1792 /* only low is good, use it */ 4328 /* only low is good, use it */
1793 else { 4329 else {
@@ -1919,14 +4455,16 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah,
1919 int i; 4455 int i;
1920 int16_t twiceLargestAntenna; 4456 int16_t twiceLargestAntenna;
1921 u16 scaledPower = 0, minCtlPower, maxRegAllowedPower; 4457 u16 scaledPower = 0, minCtlPower, maxRegAllowedPower;
1922 u16 ctlModesFor11a[] = { 4458 static const u16 ctlModesFor11a[] = {
1923 CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40 4459 CTL_11A, CTL_5GHT20, CTL_11A_EXT, CTL_5GHT40
1924 }; 4460 };
1925 u16 ctlModesFor11g[] = { 4461 static const u16 ctlModesFor11g[] = {
1926 CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT, 4462 CTL_11B, CTL_11G, CTL_2GHT20, CTL_11B_EXT,
1927 CTL_11G_EXT, CTL_2GHT40 4463 CTL_11G_EXT, CTL_2GHT40
1928 }; 4464 };
1929 u16 numCtlModes, *pCtlMode, ctlMode, freq; 4465 u16 numCtlModes;
4466 const u16 *pCtlMode;
4467 u16 ctlMode, freq;
1930 struct chan_centers centers; 4468 struct chan_centers centers;
1931 u8 *ctlIndex; 4469 u8 *ctlIndex;
1932 u8 ctlNum; 4470 u8 ctlNum;
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-22 04:45:20 -0400